From ae03661fda98465420016b410a27e6bf2a3c03f4 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 31 Oct 2011 06:51:35 +0000 Subject: tegra2: Move board_mmc_init into board files For Seaboard, this is mostly a cut/paste of board_mmc_init() and pin_mux_mmc() into seaboard.c; pin_mux_mmc() was modified to add some missing pinmux_tristate_disable calls for the GPIOs. For Harmony, those functions were modified to configure SDMMC2 (index 2) instead of SDMMC3 (index 1), since that's what is present on the board. However, harmony.c is still missing the required GPIO setup, so neither port is likely to function correctly yet. This will be fixed in the next change. v4: Include board.h to prototype tegra2_mmc_init(). Signed-off-by: Stephen Warren Tested-by: Simon Glass Acked-by: Simon Glass Signed-off-by: Tom Warren --- board/nvidia/common/board.c | 52 --------------------------------------------- 1 file changed, 52 deletions(-) (limited to 'board/nvidia/common/board.c') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 370a25906..0f12de209 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -33,10 +33,6 @@ #include #include "board.h" -#ifdef CONFIG_TEGRA2_MMC -#include -#endif - DECLARE_GLOBAL_DATA_PTR; const struct tegra2_sysinfo sysinfo = { @@ -100,33 +96,6 @@ static void pin_mux_uart(void) #endif /* CONFIG_TEGRA2_ENABLE_UARTD */ } -#ifdef CONFIG_TEGRA2_MMC -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - /* SDMMC4: config 3, x8 on 2nd set of pins */ - pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); - - pinmux_tristate_disable(PINGRP_ATB); - pinmux_tristate_disable(PINGRP_GMA); - pinmux_tristate_disable(PINGRP_GME); - - /* SDMMC3: SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */ - pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); - pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3); - pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3); - - pinmux_tristate_disable(PINGRP_SDC); - pinmux_tristate_disable(PINGRP_SDD); - pinmux_tristate_disable(PINGRP_SDB); -} -#endif - /* * Routine: board_init * Description: Early hardware init. @@ -142,27 +111,6 @@ int board_init(void) return 0; } -#ifdef CONFIG_TEGRA2_MMC -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - debug("board_mmc_init called\n"); - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - gpio_config_mmc(); - - debug("board_mmc_init: init eMMC\n"); - /* init dev 0, eMMC chip, with 4-bit bus */ - tegra2_mmc_init(0, 4); - - debug("board_mmc_init: init SD slot\n"); - /* init dev 1, SD slot, with 4-bit bus */ - tegra2_mmc_init(1, 4); - - return 0; -} -#endif - #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { -- cgit v1.2.3-70-g09d2 From e43d6ed932a4fbeb4c53a66bd2b7fc1f802a810e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 5 Nov 2011 03:56:49 +0000 Subject: tegra2: Add arch_cpu_init() to fire up Cortex-A9 We want to move away from a special Tegra2 start-up, and just use arch_cpu_init() instead. However, if we run board_init_f() from boot we need to build it for ARMv4T, since the Tegra's AVP start-up CPU does not support ARMv7. The effect of this is to do the AVP init earlier, and in arch_cpu_init(), rather that board_early_init_f(). Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/cpu/armv7/tegra2/board.c | 15 +++++++++++++++ arch/arm/cpu/armv7/tegra2/config.mk | 6 ++++++ board/nvidia/common/board.c | 3 --- board/nvidia/common/board.h | 1 - include/configs/tegra2-common.h | 1 + 5 files changed, 22 insertions(+), 4 deletions(-) (limited to 'board/nvidia/common/board.c') diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c index 751102d18..4530194bf 100644 --- a/arch/arm/cpu/armv7/tegra2/board.c +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -23,6 +23,7 @@ #include #include +#include "ap20.h" #include #include #include @@ -86,3 +87,17 @@ int checkboard(void) return 0; } #endif /* CONFIG_DISPLAY_BOARDINFO */ + +#ifdef CONFIG_ARCH_CPU_INIT +/* + * Note this function is executed by the ARM7TDMI AVP. It does not return + * in this case. It is also called once the A9 starts up, but does nothing in + * that case. + */ +int arch_cpu_init(void) +{ + /* Fire up the Cortex A9 */ + tegra2_start(); + return 0; +} +#endif diff --git a/arch/arm/cpu/armv7/tegra2/config.mk b/arch/arm/cpu/armv7/tegra2/config.mk index 96c07955a..f84fdc8f9 100644 --- a/arch/arm/cpu/armv7/tegra2/config.mk +++ b/arch/arm/cpu/armv7/tegra2/config.mk @@ -26,3 +26,9 @@ # Use ARMv4 for Tegra2 - initial code runs on the AVP, which is an ARM7TDI. PLATFORM_CPPFLAGS += -march=armv4 + +# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build this +# file with compatible flags +ifdef CONFIG_TEGRA2 +CFLAGS_arch/arm/lib/board.o += -march=armv4t +endif diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 0f12de209..56850cc8b 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -125,9 +125,6 @@ int board_early_init_f(void) /* Initialize periph GPIOs */ gpio_config_uart(); - - /* Init UART, scratch regs, and start CPU */ - tegra2_start(); return 0; } #endif /* EARLY_INIT */ diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h index 35acbca82..1f5708660 100644 --- a/board/nvidia/common/board.h +++ b/board/nvidia/common/board.h @@ -24,7 +24,6 @@ #ifndef _BOARD_H_ #define _BOARD_H_ -void tegra2_start(void); void gpio_config_uart(void); int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio); diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index 9c3b9fa3e..16debf625 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -35,6 +35,7 @@ #define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */ #define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */ #include /* get chip and board defs */ -- cgit v1.2.3-70-g09d2 From 831a077f11869dfc33ca2316a4bdeba203e8ce60 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 5 Nov 2011 03:56:52 +0000 Subject: tegra2: Enable instruction cache Since low-level init is skipped, the instruction cache is never enabled on Tegra2. This explicitly calls this initialization as soon as the A9 is initialized. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- board/nvidia/common/board.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'board/nvidia/common/board.c') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 56850cc8b..c806a6b3c 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -114,6 +114,9 @@ int board_init(void) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { + /* We didn't do this init in start.S, so do it now */ + cpu_init_cp15(); + /* Initialize essential common plls */ clock_early_init(); -- cgit v1.2.3-70-g09d2