From cb93071bb6da21d17dd7d7d414a389b380f959b2 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 25 Jun 2013 11:37:41 -0700 Subject: mpc85xx: Base emulator support Prepare for emulator support for mpc85xx parts. Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers. These two registers improve stability but not supported by emulator. Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base. Signed-off-by: York Sun --- arch/powerpc/cpu/mpc85xx/fdt.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/cpu/mpc85xx/fdt.c') diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index cfaa2edce..84bb8fab8 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -604,8 +604,12 @@ void ft_cpu_setup(void *blob, bd_t *bd) fdt_add_enet_stashing(blob); +#ifndef CONFIG_FSL_TBCLK_EXTRA_DIV +#define CONFIG_FSL_TBCLK_EXTRA_DIV 1 +#endif do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, - "timebase-frequency", get_tbclk(), 1); + "timebase-frequency", get_tbclk() / CONFIG_FSL_TBCLK_EXTRA_DIV, + 1); do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "bus-frequency", bd->bi_busfreq, 1); get_sys_info(&sysinfo); -- cgit v1.2.3-70-g09d2