From a09b9b68d492e978ef0e14cae93ff9cfbc2d3e4b Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 30 Dec 2010 12:09:53 -0600 Subject: powerpc/8xxx: Refactor SRIO initialization into common code Moved the SRIO init out of corenet_ds and into common code for 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe controllers for SRIO. We utilize the fact that SRIO is over serdes to determine if its configured or not and thus can setup the LAWs needed for it dynamically. We additionally update the device tree (to remove the SRIO nodes) if the board doesn't have SRIO enabled. Introduced the following standard defines for board config.h: CONFIG_SYS_SRIO - Chip has SRIO or not CONFIG_SRIO1 - Board has SRIO 1 port available CONFIG_SRIO2 - Board has SRIO 2 port available (where 'n' is the port #) CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup) CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup) [ These mimic what we have for PCI and PCIe controllers ] Signed-off-by: Kumar Gala Acked-by: Wolfgang Denk --- arch/powerpc/cpu/mpc85xx/fdt.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/cpu/mpc85xx/fdt.c') diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 53e059655..00fa75299 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -1,5 +1,5 @@ /* - * Copyright 2007-2010 Freescale Semiconductor, Inc. + * Copyright 2007-2011 Freescale Semiconductor, Inc. * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -38,6 +38,7 @@ DECLARE_GLOBAL_DATA_PTR; extern void ft_qe_setup(void *blob); extern void ft_fixup_num_cores(void *blob); +extern void ft_srio_setup(void *blob); #ifdef CONFIG_MP #include "mp.h" @@ -478,4 +479,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) fdt_fixup_qportals(blob); #endif + +#ifdef CONFIG_SYS_SRIO + ft_srio_setup(blob); +#endif } -- cgit v1.2.3-70-g09d2