From de9d2e3d60dba1ab775ad67032b5afa00086f53f Mon Sep 17 00:00:00 2001 From: Laurence Withers Date: Mon, 30 Jul 2012 23:30:36 +0000 Subject: DaVinci DA8xx: replace magic number for DDR speed Replace a magic number for the DDR2/mDDR PHY clock ID with a proper definition. In addition, don't request this clock ID on DA830 hardware, which does not have a DDR2/mDDR PHY (or associated PLL controller). Signed-off-by: Laurence Withers Cc: Tom Rini Cc: Prabhakar Lad --- arch/arm/cpu/arm926ejs/davinci/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/cpu/arm926ejs/davinci/cpu.c') diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c b/arch/arm/cpu/arm926ejs/davinci/cpu.c index 6cb857aef..41201d0a4 100644 --- a/arch/arm/cpu/arm926ejs/davinci/cpu.c +++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c @@ -194,7 +194,8 @@ int set_cpu_clk_info(void) #ifdef CONFIG_SOC_DA8XX gd->bd->bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 1000000; /* DDR PHY uses an x2 input clock */ - gd->bd->bi_ddr_freq = clk_get(0x10001) / 1000000; + gd->bd->bi_ddr_freq = cpu_is_da830() ? 0 : + (clk_get(DAVINCI_DDR_CLKID) / 1000000); #else unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE; -- cgit v1.2.3-70-g09d2