1 files changed, 22 insertions, 30 deletions

diff --git a/post/lib_powerpc/multi.c b/post/lib_powerpc/multi.c
index 584561684..e9814a6b0 100644
--- a/post/lib_powerpc/multi.c
+++ b/post/lib_powerpc/multi.c
@@ -27,9 +27,9 @@
  * CPU test
  * Load/store multiple word instructions:	lmw, stmw
  *
- * 26 consecutive words are loaded from a source memory buffer
- * into GPRs r6 through r31. After that, 26 consecutive words are stored
- * from the GPRs r6 through r31 into a target memory buffer. The contents
+ * 27 consecutive words are loaded from a source memory buffer
+ * into GPRs r5 through r31. After that, 27 consecutive words are stored
+ * from the GPRs r5 through r31 into a target memory buffer. The contents
  * of the source and target buffers are then compared.
  */
 
@@ -38,45 +38,37 @@
 
 #if CONFIG_POST & CONFIG_SYS_POST_CPU
 
-extern void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2);
+extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2);
 
-int cpu_post_test_multi (void)
+int cpu_post_test_multi(void)
 {
-    int ret = 0;
-    unsigned int i;
-    int flag = disable_interrupts();
+	int ret = 0;
+	unsigned int i;
+	ulong src[27], dst[27];
+	int flag = disable_interrupts();
 
-    if (ret == 0)
-    {
-	ulong src [26], dst [26];
-
-	ulong code[] =
-	{
-	    ASM_LMW(5, 3, 0),
-	    ASM_STMW(5, 4, 0),
-	    ASM_BLR,
+	ulong code[] = {
+		ASM_LMW(5, 3, 0),	/* lmw	r5, 0(r3)	*/
+		ASM_STMW(5, 4, 0),	/* stmr	r5, 0(r4)	*/
+		ASM_BLR,		/* blr			*/
 	};
 
-	for (i = 0; i < ARRAY_SIZE(src); ++i)
-	{
-	    src[i] = i;
-	    dst[i] = 0;
+	for (i = 0; i < ARRAY_SIZE(src); ++i) {
+		src[i] = i;
+		dst[i] = 0;
 	}
 
-	cpu_post_exec_02(code, (ulong)src, (ulong)dst);
+	cpu_post_exec_02(code, (ulong) src, (ulong) dst);
 
 	ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1;
-    }
 
-    if (ret != 0)
-    {
-	post_log ("Error at multi test !\n");
-    }
+	if (ret != 0)
+		post_log("Error at multi test !\n");
 
-    if (flag)
-	enable_interrupts();
+	if (flag)
+		enable_interrupts();
 
-    return ret;
+	return ret;
 }
 
 #endif