diff options
Diffstat (limited to 'lib_ppc')
| -rw-r--r-- | lib_ppc/bat_rw.c | 28 | ||||
| -rw-r--r-- | lib_ppc/board.c | 40 | ||||
| -rw-r--r-- | lib_ppc/cache.c | 6 |
3 files changed, 49 insertions, 25 deletions
diff --git a/lib_ppc/bat_rw.c b/lib_ppc/bat_rw.c index a40b377bc..c48c24015 100644 --- a/lib_ppc/bat_rw.c +++ b/lib_ppc/bat_rw.c @@ -27,14 +27,23 @@ #include <asm/mmu.h> #include <asm/io.h> +#ifdef CONFIG_ADDR_MAP +#include <addr_map.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) { + int batn = -1; + sync(); switch (bat) { case DBAT0: mtspr (DBAT0L, lower); mtspr (DBAT0U, upper); + batn = 0; break; case IBAT0: mtspr (IBAT0L, lower); @@ -43,6 +52,7 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) case DBAT1: mtspr (DBAT1L, lower); mtspr (DBAT1U, upper); + batn = 1; break; case IBAT1: mtspr (IBAT1L, lower); @@ -51,6 +61,7 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) case DBAT2: mtspr (DBAT2L, lower); mtspr (DBAT2U, upper); + batn = 2; break; case IBAT2: mtspr (IBAT2L, lower); @@ -59,6 +70,7 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) case DBAT3: mtspr (DBAT3L, lower); mtspr (DBAT3U, upper); + batn = 3; break; case IBAT3: mtspr (IBAT3L, lower); @@ -68,6 +80,7 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) case DBAT4: mtspr (DBAT4L, lower); mtspr (DBAT4U, upper); + batn = 4; break; case IBAT4: mtspr (IBAT4L, lower); @@ -76,6 +89,7 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) case DBAT5: mtspr (DBAT5L, lower); mtspr (DBAT5U, upper); + batn = 5; break; case IBAT5: mtspr (IBAT5L, lower); @@ -84,6 +98,7 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) case DBAT6: mtspr (DBAT6L, lower); mtspr (DBAT6U, upper); + batn = 6; break; case IBAT6: mtspr (IBAT6L, lower); @@ -92,6 +107,7 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) case DBAT7: mtspr (DBAT7L, lower); mtspr (DBAT7U, upper); + batn = 7; break; case IBAT7: mtspr (IBAT7L, lower); @@ -102,6 +118,18 @@ int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) return (-1); } +#ifdef CONFIG_ADDR_MAP + if ((gd->flags & GD_FLG_RELOC) && (batn >= 0)) { + phys_size_t size; + if (!BATU_VALID(upper)) + size = 0; + else + size = BATU_SIZE(upper); + addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower), + size, batn); + } +#endif + sync(); isync(); diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 289a32a64..3bcfb4531 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -38,9 +38,6 @@ #if defined(CONFIG_CMD_IDE) #include <ide.h> #endif -#if defined(CONFIG_CMD_SATA) -#include <sata.h> -#endif #if defined(CONFIG_CMD_SCSI) #include <scsi.h> #endif @@ -51,6 +48,9 @@ #include <status_led.h> #endif #include <net.h> +#ifdef CONFIG_GENERIC_MMC +#include <mmc.h> +#endif #include <serial.h> #ifdef CONFIG_SYS_ALLOC_DPRAM #if !defined(CONFIG_CPM2) @@ -75,6 +75,10 @@ #include <keyboard.h> #endif +#ifdef CONFIG_ADDR_MAP +#include <asm/mmu.h> +#endif + #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE extern int update_flash_size (int flash_size); #endif @@ -351,9 +355,6 @@ init_fnc_t *init_sequence[] = { NULL, /* Terminate this list */ }; -#ifndef CONFIG_MAX_MEM_MAPPED -#define CONFIG_MAX_MEM_MAPPED (256 << 20) -#endif ulong get_effective_memsize(void) { #ifndef CONFIG_VERY_BIG_RAM @@ -635,16 +636,6 @@ void board_init_f (ulong bootflag) /* NOTREACHED - relocate_code() does not return */ } -int __is_sata_supported(void) -{ - /* For some boards, when sata disabled by the switch, and the - * driver still access the sata registers, the cpu will hangup. - * please define platform specific is_sata_supported() if your - * board have such issue.*/ - return 1; -} -int is_sata_supported(void) __attribute__((weak, alias("__is_sata_supported"))); - /************************************************************************ * * This is the next part if the initialization sequence: we are now @@ -694,6 +685,10 @@ void board_init_r (gd_t *id, ulong dest_addr) */ trap_init (dest_addr); +#ifdef CONFIG_ADDR_MAP + init_addr_map(); +#endif + #if defined(CONFIG_BOARD_EARLY_INIT_R) board_early_init_r (); #endif @@ -1083,6 +1078,12 @@ void board_init_r (gd_t *id, ulong dest_addr) scsi_init (); #endif +#ifdef CONFIG_GENERIC_MMC + WATCHDOG_RESET (); + puts ("MMC: "); + mmc_initialize (bd); +#endif + #if defined(CONFIG_CMD_DOC) WATCHDOG_RESET (); puts ("DOC: "); @@ -1144,13 +1145,6 @@ void board_init_r (gd_t *id, ulong dest_addr) #endif #endif -#if defined(CONFIG_CMD_SATA) - if (is_sata_supported()) { - puts("SATA: "); - sata_initialize(); - } -#endif - #ifdef CONFIG_LAST_STAGE_INIT WATCHDOG_RESET (); /* diff --git a/lib_ppc/cache.c b/lib_ppc/cache.c index 1292b71e6..338b08bd7 100644 --- a/lib_ppc/cache.c +++ b/lib_ppc/cache.c @@ -33,14 +33,16 @@ void flush_cache(ulong start_addr, ulong size) start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1); end = start_addr + size - 1; - for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) { + for (addr = start; (addr <= end) && (addr >= start); + addr += CONFIG_SYS_CACHELINE_SIZE) { asm volatile("dcbst 0,%0" : : "r" (addr) : "memory"); WATCHDOG_RESET(); } /* wait for all dcbst to complete on bus */ asm volatile("sync" : : : "memory"); - for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) { + for (addr = start; (addr <= end) && (addr >= start); + addr += CONFIG_SYS_CACHELINE_SIZE) { asm volatile("icbi 0,%0" : : "r" (addr) : "memory"); WATCHDOG_RESET(); } |