diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/zynq.h | 6 | ||||
| -rw-r--r-- | include/xilinx.h | 4 | ||||
| -rw-r--r-- | include/zynqpl.h | 59 | 
3 files changed, 69 insertions, 0 deletions
| diff --git a/include/configs/zynq.h b/include/configs/zynq.h index f1f182edf..38f04f642 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -88,6 +88,12 @@  # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */  #endif +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA +  #define CONFIG_BOOTP_SERVERIP  #define CONFIG_BOOTP_BOOTPATH  #define CONFIG_BOOTP_GATEWAY diff --git a/include/xilinx.h b/include/xilinx.h index 5f25b7a8a..592cbea1f 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -33,10 +33,12 @@  #define CONFIG_SYS_VIRTEX_E			CONFIG_SYS_FPGA_DEV( 0x2 )  #define CONFIG_SYS_VIRTEX2			CONFIG_SYS_FPGA_DEV( 0x4 )  #define CONFIG_SYS_SPARTAN3			CONFIG_SYS_FPGA_DEV( 0x8 ) +#define CONFIG_SYS_ZYNQ				CONFIG_SYS_FPGA_DEV(0x10)  #define CONFIG_SYS_XILINX_SPARTAN2	(CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN2)  #define CONFIG_SYS_XILINX_VIRTEX_E	(CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX_E)  #define CONFIG_SYS_XILINX_VIRTEX2	(CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX2)  #define CONFIG_SYS_XILINX_SPARTAN3	(CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN3) +#define CONFIG_SYS_XILINX_ZYNQ	(CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_ZYNQ)  /* XXX - Add new models here */ @@ -59,6 +61,7 @@ typedef enum {			/* typedef Xilinx_iface */  	jtag_mode,		/* jtag/tap serial (not used ) */  	master_selectmap,	/* master SelectMap (virtex2)           */  	slave_selectmap,	/* slave SelectMap (virtex2)            */ +	devcfg,			/* devcfg interface (zynq) */  	max_xilinx_iface_type	/* insert all new types before this */  } Xilinx_iface;			/* end, typedef Xilinx_iface */ @@ -68,6 +71,7 @@ typedef enum {			/* typedef Xilinx_Family */  	Xilinx_VirtexE,		/* Virtex-E Family */  	Xilinx_Virtex2,		/* Virtex2 Family */  	Xilinx_Spartan3,	/* Spartan-III Family */ +	xilinx_zynq,		/* Zynq Family */  	max_xilinx_type		/* insert all new types before this */  } Xilinx_Family;		/* end, typedef Xilinx_Family */ diff --git a/include/zynqpl.h b/include/zynqpl.h new file mode 100644 index 000000000..bc9b94815 --- /dev/null +++ b/include/zynqpl.h @@ -0,0 +1,59 @@ +/* + * (C) Copyright 2012-2013, Xilinx, Michal Simek + * + * (C) Copyright 2012 + * Joe Hershberger <joe.hershberger@ni.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ZYNQPL_H_ +#define _ZYNQPL_H_ + +#include <xilinx.h> + +extern int zynq_load(Xilinx_desc *desc, const void *image, size_t size); +extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +extern int zynq_info(Xilinx_desc *desc); + +#define XILINX_ZYNQ_7010	0x2 +#define XILINX_ZYNQ_7020	0x7 +#define XILINX_ZYNQ_7030	0xc +#define XILINX_ZYNQ_7045	0x11 + +/* Device Image Sizes */ +#define XILINX_XC7Z010_SIZE	16669920/8 +#define XILINX_XC7Z020_SIZE	32364512/8 +#define XILINX_XC7Z030_SIZE	47839328/8 +#define XILINX_XC7Z045_SIZE	106571232/8 + +/* Descriptor Macros */ +#define XILINX_XC7Z010_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie } + +#define XILINX_XC7Z020_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie } + +#define XILINX_XC7Z030_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie } + +#define XILINX_XC7Z045_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie } + +#endif /* _ZYNQPL_H_ */ |