diff options
Diffstat (limited to 'include')
47 files changed, 1425 insertions, 160 deletions
diff --git a/include/ahci.h b/include/ahci.h index 78a8c55f7..90e850929 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -87,6 +87,11 @@ | PORT_IRQ_DMAS_FIS | PORT_IRQ_PIOS_FIS \ | PORT_IRQ_D2H_REG_FIS +/* PORT_SCR_STAT bits */ +#define PORT_SCR_STAT_DET_MASK 0x3 +#define PORT_SCR_STAT_DET_COMINIT 0x1 +#define PORT_SCR_STAT_DET_PHYRDY 0x3 + /* PORT_CMD bits */ #define PORT_CMD_ATAPI (1 << 24) /* Device is ATAPI */ #define PORT_CMD_LIST_ON (1 << 15) /* cmd list DMA engine running */ @@ -103,29 +108,6 @@ #define AHCI_MAX_PORTS 32 -/* SETFEATURES stuff */ -#define SETFEATURES_XFER 0x03 -#define XFER_UDMA_7 0x47 -#define XFER_UDMA_6 0x46 -#define XFER_UDMA_5 0x45 -#define XFER_UDMA_4 0x44 -#define XFER_UDMA_3 0x43 -#define XFER_UDMA_2 0x42 -#define XFER_UDMA_1 0x41 -#define XFER_UDMA_0 0x40 -#define XFER_MW_DMA_2 0x22 -#define XFER_MW_DMA_1 0x21 -#define XFER_MW_DMA_0 0x20 -#define XFER_SW_DMA_2 0x12 -#define XFER_SW_DMA_1 0x11 -#define XFER_SW_DMA_0 0x10 -#define XFER_PIO_4 0x0C -#define XFER_PIO_3 0x0B -#define XFER_PIO_2 0x0A -#define XFER_PIO_1 0x09 -#define XFER_PIO_0 0x08 -#define XFER_PIO_SLOW 0x00 - #define ATA_FLAG_SATA (1 << 3) #define ATA_FLAG_NO_LEGACY (1 << 4) /* no legacy mode check */ #define ATA_FLAG_MMIO (1 << 6) /* use MMIO, not PIO */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 2a5e5d4ed..7f1628592 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -318,6 +318,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI +#define CONFIG_LIBATA #define CONFIG_SATA_ULI5288 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 #define CONFIG_SYS_SCSI_MAX_LUN 1 diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 05d887050..acd39816b 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -539,6 +539,7 @@ #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI +#define CONFIG_LIBATA #define CONFIG_SATA_ULI5288 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 #define CONFIG_SYS_SCSI_MAX_LUN 1 diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 1553a746c..0b2cf8701 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -326,6 +326,7 @@ #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI +#define CONFIG_LIBATA #define CONFIG_SATA_ULI5288 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 #define CONFIG_SYS_SCSI_MAX_LUN 1 diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 6ca6f6b80..0945ae155 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -412,6 +412,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI +#define CONFIG_LIBATA #define CONFIG_SATA_ULI5288 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 #define CONFIG_SYS_SCSI_MAX_LUN 1 diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index b5078cdb5..785e497f2 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -513,6 +513,7 @@ #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI +#define CONFIG_LIBATA #define CONFIG_SATA_ULI5288 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 #define CONFIG_SYS_SCSI_MAX_LUN 1 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 905bacfa9..862614b5c 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -354,10 +354,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 /* * RapidIO diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index e0a87f8bc..3de30fc28 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -132,7 +132,9 @@ "echo Running uenvcmd ...;" \ "run uenvcmd;" \ "fi;" \ - "run mmcloados;" \ + "if run loaduimage; then " \ + "run mmcloados;" \ + "fi;" \ "fi;\0" \ "spiboot=echo Booting from spi ...; " \ "run spiargs; " \ @@ -171,44 +173,6 @@ "run mmcboot;" \ "run nandboot;" -/* USB Composite download gadget - g_dnl */ -#define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET - -/* USB TI's IDs */ -#define CONFIG_G_DNL_VENDOR_NUM 0x0403 -#define CONFIG_G_DNL_PRODUCT_NUM 0xBD00 -#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" - -/* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION -#define CONFIG_DFU_MMC -#define CONFIG_CMD_DFU -#define DFU_ALT_INFO_MMC \ - "boot part 0 1;" \ - "rootfs part 0 2;" \ - "MLO fat 0 1;" \ - "MLO.raw mmc 100 100;" \ - "u-boot.img.raw mmc 300 400;" \ - "spl-os-args.raw mmc 80 80;" \ - "spl-os-image.raw mmc 900 2000;" \ - "spl-os-args fat 0 1;" \ - "spl-os-image fat 0 1;" \ - "u-boot.img fat 0 1;" \ - "uEnv.txt fat 0 1" -#ifdef CONFIG_NAND -#define CONFIG_DFU_NAND -#define DFU_ALT_INFO_NAND \ - "SPL part 0 1;" \ - "SPL.backup1 part 0 2;" \ - "SPL.backup2 part 0 3;" \ - "SPL.backup3 part 0 4;" \ - "u-boot part 0 5;" \ - "u-boot-spl-os part 0 6;" \ - "kernel part 0 8;" \ - "rootfs part 0 9" -#endif - /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ @@ -228,17 +192,26 @@ /* SPL */ #ifndef CONFIG_NOR_BOOT #define CONFIG_SPL_YMODEM_SUPPORT + +/* CPSW support */ +#define CONFIG_SPL_ETH_SUPPORT + +/* USB gadget RNDIS */ +#define CONFIG_SPL_MUSB_NEW_SUPPORT + +/* General network SPL, both CPSW and USB gadget RNDIS */ #define CONFIG_SPL_NET_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" -#define CONFIG_SPL_ETH_SUPPORT + +/* SPI flash. */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 -#define CONFIG_SPL_MUSB_NEW_SUPPORT + #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" #ifdef CONFIG_NAND @@ -274,13 +247,19 @@ #endif /* - * USB configuration + * USB configuration. We enable MUSB support, both for host and for + * gadget. We set USB0 as peripheral and USB1 as host, based on the + * board schematic and physical port wired to each. Then for host we + * add mass storage support and for gadget we add both RNDIS ethernet + * and DFU. */ #define CONFIG_USB_MUSB_DSPS #define CONFIG_ARCH_MISC_INIT #define CONFIG_MUSB_GADGET #define CONFIG_MUSB_PIO_ONLY #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT +#define CONFIG_USB_GADGET +#define CONFIG_USBDOWNLOAD_GADGET #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MUSB_HOST @@ -298,6 +277,11 @@ #define CONFIG_USB_ETHER #define CONFIG_USB_ETH_RNDIS #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" + +/* USB TI's IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0403 +#define CONFIG_G_DNL_PRODUCT_NUM 0xBD00 +#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" #endif /* CONFIG_MUSB_GADGET */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) @@ -309,6 +293,35 @@ #undef CONFIG_SPL_ETH_SUPPORT #endif +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_CMD_DFU +#define DFU_ALT_INFO_MMC \ + "boot part 0 1;" \ + "rootfs part 0 2;" \ + "MLO fat 0 1;" \ + "MLO.raw mmc 100 100;" \ + "u-boot.img.raw mmc 300 400;" \ + "spl-os-args.raw mmc 80 80;" \ + "spl-os-image.raw mmc 900 2000;" \ + "spl-os-args fat 0 1;" \ + "spl-os-image fat 0 1;" \ + "u-boot.img fat 0 1;" \ + "uEnv.txt fat 0 1" +#ifdef CONFIG_NAND +#define CONFIG_DFU_NAND +#define DFU_ALT_INFO_NAND \ + "SPL part 0 1;" \ + "SPL.backup1 part 0 2;" \ + "SPL.backup2 part 0 3;" \ + "SPL.backup3 part 0 4;" \ + "u-boot part 0 5;" \ + "u-boot-spl-os part 0 6;" \ + "kernel part 0 8;" \ + "rootfs part 0 9" +#endif + /* * Default to using SPI for environment, etc. * 0x000000 - 0x020000 : SPL (128KiB) diff --git a/include/configs/arndale.h b/include/configs/arndale.h new file mode 100644 index 000000000..ed44a0424 --- /dev/null +++ b/include/configs/arndale.h @@ -0,0 +1,255 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Configuration settings for the SAMSUNG Arndale board. + */ + +#ifndef __CONFIG_ARNDALE_H +#define __CONFIG_ARNDALE_H + +/* High Level Configuration Options */ +#define CONFIG_SAMSUNG /* in a SAMSUNG core */ +#define CONFIG_S5P /* S5P Family */ +#define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ +#define CONFIG_EXYNOS5250 + +#include <asm/arch/cpu.h> /* get chip and board defs */ + +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Enable fdt support for Exynos5250 */ +#define CONFIG_ARCH_DEVICE_TREE exynos5250 +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE + +/* Allow tracing to be enabled */ +#define CONFIG_TRACE +#define CONFIG_CMD_TRACE +#define CONFIG_TRACE_BUFFER_SIZE (16 << 20) +#define CONFIG_TRACE_EARLY_SIZE (8 << 20) +#define CONFIG_TRACE_EARLY +#define CONFIG_TRACE_EARLY_ADDR 0x50000000 + +/* Keep L2 Cache Disabled */ +#define CONFIG_SYS_DCACHE_OFF + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CONFIG_SYS_TEXT_BASE 0x43E00000 + +/* input clock of PLL: SMDK5250 has 24MHz input clock */ +#define CONFIG_SYS_CLK_FREQ 24000000 + +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG +#define CONFIG_CMDLINE_EDITING + +/* Power Down Modes */ +#define S5P_CHECK_SLEEP 0x00000BAD +#define S5P_CHECK_DIDLE 0xBAD00000 +#define S5P_CHECK_LPA 0xABAD0000 + +/* Offset for inform registers */ +#define INFORM0_OFFSET 0x800 +#define INFORM1_OFFSET 0x804 + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) + +/* select serial console configuration */ +#define CONFIG_BAUDRATE 115200 +#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 +#define CONFIG_SILENT_CONSOLE + +/* Console configuration */ +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define EXYNOS_DEVICE_SETTINGS \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXYNOS_DEVICE_SETTINGS + +/* SD/MMC configuration */ +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_S5P_SDHCI +#define CONFIG_DWMMC +#define CONFIG_EXYNOS_DWMMC +#define CONFIG_SUPPORT_EMMC_BOOT + + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* PWM */ +#define CONFIG_PWM + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Command definition*/ +#include <config_cmd_default.h> + +#define CONFIG_CMD_PING +#define CONFIG_CMD_ELF +#define CONFIG_CMD_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_NET +#define CONFIG_CMD_HASH + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +/* USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_EXYNOS +#define CONFIG_USB_STORAGE + +/* MMC SPL */ +#define CONFIG_SPL +#define COPY_BL2_FNPTR_ADDR 0x02020030 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT + +/* specific .lds file */ +#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" +#define CONFIG_SPL_TEXT_BASE 0x02023400 +#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) + +#define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT "ARNDALE # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) + +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_RD_LVL + +#define CONFIG_NR_DRAM_BANKS 8 +#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE + +#define CONFIG_SYS_MONITOR_BASE 0x00000000 + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_IDENT_STRING " for ARNDALE" + +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SECURE_BL1_ONLY + +/* Secure FW size configuration */ +#ifdef CONFIG_SECURE_BL1_ONLY +#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ +#else +#define CONFIG_SEC_FW_SIZE 0 +#endif + +/* Configuration of BL1, BL2, ENV Blocks on mmc */ +#define CONFIG_RES_BLOCK_SIZE (512) +#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ +#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ +#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ + +#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) +#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) +#define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) + +/* U-boot copy size from boot Media to DRAM.*/ +#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) +#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) + +#define CONFIG_SPI_BOOTING +#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 +#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_PART +#define CONFIG_PARTITION_UUIDS + + +#define CONFIG_IRAM_STACK 0x02050000 + +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK + +/* I2C */ +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_HARD_I2C +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 Kbps */ +#define CONFIG_DRIVER_S3C24X0_I2C +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_MAX_I2C_NUM 8 +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_I2C_EDID + +/* PMIC */ +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_PMIC_MAX77686 + +#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-arndale + +/* Ethernet Controllor Driver */ +#ifdef CONFIG_CMD_NET +#define CONFIG_SMC911X +#define CONFIG_SMC911X_BASE 0x5000000 +#define CONFIG_SMC911X_16_BIT +#define CONFIG_ENV_SROM_BANK 1 +#endif /*CONFIG_CMD_NET*/ + +/* Enable PXE Support */ +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_PXE +#define CONFIG_MENU +#endif + +/* Enable devicetree support */ +#define CONFIG_OF_LIBFDT + +/* Enable Time Command */ +#define CONFIG_CMD_TIME + +#endif /* __CONFIG_H */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2aea55567..fc4ecec7a 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -13,6 +13,8 @@ #include <asm/hardware.h> +#define CONFIG_SYS_TEXT_BASE 0x73f00000 + #define CONFIG_AT91_LEGACY #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index be8a28c32..28a79258d 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -122,6 +122,9 @@ #define CONFIG_PMECC_CAP 2 #define CONFIG_PMECC_SECTOR_SIZE 512 #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 + +#define CONFIG_CMD_NAND_TRIMFFS + #endif #define CONFIG_MTD_PARTITIONS diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 2b1533c85..4a2ac9aab 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -11,6 +11,8 @@ #include <asm/hardware.h> +#define CONFIG_SYS_TEXT_BASE 0x26f00000 + /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ @@ -121,7 +123,8 @@ #define CONFIG_ATMEL_NAND_HW_PMECC 1 #define CONFIG_PMECC_CAP 2 #define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 + +#define CONFIG_CMD_NAND_TRIMFFS #define CONFIG_MTD_DEVICE #define CONFIG_CMD_MTDPARTS diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index ac7ed812d..db9eb0f15 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -216,6 +216,8 @@ #define CONFIG_SPL_STACK (0x00010000 + 0x7f00) #define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/ +/* Provide at least 16MB spacing between us and the Linux Kernel image */ +#define CONFIG_SPL_PAD_TO 12320 #define CONFIG_SPL_MAX_FOOTPRINT 12288 #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index c2dcef89c..47215e59a 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -56,6 +56,7 @@ #define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI +#define CONFIG_LIBATA #define CONFIG_SYS_64BIT_LBA #define CONFIG_SATA_INTEL 1 #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 145e7ac92..bdf012b2b 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -21,9 +21,6 @@ #include "tegra114-common.h" -/* Must be off for Dalmore to boot !?!? FIXME */ -#define CONFIG_SYS_DCACHE_OFF - /* Enable fdt support for Dalmore. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra114-dalmore #define CONFIG_OF_CONTROL diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 58786ffa9..4fbe768cb 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -26,21 +26,19 @@ #include <configs/omap5_common.h> /* CPSW Ethernet */ -#define CONFIG_CMD_NET +#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING -#define CONFIG_CMD_MII -#define CONFIG_DRIVER_TI_CPSW -#define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI -#define CONFIG_PHY_GIGE +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII +#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ +#define CONFIG_MII /* Required in net/eth.c */ +#define CONFIG_PHY_GIGE /* per-board part of CPSW */ #define CONFIG_PHYLIB #define CONFIG_PHY_ADDR 2 diff --git a/include/configs/dxr2.h b/include/configs/dxr2.h new file mode 100644 index 000000000..cd553ec55 --- /dev/null +++ b/include/configs/dxr2.h @@ -0,0 +1,94 @@ +/* + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_DXR2_H +#define __CONFIG_DXR2_H + +#define CONFIG_SIEMENS_DXR2 +#define MACH_TYPE_DXR2 4315 +#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_DXR2 + +#include "siemens-am33x-common.h" + +#define CONFIG_SYS_MPUCLK 275 +#define DXR2_IOCTRL_VAL 0x18b +#define DDR_PLL_FREQ 266 +#define CONFIG_SPL_AM33XX_DO_NOT_ENABLE_RTC32K + +#define BOARD_DFU_BUTTON_GPIO 27 +#define BOARD_DFU_BUTTON_LED 64 + +#undef CONFIG_DOS_PARTITION +#undef CONFIG_CMD_FAT + + + /* Physical Memory Map */ +#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +/* I2C Configuration */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define EEPROM_ADDR_DDR3 0x90 +#define EEPROM_ADDR_CHIP 0x120 + +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 + +#undef CONFIG_SPL_NET_SUPPORT +#undef CONFIG_SPL_NET_VCI_STRING +#undef CONFIG_SPL_ETH_SUPPORT + +#undef CONFIG_MII +#undef CONFIG_PHY_GIGE +#define CONFIG_PHY_ADDR 0 +#define CONFIG_PHY_SMSC + +#define CONFIG_FACTORYSET + +/* Watchdog */ +#define CONFIG_OMAP_WATCHDOG + +#ifndef CONFIG_SPL_BUILD + +/* Default env settings */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hostname=dxr2\0" \ + "nand_img_size=0x300000\0" \ + "optargs=\0" \ + CONFIG_COMMON_ENV_SETTINGS + +#ifndef CONFIG_RESTORE_FLASH +/* set to negative value for no autoboot */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTCOMMAND \ +"if dfubutton; then " \ + "run dfu_start; " \ + "reset; " \ +"fi;" \ +"if ping ${serverip}; then " \ + "run net_nfs; " \ +"fi;" \ +"run nand_boot;" + +#else +#define CONFIG_BOOTDELAY 0 + +#define CONFIG_BOOTCOMMAND \ + "setenv autoload no; " \ + "dhcp; " \ + "if tftp 80000000 debrick.scr; then " \ + "source 80000000; " \ + "fi" +#endif +#endif /* CONFIG_SPL_BUILD */ +#endif /* ! __CONFIG_DXR2_H */ diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 247e37b6d..ccc7bd0a8 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -39,6 +39,7 @@ #define CONFIG_SYS_TEXT_BASE 0x21f00000 #endif #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ +#define CONFIG_STANDALONE_LOAD_ADDR 0x21000000 #define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */ #define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1 @@ -123,41 +124,40 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C -#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII #define CONFIG_CMD_NAND #define CONFIG_CMD_PING -#define CONFIG_I2C_CMD_NO_FLAT #define CONFIG_I2C_CMD_TREE #define CONFIG_CMD_USB #define CONFIG_CMD_FAT - +#define CONFIG_CMD_UBI +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_UBIFS #define CONFIG_SYS_LONGHELP /* - * Filesystems + * MTD defines */ -#define CONFIG_JFFS2_NAND 1 +#define CONFIG_FLASH_CFI_MTD +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_RBTREE +#define CONFIG_LZO -#ifndef CONFIG_JFFS2_CMDLINE -#define CONFIG_JFFS2_DEV "nand0" -#define CONFIG_JFFS2_PART_OFFSET 0 -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#else -#define MTDIDS_DEFAULT "nor0=0,nand0=1" +#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=atmel_nand" #define MTDPARTS_DEFAULT "mtdparts=" \ - "0:" \ - "384k(U-Boot)," \ - "128k(Env)," \ - "128k(Splash)," \ - "4M(Kernel)," \ - "-(FS)" \ + "physmap-flash.0:" \ + "512k(U-Boot)," \ + "128k(Env)," \ + "128k(Splash)," \ + "4M(Kernel)," \ + "384k(MiniFS)," \ + "-(FS)" \ ";" \ - "1:" \ - "-(jffs2)" -#endif /* CONFIG_JFFS2_CMDLINE */ - + "atmel_nand:" \ + "1M(emergency)," \ + "-(data)" /* * Hardware drivers */ @@ -328,7 +328,7 @@ #define CONFIG_BOOTDELAY 5 #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x80000) #define CONFIG_ENV_SIZE 0x20000 /* sectors are 128K here */ #define CONFIG_BAUDRATE 115200 @@ -347,12 +347,14 @@ "displayheight=512\0" \ "displaybsteps=1023\0" \ "ubootaddr=10000000\0" \ - "splashimage=10080000\0" \ - "kerneladdr=100A0000\0" \ + "splashimage=100A0000\0" \ + "kerneladdr=100C0000\0" \ "kernelsize=00400000\0" \ - "rootfsaddr=104A0000\0" \ + "rootfsaddr=10520000\0" \ "copy_addr=21200000\0" \ - "rootfssize=00B60000\0" \ + "rootfssize=00AE0000\0" \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ "bootargsdefaults=set bootargs " \ "console=ttyS0,115200 " \ "video=vcxk_fb:xres:${displaywidth}," \ @@ -373,15 +375,15 @@ "erase $(rootfsaddr) +$(rootfssize);" \ "cp.b $(fileaddr) $(rootfsaddr) $(filesize);" \ "\0" \ - "update_uboot=protect off 10000000 1005FFFF;" \ + "update_uboot=protect off 10000000 1007FFFF;" \ "dhcp $(copy_addr) u-boot_eb_cpux9k2;" \ - "erase 10000000 1005FFFF;" \ + "erase 10000000 1007FFFF;" \ "cp.b $(fileaddr) $(ubootaddr) $(filesize);" \ - "protect on 10000000 1005FFFF;reset\0" \ + "protect on 10000000 1007FFFF;reset\0" \ "update_splash=protect off $(splashimage) +20000;" \ "dhcp $(copy_addr) splash_eb_cpux9k2.bmp;" \ "erase $(splashimage) +20000;" \ - "cp.b $(fileaddr) 10080000 $(filesize);" \ + "cp.b $(fileaddr) $(splashimage) $(filesize);" \ "protect on $(splashimage) +20000;reset\0" \ "emergency=run bootargsdefaults;" \ "set bootargs $(bootargs) root=initramfs boot=emergency " \ diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 8f8f85f44..8c21909d6 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -13,7 +13,7 @@ #define CONFIG_SAMSUNG /* in a SAMSUNG core */ #define CONFIG_S5P /* S5P Family */ #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ -#define CONFIG_SMDK5250 /* which is in a SMDK5250 */ +#define CONFIG_EXYNOS5250 #include <asm/arch/cpu.h> /* get chip and board defs */ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index a5743d63d..afb6e64e1 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -39,6 +39,7 @@ #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c #define CONFIG_MISC_INIT_R +#define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index 722c56652..9982cf6e9 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -45,6 +45,7 @@ #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD /* * NS16550 Configuration diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 8f5eb956a..96f3ba5a1 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -565,6 +565,7 @@ #define CONFIG_SYS_GPIO_PHY1_RST 12 #define CONFIG_SYS_GPIO_FLASH_WP 14 #define CONFIG_SYS_GPIO_PHY0_RST 22 +#define CONFIG_SYS_GPIO_PERM_VOLT_FEED 49 #define CONFIG_SYS_GPIO_DSPIC_READY 51 #define CONFIG_SYS_GPIO_CAN_ENABLE 53 #define CONFIG_SYS_GPIO_LSB_ENABLE 54 @@ -577,6 +578,13 @@ #define CONFIG_SYS_GPIO_SYSMON_STATUS 62 #define CONFIG_SYS_GPIO_WATCHDOG 63 +/* On LCD4, GPIO49 has to be configured to 0 instead of 1 */ +#ifdef CONFIG_LCD4_LWMON5 +#define GPIO49_VAL 0 +#else +#define GPIO49_VAL 1 +#endif + /* * PPC440 GPIO Configuration */ @@ -635,7 +643,7 @@ {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 UIC_IRQ(7) DMA_REQ(0) */ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO47 UIC_IRQ(8) DMA_ACK(0) */ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO48 UIC_IRQ(9) DMA_EOT/TC(0) */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO49 Unselect via TraceSelect Bit */ \ +{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO49_VAL}, /* GPIO49 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN, GPIO_SEL , GPIO_OUT_0}, /* GPIO50 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52 Unselect via TraceSelect Bit */ \ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index a68416650..124dc1e6c 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -119,11 +119,16 @@ /* GPIO */ #define CONFIG_MXS_GPIO -/* DUART Serial Driver */ +/* + * DUART Serial Driver. + * Conflicts with AUART driver which can be set by board. + */ +#ifndef CONFIG_MXS_AUART #define CONFIG_PL011_SERIAL #define CONFIG_PL011_CLOCK 24000000 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } #define CONFIG_CONS_INDEX 0 +#endif /* Default baudrate can be overriden by board! */ #ifndef CONFIG_BAUDRATE #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index 3da78b657..f40e0b718 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -17,6 +17,7 @@ * High Level Configuration Options */ #define CONFIG_4430SDP 1 /* working with SDP */ +#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_4430SDP #include <configs/omap4_common.h> diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h index 8e82fed23..98ba559c8 100644 --- a/include/configs/omap5_common.h +++ b/include/configs/omap5_common.h @@ -28,9 +28,12 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE +/* + * For the DDR timing information we can either dynamically determine + * the timings to use or use pre-determined timings (based on using the + * dynamic method. Default to the static timing infomation. + */ #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS - -/* Defines for SDRAM init */ #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS @@ -127,9 +130,15 @@ "fi" -/* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40300350 -#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */ +/* + * SPL related defines. The Public RAM memory map the ROM defines the + * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 + * (dra7xx is larger, but we do not need to be larger at this time). We + * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and + * print some information. + */ +#define CONFIG_SPL_TEXT_BASE 0x40300000 +#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_DISPLAY_PRINT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index d10c2b56f..0d1c43c2e 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -17,6 +17,8 @@ "uuid_disk=${uuid_gpt_disk};" \ "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" +#include <configs/omap5_common.h> + #define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 UART3_BASE #define CONFIG_BAUDRATE 115200 @@ -35,14 +37,36 @@ #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART +/* Required support for the TCA642X GPIO we have on the uEVM */ #define CONFIG_TCA642X #define CONFIG_CMD_TCA642X #define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4 #define CONFIG_SYS_I2C_TCA642X_ADDR 0x22 +/* USB UHH support options */ +#define CONFIG_CMD_USB +#define CONFIG_USB_HOST +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_OMAP +#define CONFIG_USB_STORAGE +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET + +#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80 +#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79 + +/* Enabled commands */ +#define CONFIG_CMD_DHCP /* DHCP Support */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_NFS /* NFS support */ + +/* USB Networking options */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX + #define CONSOLEDEV "ttyO2" -#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296 -#include <configs/omap5_common.h> +/* Max time to hold reset on this board, see doc/README.omap-reset-time */ +#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296 #endif /* __CONFIG_OMAP5_EVM_H */ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h new file mode 100644 index 000000000..20b0f9ab4 --- /dev/null +++ b/include/configs/pxm2.h @@ -0,0 +1,153 @@ +/* + * siemens pxm2 + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_PXM2_H +#define __CONFIG_PXM2_H + +#define CONFIG_SIEMENS_PXM2 +#define MACH_TYPE_PXM2 4309 +#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_PXM2 + +#include "siemens-am33x-common.h" + +#define CONFIG_SYS_MPUCLK 720 +#define DXR2_IOCTRL_VAL 0x18b +#define DDR_PLL_FREQ 266 + +#define BOARD_DFU_BUTTON_GPIO 59 +#define BOARD_DFU_BUTTON_LED 117 +#define BOARD_LCD_POWER 111 +#define BOARD_BACK_LIGHT 112 +#define BOARD_TOUCH_POWER 57 + + /* Physical Memory Map */ +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */ + +/* I2C Configuration */ +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 + + +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 + +#undef CONFIG_SPL_NET_SUPPORT +#undef CONFIG_SPL_NET_VCI_STRING +#undef CONFIG_SPL_ETH_SUPPORT + +#define CONFIG_PHY_ADDR 0 +#define CONFIG_PHY_ATHEROS + +#define CONFIG_FACTORYSET + +/* UBI Support */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#endif + +/* Watchdog */ +#define CONFIG_OMAP_WATCHDOG + +#ifndef CONFIG_SPL_BUILD + +/* Default env settings */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hostname=pxm2\0" \ + "nand_img_size=0x500000\0" \ + "optargs=\0" \ + CONFIG_COMMON_ENV_SETTINGS \ + "mmc_dev=0\0" \ + "mmc_root=/dev/mmcblk0p2 rw\0" \ + "mmc_root_fs_type=ext4 rootwait\0" \ + "mmc_load_uimage=" \ + "mmc rescan; " \ + "setenv bootfile uImage;" \ + "fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \ + "loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ + "mmc_args=run bootargs_defaults;" \ + "mtdparts default;" \ + "setenv bootargs ${bootargs} " \ + "root=${mmc_root} ${mtdparts}" \ + "rootfstype=${mmc_root_fs_type} ip=${ip_method} " \ + "eth=${ethaddr} " \ + "\0" \ + "mmc_boot=run mmc_args; " \ + "run mmc_load_uimage; " \ + "bootm ${kloadaddr}\0" \ + "" + +#ifndef CONFIG_RESTORE_FLASH +/* set to negative value for no autoboot */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTCOMMAND \ + "if dfubutton; then " \ + "run dfu_start; " \ + "reset; " \ + "fi; " \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmc_dev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run mmc_load_uimage; then " \ + "run mmc_args;" \ + "bootm ${kloadaddr};" \ + "fi;" \ + "fi;" \ + "run nand_boot;" \ + "if ping ${serverip}; then " \ + "run net_nfs; " \ + "fi; " + +#else +#define CONFIG_BOOTDELAY 0 + +#define CONFIG_BOOTCOMMAND \ + "setenv autoload no; " \ + "dhcp; " \ + "if tftp 80000000 debrick.scr; then " \ + "source 80000000; " \ + "fi" +#endif +#endif /* CONFIG_SPL_BUILD */ + +#define CONFIG_VIDEO +#if defined(CONFIG_VIDEO) +#define CONFIG_VIDEO_DA8XX +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_CMD_BMP +#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE +#define PWM_TICKS 0x1388 +#define PWM_DUTY 0x200 +#endif + +#endif /* ! __CONFIG_PXM2_H */ diff --git a/include/configs/rut.h b/include/configs/rut.h new file mode 100644 index 000000000..7c94644de --- /dev/null +++ b/include/configs/rut.h @@ -0,0 +1,156 @@ +/* + * siemens rut + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_RUT_H +#define __CONFIG_RUT_H + +#define CONFIG_SIEMENS_RUT +#define MACH_TYPE_RUT 4316 +#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT + +#include "siemens-am33x-common.h" + +#define CONFIG_SYS_MPUCLK 600 +#define RUT_IOCTRL_VAL 0x18b +#define DDR_PLL_FREQ 303 + + /* Physical Memory Map */ +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */ + +/* I2C Configuration */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ + +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 + +#undef CONFIG_SPL_NET_SUPPORT +#undef CONFIG_SPL_NET_VCI_STRING +#undef CONFIG_SPL_ETH_SUPPORT + +#define CONFIG_PHY_ADDR 1 +#define CONFIG_PHY_NATSEMI + +#define CONFIG_FACTORYSET + +/* UBI Support */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#endif + +/* Watchdog */ +#define WATCHDOG_TRIGGER_GPIO 14 + +#ifndef CONFIG_SPL_BUILD + +/* Default env settings */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hostname=rut\0" \ + "splashpos=488,352\0" \ + "optargs=fixrtc --no-log consoleblank=0 \0" \ + CONFIG_COMMON_ENV_SETTINGS \ + "mmc_dev=0\0" \ + "mmc_root=/dev/mmcblk0p2 rw\0" \ + "mmc_root_fs_type=ext4 rootwait\0" \ + "mmc_load_uimage=" \ + "mmc rescan; " \ + "setenv bootfile uImage;" \ + "fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \ + "loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ + "mmc_args=run bootargs_defaults;" \ + "mtdparts default;" \ + "setenv bootargs ${bootargs} " \ + "root=${mmc_root} ${mtdparts}" \ + "rootfstype=${mmc_root_fs_type} ip=${ip_method} " \ + "eth=${ethaddr} " \ + "\0" \ + "mmc_boot=run mmc_args; " \ + "run mmc_load_uimage; " \ + "bootm ${kloadaddr}\0" \ + "" + +#ifndef CONFIG_RESTORE_FLASH +/* set to negative value for no autoboot */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmc_dev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run mmc_load_uimage; then " \ + "run mmc_args;" \ + "bootm ${kloadaddr};" \ + "fi;" \ + "fi;" \ + "run nand_boot;" \ + "if ping ${serverip}; then " \ + "run net_nfs; " \ + "fi; " + +#else +#define CONFIG_BOOTDELAY 0 + +#define CONFIG_BOOTCOMMAND \ + "setenv autoload no; " \ + "dhcp; " \ + "if tftp 80000000 debrick.scr; then " \ + "source 80000000; " \ + "fi" +#endif + +#endif /* CONFIG_SPL_BUILD */ + +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_HW_WATCHDOG +#endif + +#define CONFIG_VIDEO +#if defined(CONFIG_VIDEO) +#define CONFIG_VIDEO_DA8XX +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_CMD_BMP +#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE + +#define CONFIG_SPI +#define CONFIG_OMAP3_SPI + +#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */ +#define CONFIG_ARCH_EARLY_INIT_R +#define CONFIG_FORMIKE +#endif + +#endif /* ! __CONFIG_RUT_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d0fafd713..c303244f9 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -29,6 +29,9 @@ /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x30000000 +/* Text Base */ +#define CONFIG_SYS_TEXT_BASE 0x34800000 + #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 10697d627..76fa500ed 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -56,7 +56,6 @@ #define LCD_BPP LCD_COLOR16 #define LCD_OUTPUT_BPP 24 #define CONFIG_LCD_LOGO -#undef LCD_TEST_PATTERN #define CONFIG_LCD_INFO #define CONFIG_LCD_INFO_BELOW_LOGO #define CONFIG_SYS_WHITE_ON_BLACK @@ -112,7 +111,6 @@ #define CONFIG_CMD_NAND #ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_MAX_CHIPS 1 #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 @@ -126,16 +124,19 @@ #define CONFIG_ATMEL_NAND_HW_PMECC #define CONFIG_PMECC_CAP 4 #define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_PMECC_INDEX_TABLE_OFFSET ATMEL_PMECC_INDEX_OFFSET_512 #define CONFIG_CMD_NAND_TRIMFFS #endif /* Ethernet Hardware */ #define CONFIG_MACB #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_MACB_SEARCH_PHY +#define CONFIG_RGMII +#define CONFIG_CMD_MII +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 /* MMC */ #define CONFIG_CMD_MMC @@ -195,7 +196,7 @@ "bootm 0x22000000 - 0x21000000" #define CONFIG_SYS_MMC_ENV_DEV 0 #else -#define CONIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_NOWHERE #endif #ifdef CONFIG_SYS_USE_MMC diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index af3d6ad4e..402703038 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -109,4 +109,9 @@ "stdout=serial\0" \ "stderr=serial\0" +#define CONFIG_GZIP_COMPRESSED +#define CONFIG_BZIP2 +#define CONFIG_LZO +#define CONFIG_LZMA + #endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h new file mode 100644 index 000000000..5426ee872 --- /dev/null +++ b/include/configs/siemens-am33x-common.h @@ -0,0 +1,461 @@ +/* + * siemens am33x common board options + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_SIEMENS_AM33X_COMMON_H +#define __CONFIG_SIEMENS_AM33X_COMMON_H + +#define CONFIG_AM33XX +#define CONFIG_OMAP +#define CONFIG_OMAP_COMMON + +#include <asm/arch/omap.h> + +#define CONFIG_DMA_COHERENT +#define CONFIG_DMA_COHERENT_SIZE (1 << 20) + +#define CONFIG_ENV_SIZE (0x2000) +#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024) +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT "U-Boot# " +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_SYS_NO_FLASH +#define CONFIG_MACH_TYPE CONFIG_SIEMENS_MACH_TYPE + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_CACHE + +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#ifndef CONFIG_SPL_BUILD +#define CONFIG_ROOTPATH "/opt/eldk" +#endif + +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_IS_NOWHERE + +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_AUTOLOAD "yes" + +/* Clock Defines */ +#define V_OSCK 24000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +/* We set the max number of command args high to avoid HUSH bugs. */ +#define CONFIG_SYS_MAXARGS 32 + +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 512 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * memtest works on 8 MB in DRAM after skipping 32MB from + * start addr of ram disk + */ +#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ + + (8 * 1024 * 1024)) + +#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ +#define CONFIG_SYS_HZ 1000 /* 1ms clock */ + +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_CMD_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 + +#define CONFIG_SPI +#define CONFIG_OMAP3_SPI +#define CONFIG_MTD_DEVICE +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED (75000000) + + /* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ + GENERATED_GBL_DATA_SIZE) + /* Platform/Board specific defs */ +#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* NS16550 Configuration */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK (48000000) +#define CONFIG_SYS_NS16550_COM1 0x44e09000 +#define CONFIG_SYS_NS16550_COM4 0x481a6000 + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_SERIAL1 1 +#define CONFIG_CONS_INDEX 1 + +/* I2C Configuration */ +#define CONFIG_I2C +#define CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_DRIVER_OMAP24XX_I2C + + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x402F0400 +#define CONFIG_SPL_MAX_SIZE (101 * 1024) +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR + +#define CONFIG_SPL_BSS_START_ADDR 0x80000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ + +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_FS_FAT +#define CONFIG_SPL_I2C_SUPPORT + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT + +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_WATCHDOG_SUPPORT + +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_NAND_AM33XX_BCH +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 + +#define CONFIG_SYS_NAND_ECCSTEPS 4 +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 + +/* + * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM + * 64 bytes before this address should be set aside for u-boot.img's + * header. That is 0x800FFFC0--0x80100000 should not be used for any + * other needs. + */ +#define CONFIG_SYS_TEXT_BASE 0x80100000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 + +/* + * Since SPL did pll and ddr initialization for us, + * we don't need to do it twice. + */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif + +#ifndef CONFIG_SPL_BUILD +/* + * USB configuration + */ +#define CONFIG_USB_MUSB_DSPS +#define CONFIG_ARCH_MISC_INIT +#define CONFIG_MUSB_GADGET +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_MUSB_HOST + +#define CONFIG_AM335X_USB0 +#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL +#define CONFIG_AM335X_USB1 +#define CONFIG_AM335X_USB1_MODE MUSB_HOST +#ifdef CONFIG_MUSB_HOST +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#endif + +#ifdef CONFIG_MUSB_GADGET +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_RNDIS +#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" +#endif /* CONFIG_MUSB_GADGET */ + +#define CONFIG_USB_GADGET +#define CONFIG_USBDOWNLOAD_GADGET + +/* USB TI's IDs */ +#define CONFIG_USBD_HS +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0x4a47 +#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_NAND +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 << 20) + +#endif /* CONFIG_SPL_BUILD */ + +/* + * Default to using SPI for environment, etc. We have multiple copies + * of SPL as the ROM will check these locations. + * 0x0 - 0x20000 : First copy of SPL + * 0x20000 - 0x40000 : Second copy of SPL + * 0x40000 - 0x60000 : Third copy of SPL + * 0x60000 - 0x80000 : Fourth copy of SPL + * 0x80000 - 0xDF000 : U-Boot + * 0xDF000 - 0xE0000 : U-Boot Environment + * 0xE0000 - 0x442000 : Linux Kernel + * 0x442000 - 0x800000 : Userland + */ +#if defined(CONFIG_SPI_BOOT) +# undef CONFIG_ENV_IS_NOWHERE +# define CONFIG_ENV_IS_IN_SPI_FLASH +# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +# define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ +# define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ +#endif /* SPI support */ + +/* Unsupported features */ +#undef CONFIG_USE_IRQ + +#define CONFIG_CMD_NET +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_DRIVER_TI_CPSW +#define CONFIG_MII +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_CMD_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI + +#define CONFIG_NAND +/* NAND support */ +#ifdef CONFIG_NAND +#define CONFIG_CMD_NAND +#define CONFIG_CMD_MTDPARTS + +#define MTDIDS_NAME_STR "omap2-nand.0" +#define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR +#define MTDPARTS_DEFAULT "mtdparts=" MTDIDS_NAME_STR ":" \ + "128k(spl)," \ + "128k(spl.backup1)," \ + "128k(spl.backup2)," \ + "128k(spl.backup3)," \ + "1920k(u-boot)," \ + "128k(uboot.env)," \ + "5120k(kernel_a)," \ + "5120k(kernel_b)," \ + "8192k(mtdoops)," \ + "-(rootfs)" +/* + * chip-size = 256MiB + *| name | size | address area | + *------------------------------------------------------- + *| spl | 128.000 KiB | 0x 0..0x 1ffff | + *| spl.backup1 | 128.000 KiB | 0x 20000..0x 3ffff | + *| spl.backup2 | 128.000 KiB | 0x 40000..0x 5ffff | + *| spl.backup3 | 128.000 KiB | 0x 60000..0x 7ffff | + *| u-boot | 1.875 MiB | 0x 80000..0x 25ffff | + *| uboot.env | 128.000 KiB | 0x 260000..0x 27ffff | + *| kernel_a | 5.000 MiB | 0x 280000..0x 77ffff | + *| kernel_b | 5.000 MiB | 0x 780000..0x c7ffff | + *| mtdoops | 8.000 MiB | 0x c80000..0x 147ffff | + *| rootfs | 235.500 MiB | 0x 1480000..0x fffffff | + *------------------------------------------------------- + */ + +#define DFU_ALT_INFO_NAND \ + "spl part 0 1;" \ + "spl.backup1 part 0 2;" \ + "spl.backup2 part 0 3;" \ + "spl.backup3 part 0 4;" \ + "u-boot part 0 5;" \ + "u-boot.env part 0 6;" \ + "kernel_a part 0 7;" \ + "kernel_b part 0 8;" \ + "rootfs partubi 0 10" + +#define CONFIG_COMMON_ENV_SETTINGS \ + "verify=no \0" \ + "project_dir=systemone\0" \ + "loadaddr=0x82000000\0" \ + "kloadaddr=0x81000000\0" \ + "script_addr=0x81900000\0" \ + "console=console=ttyMTD,mtdoops console=ttyO0,115200n8\0" \ + "active_set=a\0" \ + "nand_active_ubi_vol=rootfs_a\0" \ + "nand_root_fs_type=ubifs rootwait=1\0" \ + "nand_src_addr=0x280000\0" \ + "nand_src_addr_a=0x280000\0" \ + "nand_src_addr_b=0x780000\0" \ + "nfsopts=nolock rw mem=128M\0" \ + "ip_method=none\0" \ + "bootenv=uEnv.txt\0" \ + "bootargs_defaults=setenv bootargs " \ + "console=${console} " \ + "${optargs}\0" \ + "nand_args=run bootargs_defaults;" \ + "mtdparts default;" \ + "setenv nand_active_ubi_vol rootfs_${active_set};" \ + "setenv ${active_set} true;" \ + "if test -n ${a}; then " \ + "setenv nand_src_addr ${nand_src_addr_a};" \ + "fi;" \ + "if test -n ${b}; then " \ + "setenv nand_src_addr ${nand_src_addr_b};" \ + "fi;" \ + "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \ + "ubi.mtd=9,2048;" \ + "setenv bootargs ${bootargs} " \ + "root=${nand_root} noinitrd ${mtdparts} " \ + "rootfstype=${nand_root_fs_type} ip=${ip_method} " \ + "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \ + "=mtdoops\0" \ + "dfu_args=run bootargs_defaults;" \ + "setenv bootargs ${bootargs} ;" \ + "mtdparts default; " \ + "dfu nand 0; \0" \ + "dfu_alt_info=" DFU_ALT_INFO_NAND "\0" \ + "net_args=run bootargs_defaults;" \ + "mtdparts default;" \ + "setenv bootfile ${project_dir}/kernel/uImage;" \ + "setenv rootpath /home/projects/${project_dir}/rootfs;" \ + "setenv bootargs ${bootargs} " \ + "root=/dev/nfs ${mtdparts} " \ + "nfsroot=${serverip}:${rootpath},${nfsopts} " \ + "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ + "${gatewayip}:${netmask}:${hostname}:eth0:off\0" \ + "nand_boot=echo Booting from nand, active set ${active_set} ...; " \ + "run nand_args; " \ + "nand read.i ${kloadaddr} ${nand_src_addr} " \ + "${nand_img_size}; bootm ${kloadaddr}\0" \ + "net_nfs=echo Booting from network ...; " \ + "run net_args; " \ + "tftpboot ${kloadaddr} ${serverip}:${bootfile}; " \ + "bootm ${kloadaddr}\0" \ + "flash_self=run nand_boot\0" \ + "flash_self_test=setenv bootargs_defaults ${bootargs_defaults} test; " \ + "run nand_boot\0" \ + "dfu_start=echo Preparing for dfu mode ...; " \ + "run dfu_args; \0" \ + "preboot=echo; "\ + "echo Type 'run flash_self' to use kernel and root " \ + "filesystem on memory; echo Type 'run flash_self_test' to " \ + "use kernel and root filesystem on memory, boot in test " \ + "mode; echo Not ready yet: 'run flash_nfs' to use kernel " \ + "from memory and root filesystem over NFS; echo Type " \ + "'run net_nfs' to get Kernel over TFTP and mount root " \ + "filesystem over NFS; echo Set active_set variable to 'a' " \ + "or 'b' to select kernel and rootfs partition; " \ + "echo" \ + "\0" + +#define CONFIG_NAND_OMAP_GPMC +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ + /* to access nand at */ + /* CS0 */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND + devices */ +#if !defined(CONFIG_SPI_BOOT) +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#endif +#endif + +#define CONFIG_OMAP_GPIO + +/* Watchdog */ +#define CONFIG_HW_WATCHDOG + +/* Stop autoboot with ESC ESC key detected */ +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b" +#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ + "press \"<Esc><Esc>\" to stop\n", bootdelay + +#endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a572e629d..507a5d309 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -34,6 +34,9 @@ /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x30000000 +/* Text Base */ +#define CONFIG_SYS_TEXT_BASE 0x34800000 + #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index b5a7a9add..06aeba61d 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -11,6 +11,8 @@ /* * High level configuration */ +/* Virtual target or real hardware */ +#define CONFIG_SOCFPGA_VIRTUAL_TARGET #define CONFIG_ARMV7 #define CONFIG_L2_OFF @@ -21,11 +23,12 @@ #define CONFIG_SINGLE_BOOTLOADER #define CONFIG_SOCFPGA +/* base address for .text section */ +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET #define CONFIG_SYS_TEXT_BASE 0x08000040 -#define V_NS16550_CLK 1000000 -#define CONFIG_BAUDRATE 57600 -#define CONFIG_SYS_HZ 1000 -#define CONFIG_TIMER_CLOCK_KHZ 2400 +#else +#define CONFIG_SYS_TEXT_BASE 0x01000040 +#endif #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* Console I/O Buffer Size */ @@ -154,7 +157,7 @@ /* SDRAM Bank #1 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* SDRAM memory size */ -#define PHYS_SDRAM_1_SIZE 0x80000000 +#define PHYS_SDRAM_1_SIZE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_START 0x00000000 @@ -170,8 +173,13 @@ #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK #define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_COM1 UART0_BASE - #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET +#define V_NS16550_CLK 1000000 +#else +#define V_NS16550_CLK 100000000 +#endif +#define CONFIG_BAUDRATE 115200 /* * FLASH @@ -184,9 +192,15 @@ /* This timer use eosc1 where the clock frequency is fixed * throughout any condition */ #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS - /* reload value when timer count to zero */ #define TIMER_LOAD_VAL 0xFFFFFFFF +/* Timer info */ +#define CONFIG_SYS_HZ 1000 +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET +#define CONFIG_TIMER_CLOCK_KHZ 2400 +#else +#define CONFIG_TIMER_CLOCK_KHZ 25000 +#endif #define CONFIG_ENV_IS_NOWHERE diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index ccd68a19f..ba6c6bb9f 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -17,8 +17,6 @@ #define CONFIG_TEGRA /* which is a Tegra generic machine */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - #include <asm/arch/tegra.h> /* get chip and board defs */ /* @@ -135,6 +133,7 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_ENTERRCM #define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD /* Defines for SPL */ #define CONFIG_SPL diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 44e98e501..c3de9a999 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -18,6 +18,9 @@ #define _TEGRA114_COMMON_H_ #include "tegra-common.h" +/* Cortex-A15 uses a cache line size of 64 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 64 + /* * NS16550 Configuration */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index d5e9ee406..b009a316b 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -9,6 +9,9 @@ #define _TEGRA20_COMMON_H_ #include "tegra-common.h" +/* Cortex-A9 uses a cache line size of 32 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + /* * Errata configuration */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 5ac881650..99acbfd28 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -9,6 +9,9 @@ #define _TEGRA30_COMMON_H_ #include "tegra-common.h" +/* Cortex-A9 uses a cache line size of 32 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + /* * Errata configuration */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index fd3ffab01..d2e34aeed 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -28,23 +28,27 @@ #define CONFIG_SYS_NS16550_CLK 48000000 /* Network defines. */ -#define CONFIG_CMD_NET +#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING -#define CONFIG_DRIVER_TI_CPSW -#define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_CMD_PING +#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ +#define CONFIG_MII /* Required in net/eth.c */ -/* SPL defines. */ +/* + * SPL related defines. The Public RAM memory map the ROM defines the + * area between 0x402F0400 and 0x4030B800 as a download area and + * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also + * supports X-MODEM loading via UART, and we leverage this and then use + * Y-MODEM to load u-boot.img, when booted over UART. + */ #define CONFIG_SPL_TEXT_BASE 0x402F0400 -#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_YMODEM_SUPPORT +#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index e0ab6912b..e89e8744d 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -60,12 +60,12 @@ /* I2C IP block */ #define CONFIG_I2C -#define CONFIG_CMD_I2C #define CONFIG_HARD_I2C #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 1 #define CONFIG_I2C_MULTI_BUS #define CONFIG_DRIVER_OMAP24XX_I2C +#define CONFIG_CMD_I2C /* MMC/SD IP block */ #define CONFIG_MMC @@ -87,10 +87,10 @@ * access CS0 at is 0x8000000. */ #ifdef CONFIG_NAND -#define CONFIG_CMD_NAND #define CONFIG_NAND_OMAP_GPMC #define CONFIG_SYS_NAND_BASE 0x8000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_CMD_NAND #endif /* @@ -103,14 +103,18 @@ * console baudrate of 115200 and use the default baud rate table. */ #define CONFIG_SYS_MALLOC_LEN (1024 << 10) -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot# " +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_BAUDRATE 115200 +#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */ +#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */ + +/* As stated above, the following choices are optional. */ +#define CONFIG_SYS_LONGHELP #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_PROMPT "U-Boot# " #define CONFIG_VERSION_VARIABLE -#define CONFIG_ENV_VARS_UBOOT_CONFIG -#define CONFIG_BAUDRATE 115200 /* We set the max number of command args high to avoid HUSH bugs. */ #define CONFIG_SYS_MAXARGS 64 @@ -123,9 +127,6 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_CONSOLE_INFO_QUIET - /* * When we have SPI, NOR or NAND flash we expect to be making use of * mtdparts, both for ease of use in U-Boot and for passing information @@ -141,7 +142,8 @@ * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH * prior to this include, in order to skip a few commands. When we do * have flash, if we expect these commands they must be enabled in that - * config. + * config. If desired, a specific list of desired commands can be used + * instead. */ #include <config_cmd_default.h> #define CONFIG_CMD_ASKENV @@ -223,14 +225,14 @@ #endif #ifdef CONFIG_MMC +#define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT #endif -/* General parts of the framework. */ +/* General parts of the framework, required. */ #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT diff --git a/include/dfu.h b/include/dfu.h index 1d4006de8..47b90559d 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -47,6 +47,8 @@ struct nand_internal_data { unsigned int dev; unsigned int part; + /* for nand/ubi use */ + unsigned int ubi; }; static inline unsigned int get_mmc_blk_size(int dev) diff --git a/include/image.h b/include/image.h index f93a39389..ee6eb8d24 100644 --- a/include/image.h +++ b/include/image.h @@ -212,6 +212,7 @@ struct lmb; #define IH_TYPE_AISIMAGE 13 /* TI Davinci AIS Image */ #define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any load address */ #define IH_TYPE_PBLIMAGE 15 /* Freescale PBL Boot Image */ +#define IH_TYPE_MXSIMAGE 16 /* Freescale MXSBoot Image */ /* * Compression Types diff --git a/include/linux/compat.h b/include/linux/compat.h index e1338bf48..3fdfb399b 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -3,6 +3,14 @@ #define ndelay(x) udelay(1) +#define dev_dbg(dev, fmt, args...) \ + debug(fmt, ##args) +#define dev_vdbg(dev, fmt, args...) \ + debug(fmt, ##args) +#define dev_info(dev, fmt, args...) \ + printf(fmt, ##args) +#define dev_err(dev, fmt, args...) \ + printf(fmt, ##args) #define printk printf #define KERN_EMERG diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h index 73dcf804b..9896e547b 100644 --- a/include/linux/compiler-gcc.h +++ b/include/linux/compiler-gcc.h @@ -50,7 +50,9 @@ #endif #define __deprecated __attribute__((deprecated)) -#define __packed __attribute__((packed)) +#ifndef __packed +# define __packed __attribute__((packed)) +#endif #define __weak __attribute__((weak)) /* @@ -73,8 +75,12 @@ * would be. * [...] */ -#define __pure __attribute__((pure)) -#define __aligned(x) __attribute__((aligned(x))) +#ifndef __pure +# define __pure __attribute__((pure)) +#endif +#ifndef __aligned +# define __aligned(x) __attribute__((aligned(x))) +#endif #define __printf(a,b) __attribute__((format(printf,a,b))) #define noinline __attribute__((noinline)) #define __attribute_const__ __attribute__((__const__)) diff --git a/include/linux/compiler-gcc4.h b/include/linux/compiler-gcc4.h index 94dea3ffb..27d11ca7b 100644 --- a/include/linux/compiler-gcc4.h +++ b/include/linux/compiler-gcc4.h @@ -12,7 +12,9 @@ #define __used __attribute__((__used__)) #define __must_check __attribute__((warn_unused_result)) #define __compiler_offsetof(a,b) __builtin_offsetof(a,b) -#define __always_inline inline __attribute__((always_inline)) +#ifndef __always_inline +# define __always_inline inline __attribute__((always_inline)) +#endif /* * A trick to suppress uninitialized variable warning without generating any diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h index 91b7ba7bd..c98db1b75 100644 --- a/include/power/max77686_pmic.h +++ b/include/power/max77686_pmic.h @@ -139,6 +139,32 @@ enum { EN_LDO = (0x3 << 6), }; +enum { + OPMODE_OFF = 0, + OPMODE_STANDBY, + OPMODE_LPM, + OPMODE_ON, +}; + +int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV); +int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode); +int max77686_set_buck_mode(struct pmic *p, int buck, char opmode); + +#define MAX77686_LDO_VOLT_MAX_HEX 0x3f +#define MAX77686_LDO_VOLT_MASK 0x3f +#define MAX77686_LDO_MODE_MASK 0xc0 +#define MAX77686_LDO_MODE_OFF (0x00 << 0x06) +#define MAX77686_LDO_MODE_STANDBY (0x01 << 0x06) +#define MAX77686_LDO_MODE_LPM (0x02 << 0x06) +#define MAX77686_LDO_MODE_ON (0x03 << 0x06) +#define MAX77686_BUCK_MODE_MASK 0x03 +#define MAX77686_BUCK_MODE_SHIFT_1 0x00 +#define MAX77686_BUCK_MODE_SHIFT_2 0x04 +#define MAX77686_BUCK_MODE_OFF 0x00 +#define MAX77686_BUCK_MODE_STANDBY 0x01 +#define MAX77686_BUCK_MODE_LPM 0x02 +#define MAX77686_BUCK_MODE_ON 0x03 + /* Buck1 1 volt value */ #define MAX77686_BUCK1OUT_1V 0x5 /* Buck1 1.05 volt value */ diff --git a/include/video.h b/include/video.h index f7e27f847..0ff857bc9 100644 --- a/include/video.h +++ b/include/video.h @@ -63,4 +63,8 @@ void video_position_cursor(unsigned col, unsigned row); /* Clear the display */ void video_clear(void); +#if defined(CONFIG_FORMIKE) +int kwh043st20_f01_spi_startup(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode); +#endif #endif |