diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/harmony.h | 4 | ||||
| -rw-r--r-- | include/configs/palmld.h | 3 | ||||
| -rw-r--r-- | include/configs/palmtc.h | 3 | ||||
| -rw-r--r-- | include/configs/paz00.h | 3 | ||||
| -rw-r--r-- | include/configs/s5pc210_universal.h | 36 | ||||
| -rw-r--r-- | include/configs/seaboard.h | 20 | ||||
| -rw-r--r-- | include/configs/smdk5250.h | 46 | ||||
| -rw-r--r-- | include/configs/tec.h | 1 | ||||
| -rw-r--r-- | include/configs/tegra-common-post.h | 39 | ||||
| -rw-r--r-- | include/configs/tegra20-common.h | 3 | ||||
| -rw-r--r-- | include/configs/trats.h | 17 | ||||
| -rw-r--r-- | include/configs/trimslice.h | 4 | ||||
| -rw-r--r-- | include/configs/ventana.h | 3 | ||||
| -rw-r--r-- | include/configs/whistler.h | 3 | ||||
| -rw-r--r-- | include/configs/zipitz2.h | 3 | ||||
| -rw-r--r-- | include/fdtdec.h | 2 | ||||
| -rw-r--r-- | include/i2s.h | 127 | ||||
| -rw-r--r-- | include/lcd.h | 11 | ||||
| -rw-r--r-- | include/ld9040.h | 32 | ||||
| -rw-r--r-- | include/max77686_pmic.h | 158 | ||||
| -rw-r--r-- | include/max8998_pmic.h | 2 | ||||
| -rw-r--r-- | include/sound.h | 62 |
22 files changed, 545 insertions, 37 deletions
diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 040bfe48e..8d1fd47af 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -58,14 +58,16 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* NAND support */ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE /* Environment in NAND (which is 512M), aligned to start of last sector */ #define CONFIG_ENV_IS_IN_NAND diff --git a/include/configs/palmld.h b/include/configs/palmld.h index c5dd49405..3f9802ca0 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -28,6 +28,9 @@ #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ #define CONFIG_PALMLD 1 /* Palm LifeDrive board */ +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_DCACHE_OFF + /* * Environment settings */ diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index 9c948c547..64771e7e8 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -30,6 +30,9 @@ #define CONFIG_CPU_PXA25X 1 /* Intel PXA255 CPU */ #define CONFIG_PALMTC 1 /* Palm Tungsten|C board */ +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_DCACHE_OFF + /* * Environment settings */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 5603de962..38c79cfc2 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -45,8 +45,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 5fc613643..035c27fe9 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -34,6 +34,7 @@ #define CONFIG_S5P 1 /* which is in a S5P Family */ #define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */ #define CONFIG_UNIVERSAL 1 /* working with Universal */ +#define CONFIG_TIZEN 1 /* TIZEN lib */ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -56,6 +57,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_EDITING +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) @@ -261,4 +264,37 @@ #define CONFIG_USB_GADGET_S3C_UDC_OTG #define CONFIG_USB_GADGET_DUALSPEED +/* + * SPI Settings + */ +#define CONFIG_SOFT_SPI +#define CONFIG_SOFT_SPI_MODE SPI_MODE_3 +#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1) +#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3) +#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0) +#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3) + +#define SPI_DELAY udelay(1) +#undef SPI_INIT +#define SPI_SCL(bit) universal_spi_scl(bit) +#define SPI_SDA(bit) universal_spi_sda(bit) +#define SPI_READ universal_spi_read() +#ifndef __ASSEMBLY__ +void universal_spi_scl(int bit); +void universal_spi_sda(int bit); +int universal_spi_read(void); +#endif + +/* + * LCD Settings + */ +#define CONFIG_EXYNOS_FB +#define CONFIG_LCD +#define CONFIG_CMD_BMP +#define CONFIG_BMP_32BPP +#define CONFIG_LD9040 +#define CONFIG_EXYNOS_MIPI_DSIM +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12)) + #endif /* __CONFIG_H */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 74d3b9488..c2d1c6621 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -54,6 +54,7 @@ #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ /* I2C */ #define CONFIG_TEGRA_I2C @@ -71,8 +72,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC @@ -101,10 +105,16 @@ #undef TEGRA_DEVICE_SETTINGS #define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ - "stdout=serial\0" \ - "stderr=serial\0" + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" -#include "tegra-common-post.h" +/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_VIDEO_TEGRA +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 /* NAND support */ #define CONFIG_CMD_NAND @@ -113,6 +123,6 @@ /* Max number of NAND devices */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* Somewhat oddly, the NAND base address must be a config option */ -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE +#include "tegra-common-post.h" + #endif /* __CONFIG_H */ diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index c0f86228b..e412da8c9 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -163,7 +163,6 @@ #undef CONFIG_CMD_IMLS #define CONFIG_IDENT_STRING " for SMDK5250" -#define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SECURE_BL1_ONLY @@ -188,6 +187,11 @@ /* U-boot copy size from boot Media to DRAM.*/ #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) + +#define OM_STAT (0x1f << 1) +#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 +#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) + #define CONFIG_DOS_PARTITION #define CONFIG_IRAM_STACK 0x02050000 @@ -204,6 +208,32 @@ #define CONFIG_MAX_I2C_NUM 8 #define CONFIG_SYS_I2C_SLAVE 0x0 +/* PMIC */ +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_PMIC_MAX77686 + +/* SPI */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SPI_FLASH + +#ifdef CONFIG_SPI_FLASH +#define CONFIG_EXYNOS_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define EXYNOS5_SPI_NUM_CONTROLLERS 5 +#endif + +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_MODE SPI_MODE_0 +#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +#define CONFIG_ENV_SPI_BUS 1 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 +#endif + /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_SMC911X @@ -212,6 +242,20 @@ #define CONFIG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ +/* Enable PXE Support */ +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_PXE +#define CONFIG_MENU +#endif + +/* Sound */ +#define CONFIG_CMD_SOUND +#ifdef CONFIG_CMD_SOUND +#define CONFIG_SOUND +#define CONFIG_I2S +#define CONFIG_SOUND_WM8994 +#endif + /* Enable devicetree support */ #define CONFIG_OF_LIBFDT diff --git a/include/configs/tec.h b/include/configs/tec.h index 140d2e663..200cf6664 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -54,7 +54,6 @@ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE /* Environment in NAND, aligned to start of last sector */ #define CONFIG_ENV_IS_IN_NAND diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 6835155d1..2d0d61dc9 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -30,18 +30,6 @@ #else -#ifdef CONFIG_CMD_EXT2 -#define BOOT_FSTYPE_EXT2 "ext2 " -#else -#define BOOT_FSTYPE_EXT2 "" -#endif - -#ifdef CONFIG_CMD_FAT -#define BOOT_FSTYPE_FAT "fat" -#else -#define BOOT_FSTYPE_FAT "" -#endif - #ifdef CONFIG_CMD_MMC #define BOOTCMDS_MMC \ "mmc_boot=" \ @@ -98,7 +86,7 @@ "rootpart=1\0" \ \ "script_boot=" \ - "if ${fs}load ${devtype} ${devnum}:${rootpart} " \ + "if load ${devtype} ${devnum}:${rootpart} " \ "${scriptaddr} ${prefix}${script}; then " \ "echo ${script} found! Executing ...;" \ "source ${scriptaddr};" \ @@ -106,11 +94,9 @@ \ "scan_boot=" \ "echo Scanning ${devtype} ${devnum}...; " \ - "for fs in ${boot_fstypes}; do " \ - "for prefix in ${boot_prefixes}; do " \ - "for script in ${boot_scripts}; do " \ - "run script_boot; " \ - "done; " \ + "for prefix in ${boot_prefixes}; do " \ + "for script in ${boot_scripts}; do " \ + "run script_boot; " \ "done; " \ "done;\0" \ \ @@ -120,11 +106,6 @@ BOOT_TARGETS_DHCP " " \ "\0" \ \ - "boot_fstypes=" \ - BOOT_FSTYPE_EXT2 " " \ - BOOT_FSTYPE_FAT " " \ - "\0" \ - \ "boot_prefixes=/ /boot/\0" \ \ "boot_scripts=boot.scr.uimg boot.scr\0" \ @@ -207,12 +188,24 @@ #ifdef CONFIG_EFI_PARTITION #undef CONFIG_EFI_PARTITION #endif +#ifdef CONFIG_CMD_FS_GENERIC +#undef CONFIG_CMD_FS_GENERIC +#endif +#ifdef CONFIG_CMD_EXT4 +#undef CONFIG_CMD_EXT4 +#endif #ifdef CONFIG_CMD_EXT2 #undef CONFIG_CMD_EXT2 #endif #ifdef CONFIG_CMD_FAT #undef CONFIG_CMD_FAT #endif +#ifdef CONFIG_FS_EXT4 +#undef CONFIG_FS_EXT4 +#endif +#ifdef CONFIG_FS_FAT +#undef CONFIG_FS_FAT +#endif /* remove USB */ #ifdef CONFIG_USB_EHCI diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 15bd9bb14..72b661a89 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -38,6 +38,9 @@ #include <asm/arch/tegra.h> /* get chip and board defs */ +/* Align LCD to 1MB boundary */ +#define CONFIG_LCD_ALIGNMENT MMU_SECTION_SIZE + /* * Display CPU and Board information */ diff --git a/include/configs/trats.h b/include/configs/trats.h index d7808aa71..a24e94531 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -189,12 +189,17 @@ #define CONFIG_SYS_HZ 1000 -/* TRATS has 2 banks of DRAM */ -#define CONFIG_NR_DRAM_BANKS 2 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ -#define PHYS_SDRAM_1_SIZE (512 << 20) /* 512 MB in CS 0 */ -#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ -#define PHYS_SDRAM_2_SIZE (512 << 20) /* 512 MB in CS 0 */ +/* TRATS has 4 banks of DRAM */ +#define CONFIG_NR_DRAM_BANKS 4 +#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index eeb0dbe23..334d3a3b8 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -69,8 +69,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in SPI */ #define CONFIG_ENV_IS_IN_SPI_FLASH @@ -80,6 +83,7 @@ #define CONFIG_ENV_OFFSET (512 * 1024) /* USB Host support */ +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_STORAGE diff --git a/include/configs/ventana.h b/include/configs/ventana.h index b751d58bc..8f455221c 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -52,8 +52,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/whistler.h b/include/configs/whistler.h index 1c7803b26..1e554d816 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -61,8 +61,11 @@ #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC /* * Environment in eMMC, at the end of 2nd "boot sector". Note: This assumes diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index bf6394a90..b92f70b53 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -41,6 +41,9 @@ #define CONFIG_ENV_ADDR 0x40000 #define CONFIG_ENV_SIZE 0x20000 +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_DCACHE_OFF + #define CONFIG_SYS_MALLOC_LEN (128*1024) #define CONFIG_ARCH_CPU_INIT diff --git a/include/fdtdec.h b/include/fdtdec.h index 0b140752f..64e5cffe8 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -66,6 +66,8 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */ COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra20 Keyboard */ COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ + COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ + COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ COMPAT_COUNT, }; diff --git a/include/i2s.h b/include/i2s.h new file mode 100644 index 000000000..75ae75cf2 --- /dev/null +++ b/include/i2s.h @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * R. Chandrasekar <rcsekar@samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __I2S_H__ +#define __I2S_H__ + +/* + * DAI hardware audio formats. + * + * Describes the physical PCM data formating and clocking. Add new formats + * to the end. + */ +#define SND_SOC_DAIFMT_I2S 1 /* I2S mode */ +#define SND_SOC_DAIFMT_RIGHT_J 2 /* Right Justified mode */ +#define SND_SOC_DAIFMT_LEFT_J 3 /* Left Justified mode */ +#define SND_SOC_DAIFMT_DSP_A 4 /* L data MSB after FRM LRC */ +#define SND_SOC_DAIFMT_DSP_B 5 /* L data MSB during FRM LRC */ +#define SND_SOC_DAIFMT_AC97 6 /* AC97 */ +#define SND_SOC_DAIFMT_PDM 7 /* Pulse density modulation */ + +/* left and right justified also known as MSB and LSB respectively */ +#define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J +#define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J + +/* + * DAI hardware signal inversions. + * + * Specifies whether the DAI can also support inverted clocks for the specified + * format. + */ +#define SND_SOC_DAIFMT_NB_NF (1 << 8) /* normal bit clock + frame */ +#define SND_SOC_DAIFMT_NB_IF (2 << 8) /* normal BCLK + inv FRM */ +#define SND_SOC_DAIFMT_IB_NF (3 << 8) /* invert BCLK + nor FRM */ +#define SND_SOC_DAIFMT_IB_IF (4 << 8) /* invert BCLK + FRM */ + +/* + * DAI hardware clock masters. + * + * This is wrt the codec, the inverse is true for the interface + * i.e. if the codec is clk and FRM master then the interface is + * clk and frame slave. + */ +#define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & FRM master */ +#define SND_SOC_DAIFMT_CBS_CFM (2 << 12) /* codec clk slave & FRM master */ +#define SND_SOC_DAIFMT_CBM_CFS (3 << 12) /* codec clk master & frame slave */ +#define SND_SOC_DAIFMT_CBS_CFS (4 << 12) /* codec clk & FRM slave */ + +#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f +#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 +#define SND_SOC_DAIFMT_INV_MASK 0x0f00 +#define SND_SOC_DAIFMT_MASTER_MASK 0xf000 + +/* + * Master Clock Directions + */ +#define SND_SOC_CLOCK_IN 0 +#define SND_SOC_CLOCK_OUT 1 + +/* I2S Tx Control */ +#define I2S_TX_ON 1 +#define I2S_TX_OFF 0 + +#define FIFO_LENGTH 64 + +/* I2s Registers */ +struct i2s_reg { + unsigned int con; /* base + 0 , Control register */ + unsigned int mod; /* Mode register */ + unsigned int fic; /* FIFO control register */ + unsigned int psr; /* Reserved */ + unsigned int txd; /* Transmit data register */ + unsigned int rxd; /* Receive Data Register */ +}; + +/* This structure stores the i2s related information */ +struct i2stx_info { + unsigned int rfs; /* LR clock frame size */ + unsigned int bfs; /* Bit slock frame size */ + unsigned int audio_pll_clk; /* Audio pll frequency in Hz */ + unsigned int samplingrate; /* sampling rate */ + unsigned int bitspersample; /* bits per sample */ + unsigned int channels; /* audio channels */ + unsigned int base_address; /* I2S Register Base */ +}; + +/* + * Sends the given data through i2s tx + * + * @param pi2s_tx pointer of i2s transmitter parameter structure. + * @param data address of the data buffer + * @param data_size array size of the int buffer (total size / size of int) + * + * @return int value 0 for success, -1 in case of error + */ +int i2s_transfer_tx_data(struct i2stx_info *pi2s_tx, unsigned *data, + unsigned long data_size); + +/* + * Initialise i2s transmiter + * + * @param pi2s_tx pointer of i2s transmitter parameter structure. + * + * @return int value 0 for success, -1 in case of error + */ +int i2s_tx_init(struct i2stx_info *pi2s_tx); + +#endif /* __I2S_H__ */ diff --git a/include/lcd.h b/include/lcd.h index 42070d763..8f8474196 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -57,6 +57,14 @@ extern void lcd_initcolregs (void); extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp); extern int bmp_display(ulong addr, int x, int y); +/** + * Set whether we need to flush the dcache when changing the LCD image. This + * defaults to off. + * + * @param flush non-zero to flush cache after update, 0 to skip + */ +void lcd_set_flush_dcache(int flush); + #if defined CONFIG_MPC823 /* * LCD controller stucture for MPC823 CPU @@ -297,6 +305,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y); /* Allow boards to customize the information displayed */ void lcd_show_board_info(void); +/* Return the size of the LCD frame buffer, and the line length */ +int lcd_get_size(int *line_length); + /************************************************************************/ /* ** BITMAP DISPLAY SUPPORT */ /************************************************************************/ diff --git a/include/ld9040.h b/include/ld9040.h new file mode 100644 index 000000000..fe99390e5 --- /dev/null +++ b/include/ld9040.h @@ -0,0 +1,32 @@ +/* + * ld9040 AMOLED LCD panel driver. + * + * Copyright (C) 2012 Samsung Electronics + * Donghwa Lee <dh09.lee@samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __LD9040_H_ +#define __LD9040_H_ + +void ld9040_cfg_ldo(void); +void ld9040_enable_ldo(unsigned int onoff); + +#endif /* __LD9040_H_ */ diff --git a/include/max77686_pmic.h b/include/max77686_pmic.h new file mode 100644 index 000000000..d949aced0 --- /dev/null +++ b/include/max77686_pmic.h @@ -0,0 +1,158 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Rajeshwari Shinde <rajeshwari.s@samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX77686_H_ +#define __MAX77686_H_ + +enum { + MAX77686_REG_PMIC_ID = 0x0, + MAX77686_REG_PMIC_INTSRC, + MAX77686_REG_PMIC_INT1, + MAX77686_REG_PMIC_INT2, + MAX77686_REG_PMIC_INT1MSK, + MAX77686_REG_PMIC_INT2MSK, + + MAX77686_REG_PMIC_STATUS1, + MAX77686_REG_PMIC_STATUS2, + + MAX77686_REG_PMIC_PWRON, + MAX77686_REG_PMIC_ONOFFDELAY, + MAX77686_REG_PMIC_MRSTB, + + MAX77686_REG_PMIC_BUCK1CRTL = 0x10, + MAX77686_REG_PMIC_BUCK1OUT, + MAX77686_REG_PMIC_BUCK2CTRL1, + MAX77686_REG_PMIC_BUCK234FREQ, + MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_REG_PMIC_BUCK2DVS2, + MAX77686_REG_PMIC_BUCK2DVS3, + MAX77686_REG_PMIC_BUCK2DVS4, + MAX77686_REG_PMIC_BUCK2DVS5, + MAX77686_REG_PMIC_BUCK2DVS6, + MAX77686_REG_PMIC_BUCK2DVS7, + MAX77686_REG_PMIC_BUCK2DVS8, + MAX77686_REG_PMIC_BUCK3CTRL, + MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_REG_PMIC_BUCK3DVS2, + MAX77686_REG_PMIC_BUCK3DVS3, + MAX77686_REG_PMIC_BUCK3DVS4, + MAX77686_REG_PMIC_BUCK3DVS5, + MAX77686_REG_PMIC_BUCK3DVS6, + MAX77686_REG_PMIC_BUCK3DVS7, + MAX77686_REG_PMIC_BUCK3DVS8, + MAX77686_REG_PMIC_BUCK4CTRL1, + MAX77686_REG_PMIC_BUCK4DVS1 = 0x28, + MAX77686_REG_PMIC_BUCK4DVS2, + MAX77686_REG_PMIC_BUCK4DVS3, + MAX77686_REG_PMIC_BUCK4DVS4, + MAX77686_REG_PMIC_BUCK4DVS5, + MAX77686_REG_PMIC_BUCK4DVS6, + MAX77686_REG_PMIC_BUCK4DVS7, + MAX77686_REG_PMIC_BUCK4DVS8, + MAX77686_REG_PMIC_BUCK5CTRL, + MAX77686_REG_PMIC_BUCK5OUT, + MAX77686_REG_PMIC_BUCK6CRTL, + MAX77686_REG_PMIC_BUCK6OUT, + MAX77686_REG_PMIC_BUCK7CRTL, + MAX77686_REG_PMIC_BUCK7OUT, + MAX77686_REG_PMIC_BUCK8CRTL, + MAX77686_REG_PMIC_BUCK8OUT, + MAX77686_REG_PMIC_BUCK9CRTL, + MAX77686_REG_PMIC_BUCK9OUT, + + MAX77686_REG_PMIC_LDO1CTRL1 = 0x40, + MAX77686_REG_PMIC_LDO2CTRL1, + MAX77686_REG_PMIC_LDO3CTRL1, + MAX77686_REG_PMIC_LDO4CTRL1, + MAX77686_REG_PMIC_LDO5CTRL1, + MAX77686_REG_PMIC_LDO6CTRL1, + MAX77686_REG_PMIC_LDO7CTRL1, + MAX77686_REG_PMIC_LDO8CTRL1, + MAX77686_REG_PMIC_LDO9CTRL1, + MAX77686_REG_PMIC_LDO10CTRL1, + MAX77686_REG_PMIC_LDO11CTRL1, + MAX77686_REG_PMIC_LDO12CTRL1, + MAX77686_REG_PMIC_LDO13CTRL1, + MAX77686_REG_PMIC_LDO14CTRL1, + MAX77686_REG_PMIC_LDO15CTRL1, + MAX77686_REG_PMIC_LDO16CTRL1, + MAX77686_REG_PMIC_LDO17CTRL1, + MAX77686_REG_PMIC_LDO18CTRL1, + MAX77686_REG_PMIC_LDO19CTRL1, + MAX77686_REG_PMIC_LDO20CTRL1, + MAX77686_REG_PMIC_LDO21CTRL1, + MAX77686_REG_PMIC_LDO22CTRL1, + MAX77686_REG_PMIC_LDO23CTRL1, + MAX77686_REG_PMIC_LDO24CTRL1, + MAX77686_REG_PMIC_LDO25CTRL1, + MAX77686_REG_PMIC_LDO26CTRL1, + MAX77686_REG_PMIC_LDO1CTRL2, + MAX77686_REG_PMIC_LDO2CTRL2, + MAX77686_REG_PMIC_LDO3CTRL2, + MAX77686_REG_PMIC_LDO4CTRL2, + MAX77686_REG_PMIC_LDO5CTRL2, + MAX77686_REG_PMIC_LDO6CTRL2, + MAX77686_REG_PMIC_LDO7CTRL2, + MAX77686_REG_PMIC_LDO8CTRL2, + MAX77686_REG_PMIC_LDO9CTRL2, + MAX77686_REG_PMIC_LDO10CTRL2, + MAX77686_REG_PMIC_LDO11CTRL2, + MAX77686_REG_PMIC_LDO12CTRL2, + MAX77686_REG_PMIC_LDO13CTRL2, + MAX77686_REG_PMIC_LDO14CTRL2, + MAX77686_REG_PMIC_LDO15CTRL2, + MAX77686_REG_PMIC_LDO16CTRL2, + MAX77686_REG_PMIC_LDO17CTRL2, + MAX77686_REG_PMIC_LDO18CTRL2, + MAX77686_REG_PMIC_LDO19CTRL2, + MAX77686_REG_PMIC_LDO20CTRL2, + MAX77686_REG_PMIC_LDO21CTRL2, + MAX77686_REG_PMIC_LDO22CTRL2, + MAX77686_REG_PMIC_LDO23CTRL2, + MAX77686_REG_PMIC_LDO24CTRL2, + MAX77686_REG_PMIC_LDO25CTRL2, + MAX77686_REG_PMIC_LDO26CTRL2, + + MAX77686_REG_PMIC_BBAT = 0x7e, + MAX77686_REG_PMIC_32KHZ, + + PMIC_NUM_OF_REGS, +}; + +/* I2C device address for pmic max77686 */ +#define MAX77686_I2C_ADDR (0x12 >> 1) + +enum { + REG_DISABLE = 0, + REG_ENABLE +}; + +enum { + LDO_OFF = 0, + LDO_ON, + + DIS_LDO = (0x00 << 6), + EN_LDO = (0x3 << 6), +}; + +#endif /* __MAX77686_PMIC_H_ */ diff --git a/include/max8998_pmic.h b/include/max8998_pmic.h index ca21f882c..0e559f986 100644 --- a/include/max8998_pmic.h +++ b/include/max8998_pmic.h @@ -76,7 +76,9 @@ enum { #define MAX8998_LDO3 (1 << 2) #define MAX8998_LDO4 (1 << 1) +#define MAX8998_LDO7 (1 << 6) #define MAX8998_LDO8 (1 << 5) +#define MAX8998_LDO17 (1 << 4) #define MAX8998_SAFEOUT1 (1 << 4) #define MAX8998_I2C_ADDR (0xCC >> 1) diff --git a/include/sound.h b/include/sound.h new file mode 100644 index 000000000..ea0b1158f --- /dev/null +++ b/include/sound.h @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * R. Chandrasekar < rcsekar@samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SOUND_H__ +#define __SOUND_H__ + +/* sound codec enum */ +enum en_sound_codec { + CODEC_WM_8994, + CODEC_WM_8995, + CODEC_MAX +}; + +/* sound codec enum */ +enum sound_compat { + AUDIO_COMPAT_SPI, + AUDIO_COMPAT_I2C, +}; + +/* Codec information structure to store the info from device tree */ +struct sound_codec_info { + int i2c_bus; + int i2c_dev_addr; + enum en_sound_codec codec_type; +}; + +/* + * Initialises audio sub system + * + * @return int value 0 for success, -1 for error + */ +int sound_init(void); + +/* + * plays the pcm data buffer in pcm_data.h through i2s1 to make the + * sine wave sound + * + * @return int 0 for success, -1 for error + */ +int sound_play(uint32_t msec, uint32_t frequency); + +#endif /* __SOUND__H__ */ |