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-rw-r--r--include/configs/harmony.h10
-rw-r--r--include/configs/medcom.h6
-rw-r--r--include/configs/paz00.h6
-rw-r--r--include/configs/plutux.h6
-rw-r--r--include/configs/seaboard.h20
-rw-r--r--include/configs/tec.h8
-rw-r--r--include/configs/tegra-common-post.h (renamed from include/configs/tegra20-common-post.h)12
-rw-r--r--include/configs/tegra20-common.h12
-rw-r--r--include/configs/trimslice.h8
-rw-r--r--include/configs/ventana.h6
-rw-r--r--include/configs/whistler.h8
11 files changed, 51 insertions, 51 deletions
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 69857dd58..e407ff4ca 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -34,15 +34,15 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (Harmony) # "
-#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Harmony"
+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTD
+#define CONFIG_TEGRA_ENABLE_UARTD
/* UARTD: keyboard satellite board UART, default */
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
-#ifdef CONFIG_TEGRA20_ENABLE_UARTA
+#ifdef CONFIG_TEGRA_ENABLE_UARTA
/* UARTA: debug board UART */
#define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE
#endif
@@ -66,7 +66,7 @@
#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE TEGRA20_NAND_BASE
+#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE
/* Environment in NAND (which is 512M), aligned to start of last sector */
#define CONFIG_ENV_IS_IN_NAND
@@ -87,6 +87,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/medcom.h b/include/configs/medcom.h
index bce03a49f..678b36b6c 100644
--- a/include/configs/medcom.h
+++ b/include/configs/medcom.h
@@ -35,11 +35,11 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (Medcom) # "
-#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Medcom"
+#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */
+#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#define CONFIG_BOARD_EARLY_INIT_F
@@ -78,6 +78,6 @@
"ext2load mmc 0 0x17000000 /boot/uImage;" \
"bootm"
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/paz00.h b/include/configs/paz00.h
index 99b8753c5..24cda4839 100644
--- a/include/configs/paz00.h
+++ b/include/configs/paz00.h
@@ -27,11 +27,11 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (Paz00) MOD # "
-#define CONFIG_TEGRA20_BOARD_STRING "Compal Paz00"
+#define CONFIG_TEGRA_BOARD_STRING "Compal Paz00"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTA
+#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00
@@ -69,6 +69,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/plutux.h b/include/configs/plutux.h
index 42291d4e2..65b42edc2 100644
--- a/include/configs/plutux.h
+++ b/include/configs/plutux.h
@@ -35,11 +35,11 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (Plutux) # "
-#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Plutux"
+#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */
+#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#define CONFIG_BOARD_EARLY_INIT_F
@@ -78,6 +78,6 @@
"ext2load mmc 0 0x17000000 /boot/uImage;" \
"bootm"
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 69965021e..de19e38de 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -27,7 +27,7 @@
#include <asm/sizes.h>
/* LP0 suspend / resume */
-#define CONFIG_TEGRA20_LP0
+#define CONFIG_TEGRA_LP0
#define CONFIG_AES
#define CONFIG_TEGRA_PMU
#define CONFIG_TPS6586X_POWER
@@ -42,11 +42,11 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (SeaBoard) # "
-#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Seaboard"
+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTD
+#define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
@@ -96,15 +96,15 @@
#define CONFIG_CMD_DHCP
/* Enable keyboard */
-#define CONFIG_TEGRA20_KEYBOARD
+#define CONFIG_TEGRA_KEYBOARD
#define CONFIG_KEYBOARD
-#undef TEGRA20_DEVICE_SETTINGS
-#define TEGRA20_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \
- "stdout=serial\0" \
- "stderr=serial\0"
+#undef TEGRA_DEVICE_SETTINGS
+#define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0"
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
/* NAND support */
#define CONFIG_CMD_NAND
@@ -114,5 +114,5 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1
/* Somewhat oddly, the NAND base address must be a config option */
-#define CONFIG_SYS_NAND_BASE TEGRA20_NAND_BASE
+#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE
#endif /* __CONFIG_H */
diff --git a/include/configs/tec.h b/include/configs/tec.h
index 9d14d15f6..d5da3c7a8 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -35,12 +35,12 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (TEC) # "
-#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier"
+#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier"
#define CONFIG_SYS_BOARD_ODMDATA 0x2b0d8011
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */
+#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#define CONFIG_BOARD_EARLY_INIT_F
@@ -55,7 +55,7 @@
#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE TEGRA20_NAND_BASE
+#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE
/* Environment in NAND, aligned to start of last sector */
#define CONFIG_ENV_IS_IN_NAND
@@ -87,6 +87,6 @@
"ext2load mmc 0 0x17000000 /boot/uImage;" \
"bootm"
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/tegra20-common-post.h b/include/configs/tegra-common-post.h
index 42f270f7b..168b64be5 100644
--- a/include/configs/tegra20-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -21,8 +21,8 @@
* MA 02111-1307 USA
*/
-#ifndef __TEGRA20_COMMON_POST_H
-#define __TEGRA20_COMMON_POST_H
+#ifndef __TEGRA_COMMON_POST_H
+#define __TEGRA_COMMON_POST_H
#ifdef CONFIG_BOOTCOMMAND
@@ -141,7 +141,7 @@
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
- TEGRA20_DEVICE_SETTINGS \
+ TEGRA_DEVICE_SETTINGS \
"fdt_load=0x01000000\0" \
"fdt_high=01100000\0" \
BOOTCMDS_COMMON
@@ -174,8 +174,8 @@
#ifdef CONFIG_GENERIC_MMC
#undef CONFIG_GENERIC_MMC
#endif
-#ifdef CONFIG_TEGRA20_MMC
-#undef CONFIG_TEGRA20_MMC
+#ifdef CONFIG_TEGRA_MMC
+#undef CONFIG_TEGRA_MMC
#endif
#ifdef CONFIG_CMD_MMC
#undef CONFIG_CMD_MMC
@@ -211,4 +211,4 @@
#endif /* CONFIG_SPL_BUILD */
-#endif /* __TEGRA20_COMMON_POST_H */
+#endif /* __TEGRA_COMMON_POST_H */
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 02cf0cdc1..098cdb446 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -54,7 +54,7 @@
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_OF_LIBFDT /* enable passing of devicetree */
-#ifdef CONFIG_TEGRA20_LP0
+#ifdef CONFIG_TEGRA_LP0
#define TEGRA_LP0_ADDR 0x1C406000
#define TEGRA_LP0_SIZE 0x2000
#define TEGRA_LP0_VEC \
@@ -132,9 +132,9 @@
/* Environment information, boards can override if required */
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define TEGRA20_DEVICE_SETTINGS "stdin=serial\0" \
- "stdout=serial\0" \
- "stderr=serial\0"
+#define TEGRA_DEVICE_SETTINGS "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0"
#define CONFIG_LOADADDR 0x408000 /* def. location for kernel */
#define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
@@ -157,7 +157,7 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-#define CONFIG_SYS_MEMTEST_START (TEGRA20_SDRC_CS0 + 0x600000)
+#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
#define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */
@@ -169,7 +169,7 @@
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM_1 TEGRA20_SDRC_CS0
+#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
#define CONFIG_SYS_TEXT_BASE 0x0010c000
diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index b3c524981..a46890c09 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -34,12 +34,12 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (TrimSlice) # "
-#define CONFIG_TEGRA20_BOARD_STRING "Compulab Trimslice"
+#define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTA
-#define CONFIG_TEGRA20_UARTA_GPU
+#define CONFIG_TEGRA_ENABLE_UARTA
+#define CONFIG_TEGRA_UARTA_GPU
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE
@@ -94,6 +94,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
index f5e1bf81f..7d3a54f74 100644
--- a/include/configs/ventana.h
+++ b/include/configs/ventana.h
@@ -34,11 +34,11 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (Ventana) # "
-#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Ventana"
+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTD
+#define CONFIG_TEGRA_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_VENTANA
@@ -76,6 +76,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/whistler.h b/include/configs/whistler.h
index 323571815..6c565bae1 100644
--- a/include/configs/whistler.h
+++ b/include/configs/whistler.h
@@ -34,12 +34,12 @@
/* High-level configuration options */
#define V_PROMPT "Tegra20 (Whistler) # "
-#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Whistler"
+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Whistler"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA20_ENABLE_UARTA
-#define CONFIG_TEGRA20_UARTA_UAA_UAB
+#define CONFIG_TEGRA_ENABLE_UARTA
+#define CONFIG_TEGRA_UARTA_UAA_UAB
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER
@@ -90,6 +90,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#include "tegra20-common-post.h"
+#include "tegra-common-post.h"
#endif /* __CONFIG_H */
generated by cgit v1.2.3-70-g09d2 (git 2.51.2) at 2025-10-31 19:57:35 +0000