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Diffstat (limited to 'include/max77686_pmic.h')
| -rw-r--r-- | include/max77686_pmic.h | 158 | 
1 files changed, 158 insertions, 0 deletions
| diff --git a/include/max77686_pmic.h b/include/max77686_pmic.h new file mode 100644 index 000000000..d949aced0 --- /dev/null +++ b/include/max77686_pmic.h @@ -0,0 +1,158 @@ +/* + *  Copyright (C) 2012 Samsung Electronics + *  Rajeshwari Shinde <rajeshwari.s@samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX77686_H_ +#define __MAX77686_H_ + +enum { +	MAX77686_REG_PMIC_ID		= 0x0, +	MAX77686_REG_PMIC_INTSRC, +	MAX77686_REG_PMIC_INT1, +	MAX77686_REG_PMIC_INT2, +	MAX77686_REG_PMIC_INT1MSK, +	MAX77686_REG_PMIC_INT2MSK, + +	MAX77686_REG_PMIC_STATUS1, +	MAX77686_REG_PMIC_STATUS2, + +	MAX77686_REG_PMIC_PWRON, +	MAX77686_REG_PMIC_ONOFFDELAY, +	MAX77686_REG_PMIC_MRSTB, + +	MAX77686_REG_PMIC_BUCK1CRTL	= 0x10, +	MAX77686_REG_PMIC_BUCK1OUT, +	MAX77686_REG_PMIC_BUCK2CTRL1, +	MAX77686_REG_PMIC_BUCK234FREQ, +	MAX77686_REG_PMIC_BUCK2DVS1, +	MAX77686_REG_PMIC_BUCK2DVS2, +	MAX77686_REG_PMIC_BUCK2DVS3, +	MAX77686_REG_PMIC_BUCK2DVS4, +	MAX77686_REG_PMIC_BUCK2DVS5, +	MAX77686_REG_PMIC_BUCK2DVS6, +	MAX77686_REG_PMIC_BUCK2DVS7, +	MAX77686_REG_PMIC_BUCK2DVS8, +	MAX77686_REG_PMIC_BUCK3CTRL, +	MAX77686_REG_PMIC_BUCK3DVS1, +	MAX77686_REG_PMIC_BUCK3DVS2, +	MAX77686_REG_PMIC_BUCK3DVS3, +	MAX77686_REG_PMIC_BUCK3DVS4, +	MAX77686_REG_PMIC_BUCK3DVS5, +	MAX77686_REG_PMIC_BUCK3DVS6, +	MAX77686_REG_PMIC_BUCK3DVS7, +	MAX77686_REG_PMIC_BUCK3DVS8, +	MAX77686_REG_PMIC_BUCK4CTRL1, +	MAX77686_REG_PMIC_BUCK4DVS1	= 0x28, +	MAX77686_REG_PMIC_BUCK4DVS2, +	MAX77686_REG_PMIC_BUCK4DVS3, +	MAX77686_REG_PMIC_BUCK4DVS4, +	MAX77686_REG_PMIC_BUCK4DVS5, +	MAX77686_REG_PMIC_BUCK4DVS6, +	MAX77686_REG_PMIC_BUCK4DVS7, +	MAX77686_REG_PMIC_BUCK4DVS8, +	MAX77686_REG_PMIC_BUCK5CTRL, +	MAX77686_REG_PMIC_BUCK5OUT, +	MAX77686_REG_PMIC_BUCK6CRTL, +	MAX77686_REG_PMIC_BUCK6OUT, +	MAX77686_REG_PMIC_BUCK7CRTL, +	MAX77686_REG_PMIC_BUCK7OUT, +	MAX77686_REG_PMIC_BUCK8CRTL, +	MAX77686_REG_PMIC_BUCK8OUT, +	MAX77686_REG_PMIC_BUCK9CRTL, +	MAX77686_REG_PMIC_BUCK9OUT, + +	MAX77686_REG_PMIC_LDO1CTRL1	= 0x40, +	MAX77686_REG_PMIC_LDO2CTRL1, +	MAX77686_REG_PMIC_LDO3CTRL1, +	MAX77686_REG_PMIC_LDO4CTRL1, +	MAX77686_REG_PMIC_LDO5CTRL1, +	MAX77686_REG_PMIC_LDO6CTRL1, +	MAX77686_REG_PMIC_LDO7CTRL1, +	MAX77686_REG_PMIC_LDO8CTRL1, +	MAX77686_REG_PMIC_LDO9CTRL1, +	MAX77686_REG_PMIC_LDO10CTRL1, +	MAX77686_REG_PMIC_LDO11CTRL1, +	MAX77686_REG_PMIC_LDO12CTRL1, +	MAX77686_REG_PMIC_LDO13CTRL1, +	MAX77686_REG_PMIC_LDO14CTRL1, +	MAX77686_REG_PMIC_LDO15CTRL1, +	MAX77686_REG_PMIC_LDO16CTRL1, +	MAX77686_REG_PMIC_LDO17CTRL1, +	MAX77686_REG_PMIC_LDO18CTRL1, +	MAX77686_REG_PMIC_LDO19CTRL1, +	MAX77686_REG_PMIC_LDO20CTRL1, +	MAX77686_REG_PMIC_LDO21CTRL1, +	MAX77686_REG_PMIC_LDO22CTRL1, +	MAX77686_REG_PMIC_LDO23CTRL1, +	MAX77686_REG_PMIC_LDO24CTRL1, +	MAX77686_REG_PMIC_LDO25CTRL1, +	MAX77686_REG_PMIC_LDO26CTRL1, +	MAX77686_REG_PMIC_LDO1CTRL2, +	MAX77686_REG_PMIC_LDO2CTRL2, +	MAX77686_REG_PMIC_LDO3CTRL2, +	MAX77686_REG_PMIC_LDO4CTRL2, +	MAX77686_REG_PMIC_LDO5CTRL2, +	MAX77686_REG_PMIC_LDO6CTRL2, +	MAX77686_REG_PMIC_LDO7CTRL2, +	MAX77686_REG_PMIC_LDO8CTRL2, +	MAX77686_REG_PMIC_LDO9CTRL2, +	MAX77686_REG_PMIC_LDO10CTRL2, +	MAX77686_REG_PMIC_LDO11CTRL2, +	MAX77686_REG_PMIC_LDO12CTRL2, +	MAX77686_REG_PMIC_LDO13CTRL2, +	MAX77686_REG_PMIC_LDO14CTRL2, +	MAX77686_REG_PMIC_LDO15CTRL2, +	MAX77686_REG_PMIC_LDO16CTRL2, +	MAX77686_REG_PMIC_LDO17CTRL2, +	MAX77686_REG_PMIC_LDO18CTRL2, +	MAX77686_REG_PMIC_LDO19CTRL2, +	MAX77686_REG_PMIC_LDO20CTRL2, +	MAX77686_REG_PMIC_LDO21CTRL2, +	MAX77686_REG_PMIC_LDO22CTRL2, +	MAX77686_REG_PMIC_LDO23CTRL2, +	MAX77686_REG_PMIC_LDO24CTRL2, +	MAX77686_REG_PMIC_LDO25CTRL2, +	MAX77686_REG_PMIC_LDO26CTRL2, + +	MAX77686_REG_PMIC_BBAT		= 0x7e, +	MAX77686_REG_PMIC_32KHZ, + +	PMIC_NUM_OF_REGS, +}; + +/* I2C device address for pmic max77686 */ +#define MAX77686_I2C_ADDR (0x12 >> 1) + +enum { +	REG_DISABLE = 0, +	REG_ENABLE +}; + +enum { +	LDO_OFF = 0, +	LDO_ON, + +	DIS_LDO = (0x00 << 6), +	EN_LDO = (0x3 << 6), +}; + +#endif /* __MAX77686_PMIC_H_ */ |