diff options
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/APC405.h | 10 | ||||
| -rw-r--r-- | include/configs/CPCI750.h | 22 | ||||
| -rw-r--r-- | include/configs/TASREG.h | 6 | ||||
| -rw-r--r-- | include/configs/TQM5200.h | 2 |
4 files changed, 19 insertions, 21 deletions
diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 588f9f601..d46b8445a 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -130,8 +130,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -163,7 +163,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -236,7 +236,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x800 /* 2048 bytes may be used for env vars*/ - /* total size of a CAT24WC16 is 2048 bytes */ + /* total size of a CAT24WC16 is 2048 bytes */ #define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */ #define CFG_NVRAM_SIZE 242 /* NVRAM size */ @@ -262,7 +262,7 @@ * Cache Configuration */ #define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ - /* have only 8kB, 16kB is save here */ + /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h index 45fcee00f..fab263b4b 100644 --- a/include/configs/CPCI750.h +++ b/include/configs/CPCI750.h @@ -145,11 +145,11 @@ | CFG_CMD_PCI \ | CFG_CMD_ELF \ | CFG_CMD_DATE \ - | CFG_CMD_NET \ - | CFG_CMD_PING \ - | CFG_CMD_IDE \ - | CFG_CMD_FAT \ - | CFG_CMD_EXT2 \ + | CFG_CMD_NET \ + | CFG_CMD_PING \ + | CFG_CMD_IDE \ + | CFG_CMD_FAT \ + | CFG_CMD_EXT2 \ ) #define CONFIG_DOS_PARTITION @@ -331,11 +331,11 @@ #define CFG_DEV3_PAR 0x8FCFFFFF /* nvram/can */ #define CFG_BOOT_PAR 0x8FDFFFFF /* 16 bit flash */ - /* c 4 a 8 2 4 1 c */ - /* 33 22|2222|22 22|111 1|11 11|1 1 | | */ - /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */ - /* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */ - /* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */ + /* c 4 a 8 2 4 1 c */ + /* 33 22|2222|22 22|111 1|11 11|1 1 | | */ + /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */ + /* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */ + /* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */ /* MPP Control MV64360 Appendix P P. 632*/ @@ -392,8 +392,6 @@ #define CFG_PCI0_0_MEM_SPACE (CFG_PCI0_MEM_BASE) #define CFG_PCI1_0_MEM_SPACE (CFG_PCI1_MEM_BASE) - - /* PCI I/O MAP section */ #define CFG_PCI0_IO_BASE 0xfa000000 #define CFG_PCI0_IO_SIZE _16M diff --git a/include/configs/TASREG.h b/include/configs/TASREG.h index 2d52a8b50..119bc2442 100644 --- a/include/configs/TASREG.h +++ b/include/configs/TASREG.h @@ -51,9 +51,9 @@ #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \ - CFG_CMD_BSP | \ - CFG_CMD_EEPROM | \ - CFG_CMD_I2C ) & \ + CFG_CMD_BSP | \ + CFG_CMD_EEPROM | \ + CFG_CMD_I2C ) & \ ~(CFG_CMD_NET)) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index f1955a513..595bd292b 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -426,7 +426,7 @@ * use PSC6: * on STK52xx: * use as UART. Pins PSC6_0 to PSC6_3 are used. - Bits 9:11 (mask: 0x00700000): + Bits 9:11 (mask: 0x00700000): * 101 -> PSC6 : Extended POST test is not available * on MINI-FAP and TQM5200_IB: * use PSC6_1 and PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000): |