diff options
Diffstat (limited to 'include/configs/pb1x00.h')
| -rw-r--r-- | include/configs/pb1x00.h | 78 | 
1 files changed, 39 insertions, 39 deletions
| diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index 2caa64173..7c7bebac3 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -53,7 +53,7 @@  #define CONFIG_BAUDRATE		115200  /* valid baudrates */ -#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }  #define	CONFIG_TIMESTAMP		/* Print image info with timestamp */  #undef	CONFIG_BOOTARGS @@ -71,56 +71,56 @@  /*   * Miscellaneous configurable options   */ -#define	CFG_LONGHELP				/* undef to save memory      */ -#define	CFG_PROMPT		"Pb1x00 # "	/* Monitor Command Prompt    */ -#define	CFG_CBSIZE		256		/* Console I/O Buffer Size   */ -#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)  /* Print Buffer Size */ -#define	CFG_MAXARGS		16		/* max number of command args*/ +#define	CONFIG_SYS_LONGHELP				/* undef to save memory      */ +#define	CONFIG_SYS_PROMPT		"Pb1x00 # "	/* Monitor Command Prompt    */ +#define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size   */ +#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)  /* Print Buffer Size */ +#define	CONFIG_SYS_MAXARGS		16		/* max number of command args*/ -#define CFG_MALLOC_LEN		128*1024 +#define CONFIG_SYS_MALLOC_LEN		128*1024 -#define CFG_BOOTPARAMS_LEN	128*1024 +#define CONFIG_SYS_BOOTPARAMS_LEN	128*1024 -#define CFG_MIPS_TIMER_FREQ	396000000 +#define CONFIG_SYS_MIPS_TIMER_FREQ	396000000 -#define CFG_HZ			1000 +#define CONFIG_SYS_HZ			1000 -#define CFG_SDRAM_BASE		0x80000000     /* Cached addr */ +#define CONFIG_SYS_SDRAM_BASE		0x80000000     /* Cached addr */ -#define	CFG_LOAD_ADDR		0x81000000     /* default load address	*/ +#define	CONFIG_SYS_LOAD_ADDR		0x81000000     /* default load address	*/ -#define CFG_MEMTEST_START	0x80100000 -#undef CFG_MEMTEST_START -#define CFG_MEMTEST_START       0x80200000 -#define CFG_MEMTEST_END		0x83800000 +#define CONFIG_SYS_MEMTEST_START	0x80100000 +#undef CONFIG_SYS_MEMTEST_START +#define CONFIG_SYS_MEMTEST_START       0x80200000 +#define CONFIG_SYS_MEMTEST_END		0x83800000  /*-----------------------------------------------------------------------   * FLASH and environment organization   */ -#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks */ -#define CFG_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */  #define PHYS_FLASH_1		0xbec00000 /* Flash Bank #1 */  #define PHYS_FLASH_2		0xbfc00000 /* Flash Bank #2 */  /* The following #defines are needed to get flash environment right */ -#define	CFG_MONITOR_BASE	TEXT_BASE -#define	CFG_MONITOR_LEN		(192 << 10) +#define	CONFIG_SYS_MONITOR_BASE	TEXT_BASE +#define	CONFIG_SYS_MONITOR_LEN		(192 << 10) -#define CFG_INIT_SP_OFFSET	0x4000000 +#define CONFIG_SYS_INIT_SP_OFFSET	0x4000000  /* We boot from this flash, selected with dip switch */ -#define CFG_FLASH_BASE		PHYS_FLASH_2 +#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_2  /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT	(2 * CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT	(2 * CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define	CFG_ENV_IS_NOWHERE	1 +#define	CONFIG_ENV_IS_NOWHERE	1  /* Address and size of Primary Environment Sector	*/ -#define CFG_ENV_ADDR		0xB0030000 -#define CFG_ENV_SIZE		0x10000 +#define CONFIG_ENV_ADDR		0xB0030000 +#define CONFIG_ENV_SIZE		0x10000  #define CONFIG_FLASH_16BIT @@ -140,8 +140,8 @@  /*---ATA PCMCIA ------------------------------------*/  #if 0 -#define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ -#define CFG_PCMCIA_MEM_ADDR 0x20000000 +#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ +#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000  #define CONFIG_PCMCIA_SLOT_A  #define CONFIG_ATAPI 1 @@ -151,32 +151,32 @@  #define CONFIG_IDE_PCMCIA 1  /* We only support one slot for now */ -#define CFG_IDE_MAXBUS		1	/* max. 1 IDE bus		*/ -#define CFG_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/ +#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/ +#define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/  #undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/  #undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/ -#define CFG_ATA_IDE0_OFFSET	0x0000 +#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000 -#define CFG_ATA_BASE_ADDR       CFG_PCMCIA_MEM_ADDR +#define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_PCMCIA_MEM_ADDR  /* Offset for data I/O			*/ -#define CFG_ATA_DATA_OFFSET     8 +#define CONFIG_SYS_ATA_DATA_OFFSET     8  /* Offset for normal register accesses  */ -#define CFG_ATA_REG_OFFSET      0 +#define CONFIG_SYS_ATA_REG_OFFSET      0  /* Offset for alternate registers       */ -#define CFG_ATA_ALT_OFFSET      0x0100 +#define CONFIG_SYS_ATA_ALT_OFFSET      0x0100  #endif  /*-----------------------------------------------------------------------   * Cache Configuration   */ -#define CFG_DCACHE_SIZE		16384 -#define CFG_ICACHE_SIZE		16384 -#define CFG_CACHELINE_SIZE	32 +#define CONFIG_SYS_DCACHE_SIZE		16384 +#define CONFIG_SYS_ICACHE_SIZE		16384 +#define CONFIG_SYS_CACHELINE_SIZE	32  /* |