diff options
Diffstat (limited to 'include/configs/ML2.h')
| -rw-r--r-- | include/configs/ML2.h | 98 | 
1 files changed, 49 insertions, 49 deletions
| diff --git a/include/configs/ML2.h b/include/configs/ML2.h index 11323dbe8..190239732 100644 --- a/include/configs/ML2.h +++ b/include/configs/ML2.h @@ -73,7 +73,7 @@  #endif  #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/ -#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/ +#define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/  /* @@ -111,77 +111,77 @@  /*   * Miscellaneous configurable options   */ -#define CFG_LONGHELP			/* undef to save memory		*/ -#define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/ +#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/ +#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt	*/  #if defined(CONFIG_CMD_KGDB) -#define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/ +#define	CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/  #else -#define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/ +#define	CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size	*/  #endif -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS	16		/* max number of command args	*/ -#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/ +#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/ -#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/ -#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/ +#define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/ +#define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/  /* - * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1. - * If CFG_405_UART_ERRATA_59, then UART divisor is 31. - * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value. + * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. + * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. + * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.   * The Linux BASE_BAUD define should match this configuration.   *    baseBaud = cpuClock/(uartDivisor*16) - * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock, + * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,   * set Linux BASE_BAUD to 403200.   */ -#undef  CFG_EXT_SERIAL_CLOCK           /* external serial clock */ -#undef  CFG_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */ +#undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* external serial clock */ +#undef  CONFIG_SYS_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */ -#define CFG_BASE_BAUD       (3125000*16) -#define CFG_NS16550_CLK CFG_BASE_BAUD -#define CFG_DUART_CHAN		0 -#define CFG_NS16550_COM1	0xa0001003 -#define CFG_NS16550_COM2	0xa0011003 -#define CFG_NS16550_REG_SIZE -4 -#define CFG_NS16550 1 -#define CFG_INIT_CHAN1	 1 -#define CFG_INIT_CHAN2	 1 +#define CONFIG_SYS_BASE_BAUD       (3125000*16) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD +#define CONFIG_SYS_DUART_CHAN		0 +#define CONFIG_SYS_NS16550_COM1	0xa0001003 +#define CONFIG_SYS_NS16550_COM2	0xa0011003 +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550 1 +#define CONFIG_SYS_INIT_CHAN1	 1 +#define CONFIG_SYS_INIT_CHAN2	 1  /* The following table includes the supported baudrates */ -#define CFG_BAUDRATE_TABLE  \ +#define CONFIG_SYS_BAUDRATE_TABLE  \      {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -#define CFG_LOAD_ADDR		0x100000	/* default load address */ -#define CFG_EXTBDINFO		1	/* To use extended board_into (bd_t) */ +#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */ +#define CONFIG_SYS_EXTBDINFO		1	/* To use extended board_into (bd_t) */ -#define	CFG_HZ		1000		/* decrementer freq: 1 ms ticks	*/ +#define	CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks	*/  /*-----------------------------------------------------------------------   * Start addresses for the final memory configuration   * (Set up by the startup code) - * Please note that CFG_SDRAM_BASE _must_ start at 0 + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0   */ -#define CFG_SDRAM_BASE		0x00000000 -#define CFG_FLASH_BASE		0x18000000 -#define CFG_MONITOR_BASE	CFG_FLASH_BASE -#define CFG_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/ -#define CFG_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/ +#define CONFIG_SYS_SDRAM_BASE		0x00000000 +#define CONFIG_SYS_FLASH_BASE		0x18000000 +#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/ +#define CONFIG_SYS_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/  /*   * For booting Linux, the board info and command line data   * have to be in the first 8 MB of memory, since this is   * the maximum mapped by the Linux kernel during initialization.   */ -#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */  /*-----------------------------------------------------------------------   * FLASH organization   */ -#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/ -#define CFG_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/ +#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/ +#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/ -#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/ -#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/ +#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/ +#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/  /* BEG ENVIRONNEMENT FLASH */  #ifdef CONFIG_ENV_IS_IN_FLASH @@ -193,13 +193,13 @@  /*-----------------------------------------------------------------------   * NVRAM organization   */ -#define CFG_NVRAM_BASE_ADDR	0xf0000000	/* NVRAM base address	*/ -#define CFG_NVRAM_SIZE		0x1ff8		/* NVRAM size	*/ +#define CONFIG_SYS_NVRAM_BASE_ADDR	0xf0000000	/* NVRAM base address	*/ +#define CONFIG_SYS_NVRAM_SIZE		0x1ff8		/* NVRAM size	*/  #ifdef CONFIG_ENV_IS_IN_NVRAM  #define CONFIG_ENV_SIZE		0x1000		/* Size of Environment vars	*/  #define CONFIG_ENV_ADDR		\ -	(CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CONFIG_ENV_SIZE)	/* Env	*/ +	(CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE)	/* Env	*/  #endif  /* @@ -208,7 +208,7 @@   * BR0/1 and OR0/1 (FLASH)   */ -#define FLASH_BASE0_PRELIM	CFG_FLASH_BASE	/* FLASH bank #0	*/ +#define FLASH_BASE0_PRELIM	CONFIG_SYS_FLASH_BASE	/* FLASH bank #0	*/  #define FLASH_BASE1_PRELIM	0		/* FLASH bank #1	*/ @@ -219,11 +219,11 @@   * Definitions for initial stack pointer and data area (in DPRAM)   */ -#define CFG_INIT_RAM_ADDR       0x800000  /* inside of SDRAM                     */ -#define CFG_INIT_RAM_END        0x2000  /* End of used area in RAM             */ -#define CFG_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */ -#define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET +#define CONFIG_SYS_INIT_RAM_ADDR       0x800000  /* inside of SDRAM                     */ +#define CONFIG_SYS_INIT_RAM_END        0x2000  /* End of used area in RAM             */ +#define CONFIG_SYS_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET  /*-----------------------------------------------------------------------   * Definitions for Serial Presence Detect EEPROM address |