diff options
Diffstat (limited to 'include/asm-arm/arch-arm720t/netarm_gen_module.h')
| -rw-r--r-- | include/asm-arm/arch-arm720t/netarm_gen_module.h | 86 |
1 files changed, 43 insertions, 43 deletions
diff --git a/include/asm-arm/arch-arm720t/netarm_gen_module.h b/include/asm-arm/arch-arm720t/netarm_gen_module.h index 6ab5cc10f..90d9da817 100644 --- a/include/asm-arm/arch-arm720t/netarm_gen_module.h +++ b/include/asm-arm/arch-arm720t/netarm_gen_module.h @@ -34,32 +34,32 @@ /* GEN unit register offsets */ -#define NETARM_GEN_MODULE_BASE (0xFFB00000) +#define NETARM_GEN_MODULE_BASE (0xFFB00000) #define get_gen_reg_addr(c) ((volatile unsigned int *)(NETARM_GEN_MODULE_BASE + (c))) -#define NETARM_GEN_SYSTEM_CONTROL (0x00) -#define NETARM_GEN_STATUS_CONTROL (0x04) -#define NETARM_GEN_PLL_CONTROL (0x08) -#define NETARM_GEN_SOFTWARE_SERVICE (0x0c) +#define NETARM_GEN_SYSTEM_CONTROL (0x00) +#define NETARM_GEN_STATUS_CONTROL (0x04) +#define NETARM_GEN_PLL_CONTROL (0x08) +#define NETARM_GEN_SOFTWARE_SERVICE (0x0c) -#define NETARM_GEN_TIMER1_CONTROL (0x10) -#define NETARM_GEN_TIMER1_STATUS (0x14) -#define NETARM_GEN_TIMER2_CONTROL (0x18) -#define NETARM_GEN_TIMER2_STATUS (0x1c) +#define NETARM_GEN_TIMER1_CONTROL (0x10) +#define NETARM_GEN_TIMER1_STATUS (0x14) +#define NETARM_GEN_TIMER2_CONTROL (0x18) +#define NETARM_GEN_TIMER2_STATUS (0x1c) -#define NETARM_GEN_PORTA (0x20) -#define NETARM_GEN_PORTB (0x24) -#define NETARM_GEN_PORTC (0x28) +#define NETARM_GEN_PORTA (0x20) +#define NETARM_GEN_PORTB (0x24) +#define NETARM_GEN_PORTC (0x28) -#define NETARM_GEN_INTR_ENABLE (0x30) -#define NETARM_GEN_INTR_ENABLE_SET (0x34) -#define NETARM_GEN_INTR_ENABLE_CLR (0x38) -#define NETARM_GEN_INTR_STATUS_EN (0x34) -#define NETARM_GEN_INTR_STATUS_RAW (0x38) +#define NETARM_GEN_INTR_ENABLE (0x30) +#define NETARM_GEN_INTR_ENABLE_SET (0x34) +#define NETARM_GEN_INTR_ENABLE_CLR (0x38) +#define NETARM_GEN_INTR_STATUS_EN (0x34) +#define NETARM_GEN_INTR_STATUS_RAW (0x38) -#define NETARM_GEN_CACHE_CONTROL1 (0x40) -#define NETARM_GEN_CACHE_CONTROL2 (0x44) +#define NETARM_GEN_CACHE_CONTROL1 (0x40) +#define NETARM_GEN_CACHE_CONTROL2 (0x44) /* select bitfield definitions */ @@ -72,7 +72,7 @@ #define NETARM_GEN_SYS_CFG_BUSHALF (0x20000000) #define NETARM_GEN_SYS_CFG_BUSFULL (0x40000000) -#define NETARM_GEN_SYS_CFG_BCLK_DISABLE (0x10000000) +#define NETARM_GEN_SYS_CFG_BCLK_DISABLE (0x10000000) #define NETARM_GEN_SYS_CFG_WDOG_EN (0x01000000) #define NETARM_GEN_SYS_CFG_WDOG_IRQ (0x00000000) @@ -112,57 +112,57 @@ #define NETARM_GEN_PLL_CTL_PLLCNT_MASK (0x0F000000) #define NETARM_GEN_PLL_CTL_PLLCNT(x) (((x)<<24) & \ - NETARM_GEN_PLL_CTL_PLLCNT_MASK) + NETARM_GEN_PLL_CTL_PLLCNT_MASK) /* Defaults for POLTST and ICP Fields in PLL CTL */ -#define NETARM_GEN_PLL_CTL_OUTDIV(x) (x) -#define NETARM_GEN_PLL_CTL_INDIV(x) ((x)<<6) -#define NETARM_GEN_PLL_CTL_POLTST_DEF (0x00000E00) -#define NETARM_GEN_PLL_CTL_ICP_DEF (0x0000003C) +#define NETARM_GEN_PLL_CTL_OUTDIV(x) (x) +#define NETARM_GEN_PLL_CTL_INDIV(x) ((x)<<6) +#define NETARM_GEN_PLL_CTL_POLTST_DEF (0x00000E00) +#define NETARM_GEN_PLL_CTL_ICP_DEF (0x0000003C) /* Software Service Register ( 0xFFB0_000C ) */ -#define NETARM_GEN_SW_SVC_RESETA (0x123) -#define NETARM_GEN_SW_SVC_RESETB (0x321) +#define NETARM_GEN_SW_SVC_RESETA (0x123) +#define NETARM_GEN_SW_SVC_RESETB (0x321) /* PORT C Register ( 0xFFB0_0028 ) */ -#define NETARM_GEN_PORT_MODE(x) (((x)<<24) + (0xFF00)) -#define NETARM_GEN_PORT_DIR(x) (((x)<<16) + (0xFF00)) +#define NETARM_GEN_PORT_MODE(x) (((x)<<24) + (0xFF00)) +#define NETARM_GEN_PORT_DIR(x) (((x)<<16) + (0xFF00)) /* Timer Registers ( 0xFFB0_0010 0xFFB0_0018 ) */ -#define NETARM_GEN_TCTL_ENABLE (0x80000000) -#define NETARM_GEN_TCTL_INT_ENABLE (0x40000000) +#define NETARM_GEN_TCTL_ENABLE (0x80000000) +#define NETARM_GEN_TCTL_INT_ENABLE (0x40000000) -#define NETARM_GEN_TCTL_USE_IRQ (0x00000000) -#define NETARM_GEN_TCTL_USE_FIQ (0x20000000) +#define NETARM_GEN_TCTL_USE_IRQ (0x00000000) +#define NETARM_GEN_TCTL_USE_FIQ (0x20000000) -#define NETARM_GEN_TCTL_USE_PRESCALE (0x10000000) -#define NETARM_GEN_TCTL_INIT_COUNT(x) ((x) & 0x1FF) +#define NETARM_GEN_TCTL_USE_PRESCALE (0x10000000) +#define NETARM_GEN_TCTL_INIT_COUNT(x) ((x) & 0x1FF) -#define NETARM_GEN_TSTAT_INTPEN (0x40000000) -#define NETARM_GEN_TSTAT_CTC_MASK (0x000001FF) +#define NETARM_GEN_TSTAT_INTPEN (0x40000000) +#define NETARM_GEN_TSTAT_CTC_MASK (0x000001FF) /* prescale to msecs conversion */ -#define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 20480 ) * ( 0x1FF - ( (x) & \ - NETARM_GEN_TSTAT_CTC_MASK ) + \ +#define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 20480 ) * ( 0x1FF - ( (x) & \ + NETARM_GEN_TSTAT_CTC_MASK ) + \ 1 ) ) / (NETARM_XTAL_FREQ/1000) ) -#define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(20480*(x)))-1) & \ +#define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(20480*(x)))-1) & \ NETARM_GEN_TSTAT_CTC_MASK ) | \ NETARM_GEN_TCTL_USE_PRESCALE ) #if 0 /* ifdef CONFIG_NETARM_PLL_BYPASS else */ #error test -#define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 4096 ) * ( 0x1FF - ( (x) & \ - NETARM_GEN_TSTAT_CTC_MASK ) + \ +#define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 4096 ) * ( 0x1FF - ( (x) & \ + NETARM_GEN_TSTAT_CTC_MASK ) + \ 1 ) ) / (NETARM_XTAL_FREQ/1000) ) -#define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(4096*(x)))-1) & \ +#define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(4096*(x)))-1) & \ NETARM_GEN_TSTAT_CTC_MASK ) | \ NETARM_GEN_TCTL_USE_PRESCALE ) #endif |