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-rw-r--r--drivers/block/systemace.c8
-rw-r--r--drivers/i2c/fsl_i2c.c7
-rw-r--r--drivers/i2c/mxs_i2c.c8
-rw-r--r--drivers/input/ps2ser.c2
-rw-r--r--drivers/mmc/fsl_esdhc.c6
-rw-r--r--drivers/mtd/spi/spansion.c2
-rw-r--r--drivers/mtd/spi/stmicro.c30
-rw-r--r--drivers/mtd/spi/winbond.c5
-rw-r--r--drivers/net/fm/Makefile1
-rw-r--r--drivers/net/fm/b4860.c79
-rw-r--r--drivers/net/mpc512x_fec.c2
-rw-r--r--drivers/net/mpc5xxx_fec.c9
-rw-r--r--drivers/qe/fdt.c12
-rw-r--r--drivers/qe/qe.c21
-rw-r--r--drivers/serial/arm_dcc.c21
-rw-r--r--drivers/spi/xilinx_spi.c2
-rw-r--r--drivers/spi/xilinx_spi.h3
17 files changed, 166 insertions, 52 deletions
diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c
index 247cf060e..bf29cbbb7 100644
--- a/drivers/block/systemace.c
+++ b/drivers/block/systemace.c
@@ -65,8 +65,8 @@ static void ace_writew(u16 val, unsigned off)
writeb(val, base + off);
writeb(val >> 8, base + off + 1);
#endif
- }
- out16(base + off, val);
+ } else
+ out16(base + off, val);
}
static u16 ace_readw(unsigned off)
@@ -83,7 +83,7 @@ static u16 ace_readw(unsigned off)
}
static unsigned long systemace_read(int dev, unsigned long start,
- unsigned long blkcnt, void *buffer);
+ lbaint_t blkcnt, void *buffer);
static block_dev_desc_t systemace_dev = { 0 };
@@ -149,7 +149,7 @@ block_dev_desc_t *systemace_get_dev(int dev)
* number of blocks read. A zero return indicates an error.
*/
static unsigned long systemace_read(int dev, unsigned long start,
- unsigned long blkcnt, void *buffer)
+ lbaint_t blkcnt, void *buffer)
{
int retry;
unsigned blk_countdown;
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index 3cb232fdd..1c7265d89 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -217,9 +217,9 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev,
static unsigned int get_i2c_clock(int bus)
{
if (bus)
- return gd->i2c2_clk; /* I2C2 clock */
+ return gd->arch.i2c2_clk; /* I2C2 clock */
else
- return gd->i2c1_clk; /* I2C1 clock */
+ return gd->arch.i2c1_clk; /* I2C1 clock */
}
void
@@ -468,7 +468,8 @@ int i2c_set_bus_num(unsigned int bus)
int i2c_set_bus_speed(unsigned int speed)
{
- unsigned int i2c_clk = (i2c_bus_num == 1) ? gd->i2c2_clk : gd->i2c1_clk;
+ unsigned int i2c_clk = (i2c_bus_num == 1)
+ ? gd->arch.i2c2_clk : gd->arch.i2c1_clk;
writeb(0, &i2c_dev[i2c_bus_num]->cr); /* stop controller */
i2c_bus_speed[i2c_bus_num] =
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
index b907f7b37..2a5f110e1 100644
--- a/drivers/i2c/mxs_i2c.c
+++ b/drivers/i2c/mxs_i2c.c
@@ -37,7 +37,7 @@
#define MXS_I2C_MAX_TIMEOUT 1000000
-void mxs_i2c_reset(void)
+static void mxs_i2c_reset(void)
{
struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
int ret;
@@ -59,7 +59,7 @@ void mxs_i2c_reset(void)
i2c_set_bus_speed(speed);
}
-void mxs_i2c_setup_read(uint8_t chip, int len)
+static void mxs_i2c_setup_read(uint8_t chip, int len)
{
struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
@@ -77,7 +77,7 @@ void mxs_i2c_setup_read(uint8_t chip, int len)
writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
}
-void mxs_i2c_write(uchar chip, uint addr, int alen,
+static void mxs_i2c_write(uchar chip, uint addr, int alen,
uchar *buf, int blen, int stop)
{
struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
@@ -121,7 +121,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen,
writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
}
-int mxs_i2c_wait_for_ack(void)
+static int mxs_i2c_wait_for_ack(void)
{
struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
uint32_t tmp;
diff --git a/drivers/input/ps2ser.c b/drivers/input/ps2ser.c
index a655a16d7..bcbe52af1 100644
--- a/drivers/input/ps2ser.c
+++ b/drivers/input/ps2ser.c
@@ -80,7 +80,7 @@ int ps2ser_init(void)
/* select clock sources */
psc->psc_clock_select = 0;
- baseclk = (gd->ipb_clk + 16) / 32;
+ baseclk = (gd->arch.ipb_clk + 16) / 32;
/* switch to UART mode */
psc->sicr = 0;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3d5c9c0f7..b90f3e776 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -583,7 +583,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
mmc->f_min = 400000;
- mmc->f_max = MIN(gd->sdhc_clk, 52000000);
+ mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
mmc->b_max = 0;
mmc_register(mmc);
@@ -598,7 +598,7 @@ int fsl_esdhc_mmc_init(bd_t *bis)
cfg = malloc(sizeof(struct fsl_esdhc_cfg));
memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
- cfg->sdhc_clk = gd->sdhc_clk;
+ cfg->sdhc_clk = gd->arch.sdhc_clk;
return fsl_esdhc_initialize(bis, cfg);
}
@@ -616,7 +616,7 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
#endif
do_fixup_by_compat_u32(blob, compat, "clock-frequency",
- gd->sdhc_clk, 1);
+ gd->arch.sdhc_clk, 1);
do_fixup_by_compat(blob, compat, "status", "okay",
4 + 1, 1);
diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c
index 32b76e0e9..9288672c8 100644
--- a/drivers/mtd/spi/spansion.c
+++ b/drivers/mtd/spi/spansion.c
@@ -97,7 +97,7 @@ static const struct spansion_spi_flash_params spansion_spi_flash_table[] = {
.name = "S25FL129P_64K",
},
{
- .idcode1 = 0x2019,
+ .idcode1 = 0x0219,
.idcode2 = 0x4d01,
.pages_per_sector = 256,
.nr_sectors = 512,
diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c
index 30b626a39..8a193449d 100644
--- a/drivers/mtd/spi/stmicro.c
+++ b/drivers/mtd/spi/stmicro.c
@@ -93,6 +93,30 @@ static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = {
.name = "M25P128",
},
{
+ .id = 0xba16,
+ .pages_per_sector = 256,
+ .nr_sectors = 64,
+ .name = "N25Q32",
+ },
+ {
+ .id = 0xbb16,
+ .pages_per_sector = 256,
+ .nr_sectors = 64,
+ .name = "N25Q32A",
+ },
+ {
+ .id = 0xba17,
+ .pages_per_sector = 256,
+ .nr_sectors = 128,
+ .name = "N25Q064",
+ },
+ {
+ .id = 0xbb17,
+ .pages_per_sector = 256,
+ .nr_sectors = 128,
+ .name = "N25Q64A",
+ },
+ {
.id = 0xba18,
.pages_per_sector = 256,
.nr_sectors = 256,
@@ -110,6 +134,12 @@ static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = {
.nr_sectors = 512,
.name = "N25Q256",
},
+ {
+ .id = 0xbb19,
+ .pages_per_sector = 256,
+ .nr_sectors = 512,
+ .name = "N25Q256A",
+ },
};
struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 * idcode)
diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c
index f6aab3d32..441830216 100644
--- a/drivers/mtd/spi/winbond.c
+++ b/drivers/mtd/spi/winbond.c
@@ -67,6 +67,11 @@ static const struct winbond_spi_flash_params winbond_spi_flash_table[] = {
.nr_blocks = 128,
.name = "W25Q80",
},
+ {
+ .id = 0x6017,
+ .nr_blocks = 128,
+ .name = "W25Q64DW",
+ },
};
struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode)
diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index 7fbb50a56..f191c79a2 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -46,6 +46,7 @@ COBJS-$(CONFIG_PPC_P4080) += p4080.o
COBJS-$(CONFIG_PPC_P5020) += p5020.o
COBJS-$(CONFIG_PPC_P5040) += p5040.o
COBJS-$(CONFIG_PPC_T4240) += t4240.o
+COBJS-$(CONFIG_PPC_B4420) += b4860.o
COBJS-$(CONFIG_PPC_B4860) += b4860.o
endif
diff --git a/drivers/net/fm/b4860.c b/drivers/net/fm/b4860.c
new file mode 100644
index 000000000..8cde7afc1
--- /dev/null
+++ b/drivers/net/fm/b4860.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Roy Zang <tie-fei.zang@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <phy.h>
+#include <fm_eth.h>
+#include <asm/io.h>
+#include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
+
+u32 port_to_devdisr[] = {
+ [FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
+ [FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
+ [FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
+ [FM1_DTSEC4] = FSL_CORENET_DEVDISR2_DTSEC1_4,
+ [FM1_DTSEC5] = FSL_CORENET_DEVDISR2_DTSEC1_5,
+ [FM1_DTSEC6] = FSL_CORENET_DEVDISR2_DTSEC1_6,
+ [FM1_10GEC1] = FSL_CORENET_DEVDISR2_10GEC1_1,
+ [FM1_10GEC2] = FSL_CORENET_DEVDISR2_10GEC1_2,
+};
+
+static int is_device_disabled(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u32 devdisr2 = in_be32(&gur->devdisr2);
+
+ return port_to_devdisr[port] & devdisr2;
+}
+
+void fman_disable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
+}
+
+phy_interface_t fman_port_enet_if(enum fm_port port)
+{
+ if (is_device_disabled(port))
+ return PHY_INTERFACE_MODE_NONE;
+
+ if ((port == FM1_10GEC1 || port == FM1_10GEC2)
+ && (is_serdes_configured(XAUI_FM1)))
+ return PHY_INTERFACE_MODE_XGMII;
+
+ /* Fix me need to handle RGMII here first */
+
+ switch (port) {
+ case FM1_DTSEC1:
+ case FM1_DTSEC2:
+ case FM1_DTSEC3:
+ case FM1_DTSEC4:
+ case FM1_DTSEC5:
+ case FM1_DTSEC6:
+ if (is_serdes_configured(SGMII_FM1_DTSEC1 + port - FM1_DTSEC1))
+ return PHY_INTERFACE_MODE_SGMII;
+ break;
+ default:
+ return PHY_INTERFACE_MODE_NONE;
+ }
+
+ return PHY_INTERFACE_MODE_NONE;
+}
diff --git a/drivers/net/mpc512x_fec.c b/drivers/net/mpc512x_fec.c
index ad57d566b..427e0b8b4 100644
--- a/drivers/net/mpc512x_fec.c
+++ b/drivers/net/mpc512x_fec.c
@@ -304,7 +304,7 @@ int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis)
* and do not drop the Preamble.
*/
out_be32(&fec->eth->mii_speed,
- (((gd->ips_clk / 1000000) / 5) + 1) << 1);
+ (((gd->arch.ips_clk / 1000000) / 5) + 1) << 1);
/*
* Reset PHY, then delay 300ns
diff --git a/drivers/net/mpc5xxx_fec.c b/drivers/net/mpc5xxx_fec.c
index 3d180db74..1093ba59d 100644
--- a/drivers/net/mpc5xxx_fec.c
+++ b/drivers/net/mpc5xxx_fec.c
@@ -440,8 +440,9 @@ static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis)
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
+ * No MII for 7-wire mode
*/
- fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+ fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
}
if (fec->xcv_type != SEVENWIRE) {
@@ -644,8 +645,9 @@ static void mpc5xxx_fec_halt(struct eth_device *dev)
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
+ * No MII for 7-wire mode
*/
- fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+ fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
}
#if (DEBUG & 0x3)
@@ -909,8 +911,9 @@ int mpc5xxx_fec_initialize(bd_t * bis)
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
+ * No MII for 7-wire mode
*/
- fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+ fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
}
dev->priv = (void *)fec;
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 73e9060d5..5a0f277d0 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -75,16 +75,16 @@ error:
void ft_qe_setup(void *blob)
{
do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
- "bus-frequency", gd->qe_clk, 1);
+ "bus-frequency", gd->arch.qe_clk, 1);
do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
- "brg-frequency", gd->brg_clk, 1);
+ "brg-frequency", gd->arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
- "clock-frequency", gd->qe_clk, 1);
+ "clock-frequency", gd->arch.qe_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
- "bus-frequency", gd->qe_clk, 1);
+ "bus-frequency", gd->arch.qe_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
- "brg-frequency", gd->brg_clk, 1);
+ "brg-frequency", gd->arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
- "clock-frequency", gd->qe_clk / 2, 1);
+ "clock-frequency", gd->arch.qe_clk / 2, 1);
fdt_fixup_qe_firmware(blob);
}
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 345587be6..5fd213546 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -58,21 +58,22 @@ uint qe_muram_alloc(uint size, uint align)
uint savebase;
align_mask = align - 1;
- savebase = gd->mp_alloc_base;
+ savebase = gd->arch.mp_alloc_base;
- if ((off = (gd->mp_alloc_base & align_mask)) != 0)
- gd->mp_alloc_base += (align - off);
+ off = gd->arch.mp_alloc_base & align_mask;
+ if (off != 0)
+ gd->arch.mp_alloc_base += (align - off);
if ((off = size & align_mask) != 0)
size += (align - off);
- if ((gd->mp_alloc_base + size) >= gd->mp_alloc_top) {
- gd->mp_alloc_base = savebase;
+ if ((gd->arch.mp_alloc_base + size) >= gd->arch.mp_alloc_top) {
+ gd->arch.mp_alloc_base = savebase;
printf("%s: ran out of ram.\n", __FUNCTION__);
}
- retloc = gd->mp_alloc_base;
- gd->mp_alloc_base += size;
+ retloc = gd->arch.mp_alloc_base;
+ gd->arch.mp_alloc_base += size;
memset((void *)&qe_immr->muram[retloc], 0, size);
@@ -183,8 +184,8 @@ void qe_init(uint qe_base)
out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
#endif
- gd->mp_alloc_base = QE_DATAONLY_BASE;
- gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;
+ gd->arch.mp_alloc_base = QE_DATAONLY_BASE;
+ gd->arch.mp_alloc_top = gd->arch.mp_alloc_base + QE_DATAONLY_SIZE;
qe_sdma_init();
qe_snums_init();
@@ -220,7 +221,7 @@ void qe_assign_page(uint snum, uint para_ram_base)
from CLKn pin, we have te change the function.
*/
-#define BRG_CLK (gd->brg_clk)
+#define BRG_CLK (gd->arch.brg_clk)
int qe_set_brg(uint brg, uint rate)
{
diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index 7b5ecb513..c217c88e5 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -89,15 +89,6 @@
#define TIMEOUT_COUNT 0x4000000
-#ifndef CONFIG_ARM_DCC_MULTI
-#define arm_dcc_init serial_init
-void serial_setbrg(void) {}
-#define arm_dcc_getc serial_getc
-#define arm_dcc_putc serial_putc
-#define arm_dcc_puts serial_puts
-#define arm_dcc_tstc serial_tstc
-#endif
-
int arm_dcc_init(void)
{
return 0;
@@ -147,16 +138,10 @@ int arm_dcc_tstc(void)
return reg;
}
-#ifdef CONFIG_ARM_DCC_MULTI
static struct stdio_dev arm_dcc_dev;
int drv_arm_dcc_init(void)
{
- int rc;
-
- /* Device initialization */
- memset(&arm_dcc_dev, 0, sizeof(arm_dcc_dev));
-
strcpy(arm_dcc_dev.name, "dcc");
arm_dcc_dev.ext = 0; /* No extensions */
arm_dcc_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT;
@@ -167,4 +152,8 @@ int drv_arm_dcc_init(void)
return stdio_register(&arm_dcc_dev);
}
-#endif
+
+__weak struct serial_device *default_serial_console(void)
+{
+ return NULL;
+}
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 52a4134f1..db01cc25f 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -99,6 +99,8 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
debug("%s: bus:%i cs:%i base:%p mode:%x max_hz:%d\n", __func__,
bus, cs, xilspi->regs, xilspi->mode, xilspi->freq);
+ writel(SPISSR_RESET_VALUE, &xilspi->regs->srr);
+
return &xilspi->slave;
}
diff --git a/drivers/spi/xilinx_spi.h b/drivers/spi/xilinx_spi.h
index 32610d2a1..69d0b9405 100644
--- a/drivers/spi/xilinx_spi.h
+++ b/drivers/spi/xilinx_spi.h
@@ -119,6 +119,9 @@ struct xilinx_spi_reg {
#define SPIRFOR_OCYVAL_POS 0
#define SPIRFOR_OCYVAL_MASK (0xf << SPIRFOR_OCYVAL_POS)
+/* SPI Software Reset Register (ssr) */
+#define SPISSR_RESET_VALUE 0x0a
+
struct xilinx_spi_slave {
struct spi_slave slave;
struct xilinx_spi_reg *regs;
generated by cgit v1.2.3-70-g09d2 (git 2.51.2) at 2025-10-31 14:35:21 +0000