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-rw-r--r--drivers/gpio/da8xx_gpio.c137
-rw-r--r--drivers/mmc/arm_pl180_mmci.c1
-rw-r--r--drivers/mmc/bfin_sdh.c1
-rw-r--r--drivers/mmc/davinci_mmc.c1
-rw-r--r--drivers/mmc/fsl_esdhc.c1
-rw-r--r--drivers/mmc/ftsdc010_esdhc.c1
-rw-r--r--drivers/mmc/gen_atmel_mci.c1
-rw-r--r--drivers/mmc/mmc.c17
-rw-r--r--drivers/mmc/mmc_spi.c1
-rw-r--r--drivers/mmc/mxcmmc.c1
-rw-r--r--drivers/mmc/mxsmmc.c1
-rw-r--r--drivers/mmc/omap_hsmmc.c103
-rw-r--r--drivers/mmc/sdhci.c1
-rw-r--r--drivers/mmc/sh_mmcif.c1
-rw-r--r--drivers/mmc/tegra_mmc.c1
-rw-r--r--drivers/mtd/onenand/onenand_spl.c14
-rw-r--r--drivers/net/cpsw.c20
-rw-r--r--drivers/serial/Makefile1
-rw-r--r--drivers/serial/ns9750_serial.c218
-rw-r--r--drivers/serial/serial.c2
-rw-r--r--drivers/video/omap3_dss.c2
21 files changed, 264 insertions, 262 deletions
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index ed6a1180d..76648d27d 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -34,6 +34,138 @@ static struct gpio_registry {
#if defined(CONFIG_SOC_DA8XX)
#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
+#if defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
+static const struct pinmux_config gpio_pinmux[] = {
+ { pinmux(13), 8, 6 }, /* GP0[0] */
+ { pinmux(13), 8, 7 },
+ { pinmux(14), 8, 0 },
+ { pinmux(14), 8, 1 },
+ { pinmux(14), 8, 2 },
+ { pinmux(14), 8, 3 },
+ { pinmux(14), 8, 4 },
+ { pinmux(14), 8, 5 },
+ { pinmux(14), 8, 6 },
+ { pinmux(14), 8, 7 },
+ { pinmux(15), 8, 0 },
+ { pinmux(15), 8, 1 },
+ { pinmux(15), 8, 2 },
+ { pinmux(15), 8, 3 },
+ { pinmux(15), 8, 4 },
+ { pinmux(15), 8, 5 },
+ { pinmux(15), 8, 6 }, /* GP1[0] */
+ { pinmux(15), 8, 7 },
+ { pinmux(16), 8, 0 },
+ { pinmux(16), 8, 1 },
+ { pinmux(16), 8, 2 },
+ { pinmux(16), 8, 3 },
+ { pinmux(16), 8, 4 },
+ { pinmux(16), 8, 5 },
+ { pinmux(16), 8, 6 },
+ { pinmux(16), 8, 7 },
+ { pinmux(17), 8, 0 },
+ { pinmux(17), 8, 1 },
+ { pinmux(17), 8, 2 },
+ { pinmux(17), 8, 3 },
+ { pinmux(17), 8, 4 },
+ { pinmux(17), 8, 5 },
+ { pinmux(17), 8, 6 }, /* GP2[0] */
+ { pinmux(17), 8, 7 },
+ { pinmux(18), 8, 0 },
+ { pinmux(18), 8, 1 },
+ { pinmux(18), 8, 2 },
+ { pinmux(18), 8, 3 },
+ { pinmux(18), 8, 4 },
+ { pinmux(18), 8, 5 },
+ { pinmux(18), 8, 6 },
+ { pinmux(18), 8, 7 },
+ { pinmux(19), 8, 0 },
+ { pinmux(9), 8, 2 },
+ { pinmux(9), 8, 3 },
+ { pinmux(9), 8, 4 },
+ { pinmux(9), 8, 5 },
+ { pinmux(9), 8, 6 },
+ { pinmux(10), 8, 1 }, /* GP3[0] */
+ { pinmux(10), 8, 2 },
+ { pinmux(10), 8, 3 },
+ { pinmux(10), 8, 4 },
+ { pinmux(10), 8, 5 },
+ { pinmux(10), 8, 6 },
+ { pinmux(10), 8, 7 },
+ { pinmux(11), 8, 0 },
+ { pinmux(11), 8, 1 },
+ { pinmux(11), 8, 2 },
+ { pinmux(11), 8, 3 },
+ { pinmux(11), 8, 4 },
+ { pinmux(9), 8, 7 },
+ { pinmux(2), 8, 6 },
+ { pinmux(11), 8, 5 },
+ { pinmux(11), 8, 6 },
+ { pinmux(12), 8, 4 }, /* GP4[0] */
+ { pinmux(12), 8, 5 },
+ { pinmux(12), 8, 6 },
+ { pinmux(12), 8, 7 },
+ { pinmux(13), 8, 0 },
+ { pinmux(13), 8, 1 },
+ { pinmux(13), 8, 2 },
+ { pinmux(13), 8, 3 },
+ { pinmux(13), 8, 4 },
+ { pinmux(13), 8, 5 },
+ { pinmux(11), 8, 7 },
+ { pinmux(12), 8, 0 },
+ { pinmux(12), 8, 1 },
+ { pinmux(12), 8, 2 },
+ { pinmux(12), 8, 3 },
+ { pinmux(9), 8, 1 },
+ { pinmux(7), 8, 3 }, /* GP5[0] */
+ { pinmux(7), 8, 4 },
+ { pinmux(7), 8, 5 },
+ { pinmux(7), 8, 6 },
+ { pinmux(7), 8, 7 },
+ { pinmux(8), 8, 0 },
+ { pinmux(8), 8, 1 },
+ { pinmux(8), 8, 2 },
+ { pinmux(8), 8, 3 },
+ { pinmux(8), 8, 4 },
+ { pinmux(8), 8, 5 },
+ { pinmux(8), 8, 6 },
+ { pinmux(8), 8, 7 },
+ { pinmux(9), 8, 0 },
+ { pinmux(7), 8, 1 },
+ { pinmux(7), 8, 2 },
+ { pinmux(5), 8, 1 }, /* GP6[0] */
+ { pinmux(5), 8, 2 },
+ { pinmux(5), 8, 3 },
+ { pinmux(5), 8, 4 },
+ { pinmux(5), 8, 5 },
+ { pinmux(5), 8, 6 },
+ { pinmux(5), 8, 7 },
+ { pinmux(6), 8, 0 },
+ { pinmux(6), 8, 1 },
+ { pinmux(6), 8, 2 },
+ { pinmux(6), 8, 3 },
+ { pinmux(6), 8, 4 },
+ { pinmux(6), 8, 5 },
+ { pinmux(6), 8, 6 },
+ { pinmux(6), 8, 7 },
+ { pinmux(7), 8, 0 },
+ { pinmux(1), 8, 0 }, /* GP7[0] */
+ { pinmux(1), 8, 1 },
+ { pinmux(1), 8, 2 },
+ { pinmux(1), 8, 3 },
+ { pinmux(1), 8, 4 },
+ { pinmux(1), 8, 5 },
+ { pinmux(1), 8, 6 },
+ { pinmux(1), 8, 7 },
+ { pinmux(2), 8, 0 },
+ { pinmux(2), 8, 1 },
+ { pinmux(2), 8, 2 },
+ { pinmux(2), 8, 3 },
+ { pinmux(2), 8, 4 },
+ { pinmux(2), 8, 5 },
+ { pinmux(0), 1, 0 },
+ { pinmux(0), 1, 1 },
+};
+#else /* CONFIG_SOC_DA8XX && CONFIG_SOC_DA850 */
static const struct pinmux_config gpio_pinmux[] = {
{ pinmux(1), 8, 7 }, /* GP0[0] */
{ pinmux(1), 8, 6 },
@@ -180,9 +312,10 @@ static const struct pinmux_config gpio_pinmux[] = {
{ pinmux(18), 8, 3 },
{ pinmux(18), 8, 2 },
};
-#else
+#endif /* CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850 */
+#else /* !CONFIG_SOC_DA8XX */
#define davinci_configure_pin_mux(a, b)
-#endif
+#endif /* CONFIG_SOC_DA8XX */
int gpio_request(unsigned gpio, const char *label)
{
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
index af1380a45..ab2e81e5d 100644
--- a/drivers/mmc/arm_pl180_mmci.c
+++ b/drivers/mmc/arm_pl180_mmci.c
@@ -377,6 +377,7 @@ int arm_pl180_mmci_init(struct pl180_mmc_host *host)
dev->set_ios = host_set_ios;
dev->init = mmc_host_reset;
dev->getcd = NULL;
+ dev->getwp = NULL;
dev->host_caps = host->caps;
dev->voltages = host->voltages;
dev->f_min = host->clock_min;
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 0f98b961f..26311741f 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -287,6 +287,7 @@ int bfin_mmc_init(bd_t *bis)
mmc->set_ios = bfin_sdh_set_ios;
mmc->init = bfin_sdh_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
mmc->host_caps = MMC_MODE_4BIT;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index ee8f2614d..e2379e326 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -388,6 +388,7 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
mmc->set_ios = dmmc_set_ios;
mmc->init = dmmc_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
mmc->f_min = 200000;
mmc->f_max = 25000000;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index b90f3e776..54b536316 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -552,6 +552,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
mmc->set_ios = esdhc_set_ios;
mmc->init = esdhc_init;
mmc->getcd = esdhc_getcd;
+ mmc->getwp = NULL;
voltage_caps = 0;
caps = regs->hostcapblt;
diff --git a/drivers/mmc/ftsdc010_esdhc.c b/drivers/mmc/ftsdc010_esdhc.c
index f1702fe33..42f0e0ce5 100644
--- a/drivers/mmc/ftsdc010_esdhc.c
+++ b/drivers/mmc/ftsdc010_esdhc.c
@@ -666,6 +666,7 @@ int ftsdc010_mmc_init(int dev_index)
mmc->set_ios = ftsdc010_set_ios;
mmc->init = ftsdc010_core_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 67b2dbe8d..70a9f91c8 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -349,6 +349,7 @@ int atmel_mci_init(void *regs)
mmc->set_ios = mci_set_ios;
mmc->init = mci_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
/* need to be able to pass these in on a board by board basis */
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 72e8ce6da..7b5fdd9f6 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -40,6 +40,23 @@
static struct list_head mmc_devices;
static int cur_dev_num = -1;
+int __weak board_mmc_getwp(struct mmc *mmc)
+{
+ return -1;
+}
+
+int mmc_getwp(struct mmc *mmc)
+{
+ int wp;
+
+ wp = board_mmc_getwp(mmc);
+
+ if ((wp < 0) && mmc->getwp)
+ wp = mmc->getwp(mmc);
+
+ return wp;
+}
+
int __board_mmc_getcd(struct mmc *mmc) {
return -1;
}
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index 11ba532b0..fe6a5a166 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -273,6 +273,7 @@ struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode)
mmc->set_ios = mmc_spi_set_ios;
mmc->init = mmc_spi_init_p;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
mmc->host_caps = MMC_MODE_SPI;
mmc->voltages = MMC_SPI_VOLTAGE;
diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c
index d58c18bc2..4f99617b9 100644
--- a/drivers/mmc/mxcmmc.c
+++ b/drivers/mmc/mxcmmc.c
@@ -499,6 +499,7 @@ static int mxcmci_initialize(bd_t *bis)
mmc->set_ios = mxcmci_set_ios;
mmc->init = mxcmci_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
mmc->host_caps = MMC_MODE_4BIT;
host->base = (struct mxcmci_regs *)CONFIG_MXC_MCI_REGS_BASE;
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index a72f66cc7..a87529dfc 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -432,6 +432,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int))
mmc->set_ios = mxsmmc_set_ios;
mmc->init = mxsmmc_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
mmc->priv = priv;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index afd9b30b5..67cfcc24d 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -30,6 +30,7 @@
#include <twl4030.h>
#include <twl6030.h>
#include <twl6035.h>
+#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
@@ -38,30 +39,71 @@
#define SYSCTL_SRC (1 << 25)
#define SYSCTL_SRD (1 << 26)
+struct omap_hsmmc_data {
+ struct hsmmc *base_addr;
+ int cd_gpio;
+ int wp_gpio;
+};
+
/* If we fail after 1 second wait, something is really bad */
#define MAX_RETRY_MS 1000
static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size);
static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
unsigned int siz);
-static struct mmc hsmmc_dev[2];
+static struct mmc hsmmc_dev[3];
+static struct omap_hsmmc_data hsmmc_dev_data[3];
+
+#if (defined(CONFIG_OMAP_GPIO) && !defined(CONFIG_SPL_BUILD)) || \
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT))
+static int omap_mmc_setup_gpio_in(int gpio, const char *label)
+{
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ if (gpio_request(gpio, label) < 0)
+ return -1;
+
+ if (gpio_direction_input(gpio) < 0)
+ return -1;
+
+ return gpio;
+}
+
+static int omap_mmc_getcd(struct mmc *mmc)
+{
+ int cd_gpio = ((struct omap_hsmmc_data *)mmc->priv)->cd_gpio;
+ return gpio_get_value(cd_gpio);
+}
+
+static int omap_mmc_getwp(struct mmc *mmc)
+{
+ int wp_gpio = ((struct omap_hsmmc_data *)mmc->priv)->wp_gpio;
+ return gpio_get_value(wp_gpio);
+}
+#else
+static inline int omap_mmc_setup_gpio_in(int gpio, const char *label)
+{
+ return -1;
+}
+
+#define omap_mmc_getcd NULL
+#define omap_mmc_getwp NULL
+#endif
#if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER)
static void omap4_vmmc_pbias_config(struct mmc *mmc)
{
u32 value = 0;
- struct omap_sys_ctrl_regs *const ctrl =
- (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
-
- value = readl(&ctrl->control_pbiaslite);
+ value = readl((*ctrl)->control_pbiaslite);
value &= ~(MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ);
- writel(value, &ctrl->control_pbiaslite);
+ writel(value, (*ctrl)->control_pbiaslite);
/* set VMMC to 3V */
twl6030_power_mmc_init();
- value = readl(&ctrl->control_pbiaslite);
+ value = readl((*ctrl)->control_pbiaslite);
value |= MMC1_PBIASLITE_VMODE | MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ;
- writel(value, &ctrl->control_pbiaslite);
+ writel(value, (*ctrl)->control_pbiaslite);
}
#endif
@@ -69,26 +111,24 @@ static void omap4_vmmc_pbias_config(struct mmc *mmc)
static void omap5_pbias_config(struct mmc *mmc)
{
u32 value = 0;
- struct omap_sys_ctrl_regs *const ctrl =
- (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
- value = readl(&ctrl->control_pbias);
+ value = readl((*ctrl)->control_pbias);
value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
value |= SDCARD_BIAS_HIZ_MODE;
- writel(value, &ctrl->control_pbias);
+ writel(value, (*ctrl)->control_pbias);
twl6035_mmc1_poweron_ldo();
- value = readl(&ctrl->control_pbias);
+ value = readl((*ctrl)->control_pbias);
value &= ~SDCARD_BIAS_HIZ_MODE;
value |= SDCARD_PBIASLITE_VMODE | SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ;
- writel(value, &ctrl->control_pbias);
+ writel(value, (*ctrl)->control_pbias);
- value = readl(&ctrl->control_pbias);
+ value = readl((*ctrl)->control_pbias);
if (value & (1 << 23)) {
value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
value |= SDCARD_BIAS_HIZ_MODE;
- writel(value, &ctrl->control_pbias);
+ writel(value, (*ctrl)->control_pbias);
}
}
#endif
@@ -177,11 +217,12 @@ void mmc_init_stream(struct hsmmc *mmc_base)
static int mmc_init_setup(struct mmc *mmc)
{
- struct hsmmc *mmc_base = (struct hsmmc *)mmc->priv;
+ struct hsmmc *mmc_base;
unsigned int reg_val;
unsigned int dsor;
ulong start;
+ mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr;
mmc_board_init(mmc);
writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET,
@@ -262,10 +303,11 @@ static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit)
static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct hsmmc *mmc_base = (struct hsmmc *)mmc->priv;
+ struct hsmmc *mmc_base;
unsigned int flags, mmc_stat;
ulong start;
+ mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr;
start = get_timer(0);
while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) {
if (get_timer(0) - start > MAX_RETRY_MS) {
@@ -489,10 +531,11 @@ static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
static void mmc_set_ios(struct mmc *mmc)
{
- struct hsmmc *mmc_base = (struct hsmmc *)mmc->priv;
+ struct hsmmc *mmc_base;
unsigned int dsor = 0;
ulong start;
+ mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr;
/* configue bus width */
switch (mmc->bus_width) {
case 8:
@@ -540,36 +583,40 @@ static void mmc_set_ios(struct mmc *mmc)
writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
}
-int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max)
+int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
+ int wp_gpio)
{
- struct mmc *mmc;
-
- mmc = &hsmmc_dev[dev_index];
+ struct mmc *mmc = &hsmmc_dev[dev_index];
+ struct omap_hsmmc_data *priv_data = &hsmmc_dev_data[dev_index];
sprintf(mmc->name, "OMAP SD/MMC");
mmc->send_cmd = mmc_send_cmd;
mmc->set_ios = mmc_set_ios;
mmc->init = mmc_init_setup;
- mmc->getcd = NULL;
+ mmc->getcd = omap_mmc_getcd;
+ mmc->getwp = omap_mmc_getwp;
+ mmc->priv = priv_data;
switch (dev_index) {
case 0:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC1_BASE;
+ priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE;
break;
#ifdef OMAP_HSMMC2_BASE
case 1:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC2_BASE;
+ priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
break;
#endif
#ifdef OMAP_HSMMC3_BASE
case 2:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC3_BASE;
+ priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE;
break;
#endif
default:
- mmc->priv = (struct hsmmc *)OMAP_HSMMC1_BASE;
+ priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE;
return 1;
}
+ priv_data->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd");
+ priv_data->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp");
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
mmc->host_caps = (MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
MMC_MODE_HC) & ~host_caps_mask;
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index b9cbe34f1..daca0ea4f 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -438,6 +438,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
mmc->set_ios = sdhci_set_ios;
mmc->init = sdhci_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
#ifdef CONFIG_MMC_SDMA
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 4588568a6..011d4f3e6 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -599,6 +599,7 @@ int mmcif_mmc_init(void)
mmc->set_ios = sh_mmcif_set_ios;
mmc->init = sh_mmcif_init;
mmc->getcd = NULL;
+ mmc->getwp = NULL;
host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR;
host->clk = CONFIG_SH_MMCIF_CLK;
mmc->priv = host;
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index d749ab095..72586193c 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -563,6 +563,7 @@ int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
mmc->set_ios = mmc_set_ios;
mmc->init = mmc_core_init;
mmc->getcd = tegra_mmc_getcd;
+ mmc->getwp = NULL;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
mmc->host_caps = 0;
diff --git a/drivers/mtd/onenand/onenand_spl.c b/drivers/mtd/onenand/onenand_spl.c
index 50eaa7188..4bec2c2ad 100644
--- a/drivers/mtd/onenand/onenand_spl.c
+++ b/drivers/mtd/onenand/onenand_spl.c
@@ -112,7 +112,7 @@ static int onenand_spl_read_page(uint32_t block, uint32_t page, uint32_t *buf,
void onenand_spl_load_image(uint32_t offs, uint32_t size, void *dst)
{
uint32_t *addr = (uint32_t *)dst;
- uint32_t total_pages;
+ uint32_t to_page;
uint32_t block;
uint32_t page, rpage;
enum onenand_spl_pagesize pagesize;
@@ -125,22 +125,20 @@ void onenand_spl_load_image(uint32_t offs, uint32_t size, void *dst)
* pulling further unwanted functions into the SPL.
*/
if (pagesize == 2048) {
- total_pages = DIV_ROUND_UP(size, 2048);
page = offs / 2048;
+ to_page = page + DIV_ROUND_UP(size, 2048);
} else {
- total_pages = DIV_ROUND_UP(size, 4096);
page = offs / 4096;
+ to_page = page + DIV_ROUND_UP(size, 4096);
}
- for (; page <= total_pages; page++) {
+ for (; page <= to_page; page++) {
block = page / ONENAND_PAGES_PER_BLOCK;
rpage = page & (ONENAND_PAGES_PER_BLOCK - 1);
ret = onenand_spl_read_page(block, rpage, addr, pagesize);
- if (ret) {
- total_pages += ONENAND_PAGES_PER_BLOCK;
+ if (ret)
page += ONENAND_PAGES_PER_BLOCK - 1;
- } else {
+ else
addr += pagesize / 4;
- }
}
}
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index db04795df..93f8417a4 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -227,6 +227,9 @@ struct cpsw_priv {
struct cpsw_slave *slaves;
struct phy_device *phydev;
struct mii_dev *bus;
+
+ u32 mdio_link;
+ u32 phy_mask;
};
static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
@@ -598,10 +601,21 @@ static int cpsw_update_link(struct cpsw_priv *priv)
for_each_slave(slave, priv)
cpsw_slave_update_link(slave, priv, &link);
-
+ priv->mdio_link = readl(&mdio_regs->link);
return link;
}
+static int cpsw_check_link(struct cpsw_priv *priv)
+{
+ u32 link = 0;
+
+ link = __raw_readl(&mdio_regs->link) & priv->phy_mask;
+ if ((link) && (link == priv->mdio_link))
+ return 1;
+
+ return cpsw_update_link(priv);
+}
+
static inline u32 cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)
{
if (priv->host_port == 0)
@@ -631,6 +645,8 @@ static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
cpsw_ale_port_state(priv, slave_port, ALE_PORT_STATE_FORWARD);
cpsw_ale_add_mcast(priv, NetBcastAddr, 1 << slave_port);
+
+ priv->phy_mask |= 1 << slave->data->phy_id;
}
static struct cpdma_desc *cpdma_desc_alloc(struct cpsw_priv *priv)
@@ -862,7 +878,7 @@ static int cpsw_send(struct eth_device *dev, void *packet, int length)
int len;
int timeout = CPDMA_TIMEOUT;
- if (!cpsw_update_link(priv))
+ if (!cpsw_check_link(priv))
return -EIO;
flush_dcache_range((unsigned long)packet,
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5e8b64873..de3f47199 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -33,7 +33,6 @@ COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
COBJS-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
COBJS-$(CONFIG_MCFUART) += mcfuart.o
-COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o
COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
diff --git a/drivers/serial/ns9750_serial.c b/drivers/serial/ns9750_serial.c
deleted file mode 100644
index 85fc68a07..000000000
--- a/drivers/serial/ns9750_serial.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/***********************************************************************
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- *
- * $Id: ns9750_serial.c,v 1.1 2004/02/16 10:37:20 mpietrek Exp $
- * @Author: Markus Pietrek
- * @Descr: Serial driver for the NS9750. Only one UART is supported yet.
- * @References: [1] NS9750 Hardware Reference/December 2003
- * @TODO: Implement Character GAP Timer when chip is fixed for PLL bypass
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- ***********************************************************************/
-
-#include <common.h>
-
-#include "ns9750_bbus.h" /* for GPIOs */
-#include "ns9750_ser.h" /* for serial configuration */
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if !defined(CONFIG_CONS_INDEX)
-#error "No console index specified."
-#endif
-
-#define CONSOLE CONFIG_CONS_INDEX
-
-static unsigned int calcBitrateRegister( void );
-static unsigned int calcRxCharGapRegister( void );
-
-static char cCharsAvailable; /* Numbers of chars in unCharCache */
-static unsigned int unCharCache; /* unCharCache is only valid if
- * cCharsAvailable > 0 */
-
-/***********************************************************************
- * @Function: serial_init
- * @Return: 0
- * @Descr: configures GPIOs and UART. Requires BBUS Master Reset turned off
- ***********************************************************************/
-
-static int ns9750_serial_init(void)
-{
- unsigned int aunGPIOTxD[] = { 0, 8, 40, 44 };
- unsigned int aunGPIORxD[] = { 1, 9, 41, 45 };
-
- cCharsAvailable = 0;
-
- /* configure TxD and RxD pins for their special function */
- set_gpio_cfg_reg_val( aunGPIOTxD[ CONSOLE ],
- NS9750_GPIO_CFG_FUNC_0 | NS9750_GPIO_CFG_OUTPUT );
- set_gpio_cfg_reg_val( aunGPIORxD[ CONSOLE ],
- NS9750_GPIO_CFG_FUNC_0 | NS9750_GPIO_CFG_INPUT );
-
- /* configure serial engine */
- *get_ser_reg_addr_channel( NS9750_SER_CTRL_A, CONSOLE ) =
- NS9750_SER_CTRL_A_CE |
- NS9750_SER_CTRL_A_STOP |
- NS9750_SER_CTRL_A_WLS_8;
-
- serial_setbrg();
-
- *get_ser_reg_addr_channel( NS9750_SER_CTRL_B, CONSOLE ) =
- NS9750_SER_CTRL_B_RCGT;
-
- return 0;
-}
-
-/***********************************************************************
- * @Function: serial_putc
- * @Return: n/a
- * @Descr: writes one character to the FIFO. Blocks until FIFO is not full
- ***********************************************************************/
-
-static void ns9750_serial_putc(const char c)
-{
- if (c == '\n')
- serial_putc( '\r' );
-
- while (!(*get_ser_reg_addr_channel( NS9750_SER_STAT_A, CONSOLE) &
- NS9750_SER_STAT_A_TRDY ) ) {
- /* do nothing, wait for characters in FIFO sent */
- }
-
- *(volatile char*) get_ser_reg_addr_channel( NS9750_SER_FIFO,
- CONSOLE) = c;
-}
-
-/***********************************************************************
- * @Function: serial_getc
- * @Return: the character read
- * @Descr: performs only 8bit accesses to the FIFO. No error handling
- ***********************************************************************/
-
-static int ns9750_serial_getc(void)
-{
- int i;
-
- while (!serial_tstc() ) {
- /* do nothing, wait for incoming characters */
- }
-
- /* at least one character in unCharCache */
- i = (int) (unCharCache & 0xff);
-
- unCharCache >>= 8;
- cCharsAvailable--;
-
- return i;
-}
-
-/***********************************************************************
- * @Function: serial_tstc
- * @Return: 0 if no input available, otherwise != 0
- * @Descr: checks for incoming FIFO not empty. Stores the incoming chars in
- * unCharCache and the numbers of characters in cCharsAvailable
- ***********************************************************************/
-
-static int ns9750_serial_tstc(void)
-{
- unsigned int unRegCache;
-
- if ( cCharsAvailable )
- return 1;
-
- unRegCache = *get_ser_reg_addr_channel( NS9750_SER_STAT_A,CONSOLE );
- if( unRegCache & NS9750_SER_STAT_A_RBC ) {
- *get_ser_reg_addr_channel( NS9750_SER_STAT_A, CONSOLE ) =
- NS9750_SER_STAT_A_RBC;
- unRegCache = *get_ser_reg_addr_channel( NS9750_SER_STAT_A,
- CONSOLE );
- }
-
- if ( unRegCache & NS9750_SER_STAT_A_RRDY ) {
- cCharsAvailable = (unRegCache & NS9750_SER_STAT_A_RXFDB_MA)>>20;
- if ( !cCharsAvailable )
- cCharsAvailable = 4;
-
- unCharCache = *get_ser_reg_addr_channel( NS9750_SER_FIFO,
- CONSOLE );
- return 1;
- }
-
- /* no chars available */
- return 0;
-}
-
-static void ns9750_serial_setbrg(void)
-{
- *get_ser_reg_addr_channel( NS9750_SER_BITRATE, CONSOLE ) =
- calcBitrateRegister();
- *get_ser_reg_addr_channel( NS9750_SER_RX_CHAR_TIMER, CONSOLE ) =
- calcRxCharGapRegister();
-}
-
-/***********************************************************************
- * @Function: calcBitrateRegister
- * @Return: value for the serial bitrate register
- * @Descr: register value depends on clock frequency and baudrate
- ***********************************************************************/
-
-static unsigned int calcBitrateRegister( void )
-{
- return ( NS9750_SER_BITRATE_EBIT |
- NS9750_SER_BITRATE_CLKMUX_BCLK |
- NS9750_SER_BITRATE_TMODE |
- NS9750_SER_BITRATE_TCDR_16 |
- NS9750_SER_BITRATE_RCDR_16 |
- ( ( ( ( CONFIG_SYS_CLK_FREQ / 8 ) / /* BBUS clock,[1] Fig. 38 */
- ( gd->baudrate * 16 ) ) - 1 ) &
- NS9750_SER_BITRATE_N_MA ) );
-}
-
-/***********************************************************************
- * @Function: calcRxCharGapRegister
- * @Return: value for the character gap timer register
- * @Descr: register value depends on clock frequency and baudrate. Currently 0
- * is used as there is a bug with the gap timer in PLL bypass mode.
- ***********************************************************************/
-
-static unsigned int calcRxCharGapRegister( void )
-{
- return NS9750_SER_RX_CHAR_TIMER_TRUN;
-}
-
-static struct serial_device ns9750_serial_drv = {
- .name = "ns9750_serial",
- .start = ns9750_serial_init,
- .stop = NULL,
- .setbrg = ns9750_serial_setbrg,
- .putc = ns9750_serial_putc,
- .puts = default_serial_puts,
- .getc = ns9750_serial_getc,
- .tstc = ns9750_serial_tstc,
-};
-
-void ns9750_serial_initialize(void)
-{
- serial_register(&ns9750_serial_drv);
-}
-
-__weak struct serial_device *default_serial_console(void)
-{
- return &ns9750_serial_drv;
-}
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 1f8955a0f..7922bf066 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -164,7 +164,6 @@ serial_initfunc(altera_serial_initialize);
serial_initfunc(atmel_serial_initialize);
serial_initfunc(lpc32xx_serial_initialize);
serial_initfunc(mcf_serial_initialize);
-serial_initfunc(ns9750_serial_initialize);
serial_initfunc(oc_serial_initialize);
serial_initfunc(s3c64xx_serial_initialize);
serial_initfunc(sandbox_serial_initialize);
@@ -259,7 +258,6 @@ void serial_initialize(void)
atmel_serial_initialize();
lpc32xx_serial_initialize();
mcf_serial_initialize();
- ns9750_serial_initialize();
oc_serial_initialize();
s3c64xx_serial_initialize();
sandbox_serial_initialize();
diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
index b1424bfd0..6efba122e 100644
--- a/drivers/video/omap3_dss.c
+++ b/drivers/video/omap3_dss.c
@@ -121,7 +121,7 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
if (!panel_cfg->frame_buffer)
return;
- writel(8 << GFX_FORMAT_SHIFT | GFX_ENABLE, &dispc->gfx_attributes);
+ writel(panel_cfg->gfx_format | GFX_ENABLE, &dispc->gfx_attributes);
writel(1, &dispc->gfx_row_inc);
writel(1, &dispc->gfx_pixel_inc);
writel(panel_cfg->lcd_size, &dispc->gfx_size);
generated by cgit v1.2.3-70-g09d2 (git 2.51.2) at 2025-10-31 09:31:59 +0000