diff options
Diffstat (limited to 'drivers')
108 files changed, 723 insertions, 723 deletions
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index 52fd1080e..2445e8c62 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -676,7 +676,7 @@ void scsi_low_level_init(int busdevfunc) linkmap = probe_ent->link_port_map; - for (i = 0; i < CFG_SCSI_MAX_SCSI_ID; i++) { + for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) { if (((linkmap >> i) & 0x01)) { if (ahci_port_start((u8) i)) { printf("Can not start port %d\n", i); diff --git a/drivers/block/ata_piix.c b/drivers/block/ata_piix.c index 4c26b36f5..ec3768711 100644 --- a/drivers/block/ata_piix.c +++ b/drivers/block/ata_piix.c @@ -35,7 +35,7 @@ #include <ide.h> #include <ata.h> -extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE]; +extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE]; extern int curr_device; #define DEBUG_SATA 0 /*For debug prints set DEBUG_SATA to 1 */ @@ -173,10 +173,10 @@ init_sata (int dev) iobase4 | ATA_PCI_CTL_OFS; port[1].ioaddr.bmdma_addr = iobase5 + 0x8; - for (i = 0; i < CFG_SATA_MAXBUS; i++) + for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) sata_port (&port[i].ioaddr); - for (i = 0; i < CFG_SATA_MAXBUS; i++) { + for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) { if (!(sata_bus_probe (i))) { port[i].port_state = 0; printf ("SATA#%d port is not present \n", i); @@ -190,15 +190,15 @@ init_sata (int dev) } } - for (i = 0; i < CFG_SATA_MAXBUS; i++) { + for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) { u8 j, devno; if (port[i].port_state == 0) continue; - for (j = 0; j < CFG_SATA_DEVS_PER_BUS; j++) { + for (j = 0; j < CONFIG_SYS_SATA_DEVS_PER_BUS; j++) { sata_identify (i, j); set_Feature_cmd (i, j); - devno = i * CFG_SATA_DEVS_PER_BUS + j; + devno = i * CONFIG_SYS_SATA_DEVS_PER_BUS + j; if ((sata_dev_desc[devno].lba > 0) && (sata_dev_desc[devno].blksz > 0)) { dev_print (&sata_dev_desc[devno]); @@ -206,7 +206,7 @@ init_sata (int dev) init_part (&sata_dev_desc[devno]); if (curr_device < 0) curr_device = - i * CFG_SATA_DEVS_PER_BUS + j; + i * CONFIG_SYS_SATA_DEVS_PER_BUS + j; } } } @@ -271,7 +271,7 @@ sata_bus_softreset (int num) port[num].dev_mask = 0; - for (i = 0; i < CFG_SATA_DEVS_PER_BUS; i++) { + for (i = 0; i < CONFIG_SYS_SATA_DEVS_PER_BUS; i++) { if (!(sata_devchk (&port[num].ioaddr, i))) { PRINTF ("dev_chk failed for dev#%d\n", i); } else { @@ -328,7 +328,7 @@ sata_bus_softreset (int num) void sata_identify (int num, int dev) { - u8 cmd = 0, status = 0, devno = num * CFG_SATA_DEVS_PER_BUS + dev; + u8 cmd = 0, status = 0, devno = num * CONFIG_SYS_SATA_DEVS_PER_BUS + dev; u16 iobuf[ATA_SECT_SIZE]; u64 n_sectors = 0; u8 mask = 0; @@ -564,10 +564,10 @@ sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff) } #endif /*Port Number */ - num = device / CFG_SATA_DEVS_PER_BUS; + num = device / CONFIG_SYS_SATA_DEVS_PER_BUS; /*dev on the port */ - if (device >= CFG_SATA_DEVS_PER_BUS) - dev = device - CFG_SATA_DEVS_PER_BUS; + if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS) + dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS; else dev = device; @@ -671,10 +671,10 @@ sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff) } #endif /*Port Number */ - num = device / CFG_SATA_DEVS_PER_BUS; + num = device / CONFIG_SYS_SATA_DEVS_PER_BUS; /*dev on the Port */ - if (device >= CFG_SATA_DEVS_PER_BUS) - dev = device - CFG_SATA_DEVS_PER_BUS; + if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS) + dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS; else dev = device; diff --git a/drivers/block/ata_piix.h b/drivers/block/ata_piix.h index f9f019470..11885af20 100644 --- a/drivers/block/ata_piix.h +++ b/drivers/block/ata_piix.h @@ -88,7 +88,7 @@ int init_sata (int dev); #endif #ifdef DRV_DECL /*Defines Driver Specific variables */ -struct sata_port port[CFG_SATA_MAXBUS]; +struct sata_port port[CONFIG_SYS_SATA_MAXBUS]; #endif #endif /* __ATA_PIIX_H__ */ diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c index 55f593a49..2009d1ecd 100644 --- a/drivers/block/fsl_sata.c +++ b/drivers/block/fsl_sata.c @@ -26,23 +26,23 @@ #include <fis.h> #include "fsl_sata.h" -extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE]; +extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE]; -#ifndef CFG_SATA1_FLAGS - #define CFG_SATA1_FLAGS FLAGS_DMA +#ifndef CONFIG_SYS_SATA1_FLAGS + #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA #endif -#ifndef CFG_SATA2_FLAGS - #define CFG_SATA2_FLAGS FLAGS_DMA +#ifndef CONFIG_SYS_SATA2_FLAGS + #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA #endif static struct fsl_sata_info fsl_sata_info[] = { #ifdef CONFIG_SATA1 - {CFG_SATA1, CFG_SATA1_FLAGS}, + {CONFIG_SYS_SATA1, CONFIG_SYS_SATA1_FLAGS}, #else {0, 0}, #endif #ifdef CONFIG_SATA2 - {CFG_SATA2, CFG_SATA2_FLAGS}, + {CONFIG_SYS_SATA2, CONFIG_SYS_SATA2_FLAGS}, #else {0, 0}, #endif @@ -123,7 +123,7 @@ int init_sata(int dev) int i; fsl_sata_t *sata; - if (dev < 0 || dev > (CFG_SATA_MAX_DEVICE - 1)) { + if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { printf("the sata index %d is out of ranges\n\r", dev); return -1; } diff --git a/drivers/block/sata_sil3114.c b/drivers/block/sata_sil3114.c index 8399737ff..351cf993c 100644 --- a/drivers/block/sata_sil3114.c +++ b/drivers/block/sata_sil3114.c @@ -48,9 +48,9 @@ static u8 sata_chk_status (struct sata_ioports *ioaddr, u8 usealtstatus); static void msleep (int count); static u32 iobase[6] = { 0, 0, 0, 0, 0, 0}; /* PCI BAR registers for device */ -extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE]; +extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE]; -static struct sata_port port[CFG_SATA_MAX_DEVICE]; +static struct sata_port port[CONFIG_SYS_SATA_MAX_DEVICE]; static void output_data (struct sata_ioports *ioaddr, u16 * sect_buf, int words) { diff --git a/drivers/block/sil680.c b/drivers/block/sil680.c index 052c3d367..e21fb9b69 100644 --- a/drivers/block/sil680.c +++ b/drivers/block/sil680.c @@ -32,25 +32,25 @@ * #define CONFIG_PCI_PNP * NOTE it may also be necessary to define this if the default of 8 is * incorrect for the target board (e.g. the sequoia board requires 0). - * #define CFG_PCI_CACHE_LINE_SIZE 0 + * #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0 * * #define CONFIG_CMD_IDE * #undef CONFIG_IDE_8xx_DIRECT * #undef CONFIG_IDE_LED * #undef CONFIG_IDE_RESET * #define CONFIG_IDE_PREINIT - * #define CFG_IDE_MAXBUS 2 - modify to suit - * #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) - modify to suit - * #define CFG_ATA_BASE_ADDR 0 - * #define CFG_ATA_IDE0_OFFSET 0 - * #define CFG_ATA_IDE1_OFFSET 0 - * #define CFG_ATA_DATA_OFFSET 0 - * #define CFG_ATA_REG_OFFSET 0 - * #define CFG_ATA_ALT_OFFSET 0x0004 + * #define CONFIG_SYS_IDE_MAXBUS 2 - modify to suit + * #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) - modify to suit + * #define CONFIG_SYS_ATA_BASE_ADDR 0 + * #define CONFIG_SYS_ATA_IDE0_OFFSET 0 + * #define CONFIG_SYS_ATA_IDE1_OFFSET 0 + * #define CONFIG_SYS_ATA_DATA_OFFSET 0 + * #define CONFIG_SYS_ATA_REG_OFFSET 0 + * #define CONFIG_SYS_ATA_ALT_OFFSET 0x0004 * * The mapping for PCI IO-space. * NOTE this is the value for the sequoia board. Modify to suit. - * #define CFG_PCI0_IO_SPACE 0xE8000000 + * #define CONFIG_SYS_PCI0_IO_SPACE 0xE8000000 */ #include <common.h> @@ -58,7 +58,7 @@ #include <ide.h> #include <pci.h> -extern ulong ide_bus_offset[CFG_IDE_MAXBUS]; +extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS]; int ide_preinit (void) { @@ -67,7 +67,7 @@ int ide_preinit (void) int l; status = 1; - for (l = 0; l < CFG_IDE_MAXBUS; l++) { + for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) { ide_bus_offset[l] = -ATA_STATUS; } devbusfn = pci_find_device (0x1095, 0x0680, 0); @@ -77,11 +77,11 @@ int ide_preinit (void) pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, (u32 *) &ide_bus_offset[0]); ide_bus_offset[0] &= 0xfffffff8; - ide_bus_offset[0] += CFG_PCI0_IO_SPACE; + ide_bus_offset[0] += CONFIG_SYS_PCI0_IO_SPACE; pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2, (u32 *) &ide_bus_offset[1]); ide_bus_offset[1] &= 0xfffffff8; - ide_bus_offset[1] += CFG_PCI0_IO_SPACE; + ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE; /* init various things - taken from the Linux driver */ /* set PIO mode */ pci_write_config_byte(devbusfn, 0x80, 0x00); diff --git a/drivers/block/sym53c8xx.c b/drivers/block/sym53c8xx.c index 44e998b55..0c60bf80e 100644 --- a/drivers/block/sym53c8xx.c +++ b/drivers/block/sym53c8xx.c @@ -426,7 +426,7 @@ void scsi_bus_reset(void) { unsigned char t; int i; - int end = CFG_SCSI_SPIN_UP_TIME*1000; + int end = CONFIG_SYS_SCSI_SPIN_UP_TIME*1000; t=scsi_read_byte(SCNTL1); scsi_write_byte(SCNTL1,(t | CRST)); @@ -836,10 +836,10 @@ void scsi_chip_init(void) scsi_write_byte(SCNTL0,0xC0); /* full arbitration no start, no message, parity disabled, master */ scsi_write_byte(SCNTL1,0x00); scsi_write_byte(SCNTL2,0x00); -#ifndef CFG_SCSI_SYM53C8XX_CCF /* config value for none 40 mhz clocks */ +#ifndef CONFIG_SYS_SCSI_SYM53C8XX_CCF /* config value for none 40 mhz clocks */ scsi_write_byte(SCNTL3,0x13); /* synchronous clock 40/4=10MHz, asynchronous 40MHz */ #else - scsi_write_byte(SCNTL3,CFG_SCSI_SYM53C8XX_CCF); /* config value for none 40 mhz clocks */ + scsi_write_byte(SCNTL3,CONFIG_SYS_SCSI_SYM53C8XX_CCF); /* config value for none 40 mhz clocks */ #endif scsi_write_byte(SCID,0x47); /* ID=7, enable reselection */ scsi_write_byte(SXFER,0x00); /* synchronous transfer period 10MHz, asynchronous */ diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c index dfaab528b..e8dff0acf 100644 --- a/drivers/block/systemace.c +++ b/drivers/block/systemace.c @@ -20,7 +20,7 @@ /* * The Xilinx SystemACE chip support is activated by defining - * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE + * CONFIG_SYSTEMACE to turn on support, and CONFIG_SYS_SYSTEMACE_BASE * to set the base address of the device. This code currently * assumes that the chip is connected via a byte-wide bus. * @@ -47,25 +47,25 @@ /* * The ace_readw and writew functions read/write 16bit words, but the * offset value is the BYTE offset as most used in the Xilinx - * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined + * datasheet for the SystemACE chip. The CONFIG_SYS_SYSTEMACE_BASE is defined * to be the base address for the chip, usually in the local * peripheral bus. */ -#if (CFG_SYSTEMACE_WIDTH == 8) +#if (CONFIG_SYS_SYSTEMACE_WIDTH == 8) #if !defined(__BIG_ENDIAN) -#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)<<8) | \ - (readb(CFG_SYSTEMACE_BASE+off+1))) -#define ace_writew(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \ - writeb(val, CFG_SYSTEMACE_BASE+off+1);} +#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)<<8) | \ + (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1))) +#define ace_writew(val, off) {writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off); \ + writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off+1);} #else -#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)) | \ - (readb(CFG_SYSTEMACE_BASE+off+1)<<8)) -#define ace_writew(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \ - writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);} +#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)) | \ + (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)<<8)) +#define ace_writew(val, off) {writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off); \ + writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off+1);} #endif #else -#define ace_readw(off) (in16(CFG_SYSTEMACE_BASE+off)) -#define ace_writew(val, off) (out16(CFG_SYSTEMACE_BASE+off,val)) +#define ace_readw(off) (in16(CONFIG_SYS_SYSTEMACE_BASE+off)) +#define ace_writew(val, off) (out16(CONFIG_SYS_SYSTEMACE_BASE+off,val)) #endif /* */ @@ -120,7 +120,7 @@ block_dev_desc_t *systemace_get_dev(int dev) /* * Ensure the correct bus mode (8/16 bits) gets enabled */ - ace_writew(CFG_SYSTEMACE_WIDTH == 8 ? 0 : 0x0001, 0); + ace_writew(CONFIG_SYS_SYSTEMACE_WIDTH == 8 ? 0 : 0x0001, 0); init_part(&systemace_dev); diff --git a/drivers/hwmon/adm1021.c b/drivers/hwmon/adm1021.c index b791ec041..d753e9a72 100644 --- a/drivers/hwmon/adm1021.c +++ b/drivers/hwmon/adm1021.c @@ -81,7 +81,7 @@ typedef } dtt_cfg_t; -dtt_cfg_t dttcfg[] = CFG_DTT_ADM1021; +dtt_cfg_t dttcfg[] = CONFIG_SYS_DTT_ADM1021; int dtt_read (int sensor, int reg) @@ -174,7 +174,7 @@ dtt_init (void) const char *const header = "DTT: "; /* switch to correct I2C bus */ - I2C_SET_BUS(CFG_DTT_BUS_NUM); + I2C_SET_BUS(CONFIG_SYS_DTT_BUS_NUM); for (i = 0; i < sizeof(sensors); i++) { if (_dtt_init(sensors[i]) != 0) diff --git a/drivers/hwmon/ds1621.c b/drivers/hwmon/ds1621.c index 523f8bee5..d15a082df 100644 --- a/drivers/hwmon/ds1621.c +++ b/drivers/hwmon/ds1621.c @@ -125,7 +125,7 @@ static int _dtt_init(int sensor) /* * Setup High Temp. */ - val = ((CFG_DTT_MAX_TEMP * 2) << 7) & 0xff80; + val = ((CONFIG_SYS_DTT_MAX_TEMP * 2) << 7) & 0xff80; if (dtt_write(sensor, DTT_TEMP_HIGH, val) != 0) return 1; udelay(50000); /* Max 50ms */ @@ -133,7 +133,7 @@ static int _dtt_init(int sensor) /* * Setup Low Temp - hysteresis. */ - val = (((CFG_DTT_MAX_TEMP - CFG_DTT_HYSTERESIS) * 2) << 7) & 0xff80; + val = (((CONFIG_SYS_DTT_MAX_TEMP - CONFIG_SYS_DTT_HYSTERESIS) * 2) << 7) & 0xff80; if (dtt_write(sensor, DTT_TEMP_LOW, val) != 0) return 1; udelay(50000); /* Max 50ms */ diff --git a/drivers/hwmon/ds1775.c b/drivers/hwmon/ds1775.c index 6a4d8e56d..80fb26f7b 100644 --- a/drivers/hwmon/ds1775.c +++ b/drivers/hwmon/ds1775.c @@ -24,7 +24,7 @@ #include <i2c.h> #include <dtt.h> -#define DTT_I2C_DEV_CODE CFG_I2C_DTT_ADDR /* Dallas Semi's DS1775 device code */ +#define DTT_I2C_DEV_CODE CONFIG_SYS_I2C_DTT_ADDR /* Dallas Semi's DS1775 device code */ #define DTT_READ_TEMP 0x0 #define DTT_CONFIG 0x1 #define DTT_TEMP_HYST 0x2 @@ -105,7 +105,7 @@ static int _dtt_init(int sensor) /* * Setup High Temp */ - val = ((CFG_DTT_MAX_TEMP * 2) << 7) & 0xff80; + val = ((CONFIG_SYS_DTT_MAX_TEMP * 2) << 7) & 0xff80; if (dtt_write(sensor, DTT_TEMP_OS, val) != 0) return 1; udelay(50000); /* Max 50ms */ @@ -113,7 +113,7 @@ static int _dtt_init(int sensor) /* * Setup Low Temp - hysteresis */ - val = (((CFG_DTT_MAX_TEMP - CFG_DTT_HYSTERESIS) * 2) << 7) & 0xff80; + val = (((CONFIG_SYS_DTT_MAX_TEMP - CONFIG_SYS_DTT_HYSTERESIS) * 2) << 7) & 0xff80; if (dtt_write(sensor, DTT_TEMP_HYST, val) != 0) return 1; udelay(50000); /* Max 50ms */ diff --git a/drivers/hwmon/lm73.c b/drivers/hwmon/lm73.c index dd2468353..7b5d893ff 100644 --- a/drivers/hwmon/lm73.c +++ b/drivers/hwmon/lm73.c @@ -124,11 +124,11 @@ static int _dtt_init(int const sensor) /* * Setup THIGH (upper-limit) and TLOW (lower-limit) registers */ - val = CFG_DTT_MAX_TEMP << 7; + val = CONFIG_SYS_DTT_MAX_TEMP << 7; if (dtt_write(sensor, DTT_TEMP_HIGH, val)) return -1; - val = CFG_DTT_MIN_TEMP << 7; + val = CONFIG_SYS_DTT_MIN_TEMP << 7; if (dtt_write(sensor, DTT_TEMP_LOW, val)) return -1; /* diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c index 17379e531..81198215f 100644 --- a/drivers/hwmon/lm75.c +++ b/drivers/hwmon/lm75.c @@ -32,8 +32,8 @@ /* * Device code */ -#if defined(CFG_I2C_DTT_ADDR) -#define DTT_I2C_DEV_CODE CFG_I2C_DTT_ADDR +#if defined(CONFIG_SYS_I2C_DTT_ADDR) +#define DTT_I2C_DEV_CODE CONFIG_SYS_I2C_DTT_ADDR #else #define DTT_I2C_DEV_CODE 0x48 /* ON Semi's LM75 device */ #endif @@ -124,12 +124,12 @@ static int _dtt_init(int sensor) int val; /* Setup TSET ( trip point ) register */ - val = ((CFG_DTT_MAX_TEMP * 2) << 7) & 0xff80; /* trip */ + val = ((CONFIG_SYS_DTT_MAX_TEMP * 2) << 7) & 0xff80; /* trip */ if (dtt_write(sensor, DTT_TEMP_SET, val) != 0) return 1; /* Setup THYST ( untrip point ) register - Hysteresis */ - val = (((CFG_DTT_MAX_TEMP - CFG_DTT_HYSTERESIS) * 2) << 7) & 0xff80; + val = (((CONFIG_SYS_DTT_MAX_TEMP - CONFIG_SYS_DTT_HYSTERESIS) * 2) << 7) & 0xff80; if (dtt_write(sensor, DTT_TEMP_HYST, val) != 0) return 1; @@ -157,7 +157,7 @@ int dtt_init (void) /* switch to correct I2C bus */ old_bus = I2C_GET_BUS(); - I2C_SET_BUS(CFG_DTT_BUS_NUM); + I2C_SET_BUS(CONFIG_SYS_DTT_BUS_NUM); for (i = 0; i < sizeof(sensors); i++) { if (_dtt_init(sensors[i]) != 0) diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 264553dfa..281a88b97 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -26,7 +26,7 @@ #include <asm/io.h> #include <asm/fsl_i2c.h> /* HW definitions */ -#define I2C_TIMEOUT (CFG_HZ / 4) +#define I2C_TIMEOUT (CONFIG_SYS_HZ / 4) #define I2C_READ_BIT 1 #define I2C_WRITE_BIT 0 @@ -38,18 +38,18 @@ DECLARE_GLOBAL_DATA_PTR; * runs from ROM, and we can't switch buses because we can't modify * the global variables. */ -#ifdef CFG_SPD_BUS_NUM -static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CFG_SPD_BUS_NUM; +#ifdef CONFIG_SYS_SPD_BUS_NUM +static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CONFIG_SYS_SPD_BUS_NUM; #else static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; #endif -static unsigned int i2c_bus_speed[2] = {CFG_I2C_SPEED, CFG_I2C_SPEED}; +static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED}; static const struct fsl_i2c *i2c_dev[2] = { - (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET), -#ifdef CFG_I2C2_OFFSET - (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET) + (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET), +#ifdef CONFIG_SYS_I2C2_OFFSET + (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET) #endif }; @@ -176,7 +176,7 @@ i2c_init(int speed, int slaveadd) struct fsl_i2c *dev; unsigned int temp; - dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET); + dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET); writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ @@ -187,8 +187,8 @@ i2c_init(int speed, int slaveadd) writeb(0x0, &dev->sr); /* clear status register */ writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ -#ifdef CFG_I2C2_OFFSET - dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET); +#ifdef CONFIG_SYS_I2C2_OFFSET + dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET); writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ @@ -386,7 +386,7 @@ i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) int i2c_set_bus_num(unsigned int bus) { -#ifdef CFG_I2C2_OFFSET +#ifdef CONFIG_SYS_I2C2_OFFSET if (bus > 1) { #else if (bus > 0) { diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 1f6ba1f39..eedad065f 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -47,14 +47,14 @@ #define I2SR_IIF (1 << 1) #define I2SR_RX_NO_AK (1 << 0) -#ifdef CFG_I2C_MX31_PORT1 +#ifdef CONFIG_SYS_I2C_MX31_PORT1 #define I2C_BASE 0x43f80000 -#elif defined (CFG_I2C_MX31_PORT2) +#elif defined (CONFIG_SYS_I2C_MX31_PORT2) #define I2C_BASE 0x43f98000 -#elif defined (CFG_I2C_MX31_PORT3) +#elif defined (CONFIG_SYS_I2C_MX31_PORT3) #define I2C_BASE 0x43f84000 #else -#error "define CFG_I2C_MX31_PORTx to use the mx31 I2C driver" +#error "define CONFIG_SYS_I2C_MX31_PORTx to use the mx31 I2C driver" #endif #ifdef DEBUG diff --git a/drivers/i2c/omap1510_i2c.c b/drivers/i2c/omap1510_i2c.c index 388951db1..a4e6227c5 100644 --- a/drivers/i2c/omap1510_i2c.c +++ b/drivers/i2c/omap1510_i2c.c @@ -205,7 +205,7 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_read_byte (chip, addr + i, &buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } @@ -230,7 +230,7 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_write_byte (chip, addr + i, buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index d16cfb123..134dccb61 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -252,7 +252,7 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_read_byte (chip, addr + i, &buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } @@ -277,7 +277,7 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_write_byte (chip, addr + i, buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index 0a9feb67c..508d3d7d7 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -75,7 +75,7 @@ static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; /*----------------------------------------------------------------------- * Local functions */ -#if !defined(CFG_I2C_INIT_BOARD) +#if !defined(CONFIG_SYS_I2C_INIT_BOARD) static void send_reset (void); #endif static void send_start (void); @@ -84,7 +84,7 @@ static void send_ack (int); static int write_byte (uchar byte); static uchar read_byte (int); -#if !defined(CFG_I2C_INIT_BOARD) +#if !defined(CONFIG_SYS_I2C_INIT_BOARD) /*----------------------------------------------------------------------- * Send a reset sequence consisting of 9 clocks with the data signal high * to clock any confused device back into an idle state. Also send a @@ -224,7 +224,7 @@ unsigned int i2c_get_bus_num(void) int i2c_set_bus_num(unsigned int bus) { #if defined(CONFIG_I2C_MUX) - if (bus < CFG_MAX_I2C_BUS) { + if (bus < CONFIG_SYS_MAX_I2C_BUS) { i2c_bus_num = bus; } else { int ret; @@ -236,7 +236,7 @@ int i2c_set_bus_num(unsigned int bus) return ret; } #else - if (bus >= CFG_MAX_I2C_BUS) + if (bus >= CONFIG_SYS_MAX_I2C_BUS) return -1; i2c_bus_num = bus; #endif @@ -246,12 +246,12 @@ int i2c_set_bus_num(unsigned int bus) /* TODO: add 100/400k switching */ unsigned int i2c_get_bus_speed(void) { - return CFG_I2C_SPEED; + return CONFIG_SYS_I2C_SPEED; } int i2c_set_bus_speed(unsigned int speed) { - if (speed != CFG_I2C_SPEED) + if (speed != CONFIG_SYS_I2C_SPEED) return -1; return 0; @@ -297,7 +297,7 @@ static uchar read_byte(int ack) */ void i2c_init (int speed, int slaveaddr) { -#if defined(CFG_I2C_INIT_BOARD) +#if defined(CONFIG_SYS_I2C_INIT_BOARD) /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ @@ -342,7 +342,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", chip, addr, alen, buffer, len); -#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW +#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW /* * EEPROM chips that implement "address overflow" are ones * like Catalyst 24WC04/08/16 which has 9/10/11 bits of @@ -354,7 +354,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) * still be one byte because the extra address bits are * hidden in the chip address. */ - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", chip, addr); diff --git a/drivers/i2c/tsi108_i2c.c b/drivers/i2c/tsi108_i2c.c index 695e39341..fda822c52 100644 --- a/drivers/i2c/tsi108_i2c.c +++ b/drivers/i2c/tsi108_i2c.c @@ -60,14 +60,14 @@ static int i2c_read_byte ( chan_offset = TSI108_I2C_SDRAM_OFFSET; /* Check if I2C operation is in progress */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { /* Set device address and operation (read = 0) */ temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); - *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = temp; /* Issue the read command @@ -75,13 +75,13 @@ static int i2c_read_byte ( * (size = 1 byte, lane = 0) */ - *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = (I2C_CNTRL2_START); /* Wait until operation completed */ do { /* Read I2C operation status */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) { if (0 == (temp & @@ -90,7 +90,7 @@ static int i2c_read_byte ( ) { op_status = TSI108_I2C_SUCCESS; - temp = *(u32 *) (CFG_TSI108_CSR_BASE + + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_RD_DATA); @@ -172,25 +172,25 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ u32 op_status = TSI108_I2C_TIMEOUT_ERR; /* Check if I2C operation is in progress */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { /* Place data into the I2C Tx Register */ - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_TX_DATA) = (u32) * buffer; /* Set device address and operation */ temp = I2C_CNTRL1_I2CWRITE | (byte_addr << 16) | ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL1) = temp; /* Issue the write command (at this moment all other parameters * are 0 (size = 1 byte, lane = 0) */ - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2) = (I2C_CNTRL2_START); op_status = TSI108_I2C_TIMEOUT_ERR; @@ -198,7 +198,7 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ /* Wait until operation completed */ do { /* Read I2C operation status */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { if (0 == (temp & diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c index d152768b8..58094c925 100644 --- a/drivers/input/i8042.c +++ b/drivers/input/i8042.c @@ -41,7 +41,7 @@ extern void gt_cpcidvi_out8(u32 offset, u8 data); #ifdef CONFIG_CONSOLE_CURSOR extern void console_cursor (int state); -static int blinkCount = CFG_CONSOLE_BLINK_COUNT; +static int blinkCount = CONFIG_SYS_CONSOLE_BLINK_COUNT; static int cursor_state = 0; #endif @@ -368,7 +368,7 @@ int i8042_tstc (void) { cursor_state ^= 1; console_cursor (cursor_state); - blinkCount = CFG_CONSOLE_BLINK_COUNT; + blinkCount = CONFIG_SYS_CONSOLE_BLINK_COUNT; udelay (10); } #endif @@ -409,7 +409,7 @@ int i8042_getc (void) { cursor_state ^= 1; console_cursor (cursor_state); - blinkCount = CFG_CONSOLE_BLINK_COUNT; + blinkCount = CONFIG_SYS_CONSOLE_BLINK_COUNT; } udelay (10); #endif diff --git a/drivers/input/keyboard.c b/drivers/input/keyboard.c index a634d76d6..512b9f28c 100644 --- a/drivers/input/keyboard.c +++ b/drivers/input/keyboard.c @@ -258,12 +258,12 @@ void handle_scancode(unsigned char scancode) * Init ******************************************************************/ -#ifdef CFG_CONSOLE_OVERWRITE_ROUTINE +#ifdef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE extern int overwrite_console (void); #define OVERWRITE_CONSOLE overwrite_console () #else #define OVERWRITE_CONSOLE 0 -#endif /* CFG_CONSOLE_OVERWRITE_ROUTINE */ +#endif /* CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE */ int kbd_init (void) { diff --git a/drivers/input/ps2ser.c b/drivers/input/ps2ser.c index 480ffa25a..1af3fde64 100644 --- a/drivers/input/ps2ser.c +++ b/drivers/input/ps2ser.c @@ -18,7 +18,7 @@ #include <asm/io.h> #include <asm/atomic.h> #include <ps2mult.h> -#if defined(CFG_NS16550) || defined(CONFIG_MPC85xx) +#if defined(CONFIG_SYS_NS16550) || defined(CONFIG_MPC85xx) #include <ns16550.h> #endif @@ -51,9 +51,9 @@ DECLARE_GLOBAL_DATA_PTR; defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555) #if CONFIG_PS2SERIAL == 1 -#define COM_BASE (CFG_CCSRBAR+0x4500) +#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4500) #elif CONFIG_PS2SERIAL == 2 -#define COM_BASE (CFG_CCSRBAR+0x4600) +#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4600) #else #error CONFIG_PS2SERIAL must be in 1 ... 2 #endif @@ -88,7 +88,7 @@ int ps2ser_init(void) /* select clock sources */ #if defined(CONFIG_MGT5100) psc->psc_clock_select = 0xdd00; - baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32; + baseclk = (CONFIG_SYS_MPC5XXX_CLKIN + 16) / 32; #elif defined(CONFIG_MPC5200) psc->psc_clock_select = 0; baseclk = (gd->ipb_clk + 16) / 32; @@ -129,8 +129,8 @@ int ps2ser_init(void) com_port->ier = 0x00; com_port->lcr = LCR_BKSE | LCR_8N1; - com_port->dll = (CFG_NS16550_CLK / 16 / PS2SER_BAUD) & 0xff; - com_port->dlm = ((CFG_NS16550_CLK / 16 / PS2SER_BAUD) >> 8) & 0xff; + com_port->dll = (CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) & 0xff; + com_port->dlm = ((CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) >> 8) & 0xff; com_port->lcr = LCR_8N1; com_port->mcr = (MCR_DTR | MCR_RTS); com_port->fcr = (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR); diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c index 2e946143b..64df1c988 100644 --- a/drivers/misc/fsl_law.c +++ b/drivers/misc/fsl_law.c @@ -46,7 +46,7 @@ DECLARE_GLOBAL_DATA_PTR; void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id) { - volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08); + volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08); volatile u32 *lawbar = base + 8 * idx; volatile u32 *lawar = base + 8 * idx + 2; @@ -91,7 +91,7 @@ int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id) void disable_law(u8 idx) { - volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08); + volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08); volatile u32 *lawbar = base + 8 * idx; volatile u32 *lawar = base + 8 * idx + 2; @@ -105,7 +105,7 @@ void disable_law(u8 idx) void print_laws(void) { - volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08); + volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08); volatile u32 *lawbar = base; volatile u32 *lawar = base + 2; int i; diff --git a/drivers/misc/ns87308.c b/drivers/misc/ns87308.c index 6642c2e07..9130a1ff2 100644 --- a/drivers/misc/ns87308.c +++ b/drivers/misc/ns87308.c @@ -27,7 +27,7 @@ void initialise_ns87308 (void) { -#ifdef CFG_NS87308_PS2MOD +#ifdef CONFIG_SYS_NS87308_PS2MOD unsigned char data; /* @@ -38,80 +38,80 @@ void initialise_ns87308 (void) write_pnp_config(SUPOERIO_CONF1, data); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_KBC1) - PNP_SET_DEVICE_BASE(LDEV_KBC1, CFG_NS87308_KBC1_BASE); +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_KBC1) + PNP_SET_DEVICE_BASE(LDEV_KBC1, CONFIG_SYS_NS87308_KBC1_BASE); write_pnp_config(LUN_CONFIG_REG, 0); write_pnp_config(CBASE_HIGH, 0x00); write_pnp_config(CBASE_LOW, 0x64); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_MOUSE) +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_MOUSE) PNP_ACTIVATE_DEVICE(LDEV_MOUSE); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_RTC_APC) - PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CFG_NS87308_RTC_BASE); +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RTC_APC) + PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CONFIG_SYS_NS87308_RTC_BASE); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_FDC) - PNP_SET_DEVICE_BASE(LDEV_FDC, CFG_NS87308_FDC_BASE); +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_FDC) + PNP_SET_DEVICE_BASE(LDEV_FDC, CONFIG_SYS_NS87308_FDC_BASE); write_pnp_config(LUN_CONFIG_REG, 0x40); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_RARP) - PNP_SET_DEVICE_BASE(LDEV_PARP, CFG_NS87308_LPT_BASE); +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RARP) + PNP_SET_DEVICE_BASE(LDEV_PARP, CONFIG_SYS_NS87308_LPT_BASE); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_UART1) - PNP_SET_DEVICE_BASE(LDEV_UART1, CFG_NS87308_UART1_BASE); +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART1) + PNP_SET_DEVICE_BASE(LDEV_UART1, CONFIG_SYS_NS87308_UART1_BASE); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_UART2) - PNP_SET_DEVICE_BASE(LDEV_UART2, CFG_NS87308_UART2_BASE); +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART2) + PNP_SET_DEVICE_BASE(LDEV_UART2, CONFIG_SYS_NS87308_UART2_BASE); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_GPIO) - PNP_SET_DEVICE_BASE(LDEV_GPIO, CFG_NS87308_GPIO_BASE); +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_GPIO) + PNP_SET_DEVICE_BASE(LDEV_GPIO, CONFIG_SYS_NS87308_GPIO_BASE); #endif -#if (CFG_NS87308_DEVS & CFG_NS87308_POWRMAN) -#ifndef CFG_NS87308_PWMAN_BASE +#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_POWRMAN) +#ifndef CONFIG_SYS_NS87308_PWMAN_BASE PNP_ACTIVATE_DEVICE(LDEV_POWRMAN); #else - PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CFG_NS87308_PWMAN_BASE); + PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CONFIG_SYS_NS87308_PWMAN_BASE); /* * Enable all units */ - write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER1, 0x7d); - write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_FER2, 0x87); + write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER1, 0x7d); + write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER2, 0x87); -#ifdef CFG_NS87308_PMC1 - write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC1, CFG_NS87308_PMC1); +#ifdef CONFIG_SYS_NS87308_PMC1 + write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC1, CONFIG_SYS_NS87308_PMC1); #endif -#ifdef CFG_NS87308_PMC2 - write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC2, CFG_NS87308_PMC2); +#ifdef CONFIG_SYS_NS87308_PMC2 + write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC2, CONFIG_SYS_NS87308_PMC2); #endif -#ifdef CFG_NS87308_PMC3 - write_pm_reg(CFG_NS87308_PWMAN_BASE, PWM_PMC3, CFG_NS87308_PMC3); +#ifdef CONFIG_SYS_NS87308_PMC3 + write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC3, CONFIG_SYS_NS87308_PMC3); #endif #endif #endif -#ifdef CFG_NS87308_CS0_BASE - PNP_PGCS_CSLINE_BASE(0, CFG_NS87308_CS0_BASE); - PNP_PGCS_CSLINE_CONF(0, CFG_NS87308_CS0_CONF); +#ifdef CONFIG_SYS_NS87308_CS0_BASE + PNP_PGCS_CSLINE_BASE(0, CONFIG_SYS_NS87308_CS0_BASE); + PNP_PGCS_CSLINE_CONF(0, CONFIG_SYS_NS87308_CS0_CONF); #endif -#ifdef CFG_NS87308_CS1_BASE - PNP_PGCS_CSLINE_BASE(1, CFG_NS87308_CS1_BASE); - PNP_PGCS_CSLINE_CONF(1, CFG_NS87308_CS1_CONF); +#ifdef CONFIG_SYS_NS87308_CS1_BASE + PNP_PGCS_CSLINE_BASE(1, CONFIG_SYS_NS87308_CS1_BASE); + PNP_PGCS_CSLINE_CONF(1, CONFIG_SYS_NS87308_CS1_CONF); #endif -#ifdef CFG_NS87308_CS2_BASE - PNP_PGCS_CSLINE_BASE(2, CFG_NS87308_CS2_BASE); - PNP_PGCS_CSLINE_CONF(2, CFG_NS87308_CS2_CONF); +#ifdef CONFIG_SYS_NS87308_CS2_BASE + PNP_PGCS_CSLINE_BASE(2, CONFIG_SYS_NS87308_CS2_BASE); + PNP_PGCS_CSLINE_CONF(2, CONFIG_SYS_NS87308_CS2_CONF); #endif } diff --git a/drivers/mmc/atmel_mci.c b/drivers/mmc/atmel_mci.c index a151488d1..3aa92f26e 100644 --- a/drivers/mmc/atmel_mci.c +++ b/drivers/mmc/atmel_mci.c @@ -38,16 +38,16 @@ #define pr_debug(...) do { } while(0) #endif -#ifndef CFG_MMC_CLK_OD -#define CFG_MMC_CLK_OD 150000 +#ifndef CONFIG_SYS_MMC_CLK_OD +#define CONFIG_SYS_MMC_CLK_OD 150000 #endif -#ifndef CFG_MMC_CLK_PP -#define CFG_MMC_CLK_PP 5000000 +#ifndef CONFIG_SYS_MMC_CLK_PP +#define CONFIG_SYS_MMC_CLK_PP 5000000 #endif -#ifndef CFG_MMC_OP_COND -#define CFG_MMC_OP_COND 0x00100000 +#ifndef CONFIG_SYS_MMC_OP_COND +#define CONFIG_SYS_MMC_OP_COND 0x00100000 #endif #define MMC_DEFAULT_BLKLEN 512 @@ -349,7 +349,7 @@ static int sd_init_card(struct mmc_cid *cid, int verbose) mmc_idle_cards(); for (i = 0; i < 1000; i++) { - ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CFG_MMC_OP_COND, + ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND, resp, R3 | NID); if (ret || (resp[0] & 0x80000000)) break; @@ -385,7 +385,7 @@ static int mmc_init_card(struct mmc_cid *cid, int verbose) mmc_idle_cards(); for (i = 0; i < 1000; i++) { - ret = mmc_cmd(MMC_CMD_SEND_OP_COND, CFG_MMC_OP_COND, resp, + ret = mmc_cmd(MMC_CMD_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND, resp, R3 | NID | OPEN_DRAIN); if (ret || (resp[0] & 0x80000000)) break; @@ -434,7 +434,7 @@ static void mci_set_data_timeout(struct mmc_csd *csd) timeout_clks = csd->nsac * 100; timeout_clks += (((timeout_ns + 9) / 10) - * ((CFG_MMC_CLK_PP + 99999) / 100000) + 9999) / 10000; + * ((CONFIG_SYS_MMC_CLK_PP + 99999) / 100000) + 9999) / 10000; if (!mmc_card_is_sd) timeout_clks *= 10; else @@ -475,7 +475,7 @@ int mmc_init(int verbose) mmci_writel(CR, MMCI_BIT(MCIEN)); mmci_writel(DTOR, 0x5f); mmci_writel(IDR, ~0UL); - mci_set_mode(CFG_MMC_CLK_OD, MMC_DEFAULT_BLKLEN); + mci_set_mode(CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN); mmc_card_is_sd = 0; @@ -520,7 +520,7 @@ int mmc_init(int verbose) mmc_blkdev.blksz = 512; mmc_blkdev.lba = (csd.c_size + 1) * (1 << (csd.c_size_mult + 2)); - mci_set_mode(CFG_MMC_CLK_PP, mmc_blkdev.blksz); + mci_set_mode(CONFIG_SYS_MMC_CLK_PP, mmc_blkdev.blksz); #if 0 if (fat_register_device(&mmc_blkdev, 1)) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 7bfdc43da..c40bf6610 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -57,12 +57,12 @@ * AMD/Spansion Application Note: Migration from Single-byte to Three-byte * Device IDs, Publication Number 25538 Revision A, November 8, 2001 * - * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between + * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between * reading and writing ... (yes there is such a Hardware). */ -#ifndef CFG_FLASH_BANKS_LIST -#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } +#ifndef CONFIG_SYS_FLASH_BANKS_LIST +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif #define FLASH_CMD_CFI 0x98 @@ -143,7 +143,7 @@ #define CFI_CMDSET_SST 258 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 -#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ +#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ # undef FLASH_CMD_RESET # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ #endif @@ -159,11 +159,11 @@ typedef union { static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; -/* use CFG_MAX_FLASH_BANKS_DETECT if defined */ -#ifdef CFG_MAX_FLASH_BANKS_DETECT -# define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS_DETECT +/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ +#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT +# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT #else -# define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS +# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS #endif flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ @@ -171,8 +171,8 @@ flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ /* * Check if chip width is defined. If not, start detecting with 8bit. */ -#ifndef CFG_FLASH_CFI_WIDTH -#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#ifndef CONFIG_SYS_FLASH_CFI_WIDTH +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #endif typedef unsigned long flash_sect_t; @@ -255,20 +255,20 @@ u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); /*----------------------------------------------------------------------- */ -#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) +#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) static flash_info_t *flash_get_info(ulong base) { int i; flash_info_t * info = 0; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { info = & flash_info[i]; if (info->size && info->start[0] <= base && base <= info->start[0] + info->size - 1) break; } - return i == CFG_MAX_FLASH_BANKS ? 0 : info; + return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; } #endif @@ -309,7 +309,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) int i; int cword_offset; int cp_offset; -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) u32 cmd_le = cpu_to_le32(cmd); #endif uchar val; @@ -317,7 +317,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) for (i = info->portwidth; i > 0; i--){ cword_offset = (info->portwidth-i)%info->chipwidth; -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) cp_offset = info->portwidth - i; val = *((uchar*)&cmd_le + cword_offset); #else @@ -374,7 +374,7 @@ static inline uchar flash_read_uchar (flash_info_t * info, uint offset) uchar retval; cp = flash_map (info, 0, offset); -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) retval = flash_read8(cp); #else retval = flash_read8(cp + info->portwidth - 1); @@ -419,7 +419,7 @@ static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); } #endif -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) retval = ((flash_read8(addr) << 16) | (flash_read8(addr + info->portwidth) << 24) | (flash_read8(addr + 2 * info->portwidth)) | @@ -646,8 +646,8 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; -#if CFG_HZ != 1000 - tout *= CFG_HZ/1000; +#if CONFIG_SYS_HZ != 1000 + tout *= CONFIG_SYS_HZ/1000; #endif /* Wait for command completion */ @@ -716,7 +716,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, */ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) { -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) unsigned short w; unsigned int l; unsigned long long ll; @@ -727,7 +727,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) cword->c = c; break; case FLASH_CFI_16BIT: -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) w = c; w <<= 8; cword->w = (cword->w >> 8) | w; @@ -736,7 +736,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) #endif break; case FLASH_CFI_32BIT: -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) l = c; l <<= 24; cword->l = (cword->l >> 8) | l; @@ -745,7 +745,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) #endif break; case FLASH_CFI_64BIT: -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) ll = c; ll <<= 56; cword->ll = (cword->ll >> 8) | ll; @@ -850,7 +850,7 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, info->write_tout, "write"); } -#ifdef CFG_FLASH_USE_BUFFER_WRITE +#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len) @@ -1024,7 +1024,7 @@ out_unmap: unmap_physmem(dst, len); return retcode; } -#endif /* CFG_FLASH_USE_BUFFER_WRITE */ +#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ /*----------------------------------------------------------------------- @@ -1173,7 +1173,7 @@ void flash_print_info (flash_info_t * info) for (i = 0; i < info->sector_count; ++i) { if ((i % 5) == 0) printf ("\n"); -#ifdef CFG_FLASH_EMPTY_INFO +#ifdef CONFIG_SYS_FLASH_EMPTY_INFO int k; int size; int erased; @@ -1198,7 +1198,7 @@ void flash_print_info (flash_info_t * info) info->start[i], erased ? 'E' : ' ', info->protect[i] ? "RO" : " "); -#else /* ! CFG_FLASH_EMPTY_INFO */ +#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ printf (" %08lX %s ", info->start[i], info->protect[i] ? "RO" : " "); @@ -1242,7 +1242,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) int aln; cfiword_t cword; int i, rc; -#ifdef CFG_FLASH_USE_BUFFER_WRITE +#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE int buffered_size; #endif #ifdef CONFIG_FLASH_SHOW_PROGRESS @@ -1286,7 +1286,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) } /* handle the aligned part */ -#ifdef CFG_FLASH_USE_BUFFER_WRITE +#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE buffered_size = (info->portwidth / info->chipwidth); buffered_size *= info->buffer_size; while (cnt >= info->portwidth) { @@ -1326,7 +1326,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) cnt -= info->portwidth; FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); } -#endif /* CFG_FLASH_USE_BUFFER_WRITE */ +#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ if (cnt == 0) { return (0); @@ -1350,7 +1350,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) /*----------------------------------------------------------------------- */ -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION int flash_real_protect (flash_info_t * info, long sector, int prot) { @@ -1457,7 +1457,7 @@ void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); } -#endif /* CFG_FLASH_PROTECTION */ +#endif /* CONFIG_SYS_FLASH_PROTECTION */ /*----------------------------------------------------------------------- * Reverse the order of the erase regions in the CFI QRY structure. @@ -1501,7 +1501,7 @@ static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) cmdset_intel_read_jedec_ids(info); flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION /* read legacy lock/unlock bit from intel flash */ if (info->ext_addr) { info->legacy_unlock = flash_read_uchar (info, @@ -1717,7 +1717,7 @@ static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) { debug ("flash detect cfi\n"); - for (info->portwidth = CFG_FLASH_CFI_WIDTH; + for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { for (info->chipwidth = FLASH_CFI_BY8; info->chipwidth <= info->portwidth; @@ -1793,7 +1793,7 @@ ulong flash_get_size (ulong base, int banknum) info->ext_addr = 0; info->cfi_version = 0; -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION info->legacy_unlock = 0; #endif @@ -1882,7 +1882,7 @@ ulong flash_get_size (ulong base, int banknum) debug ("erase_region_count = %d erase_region_size = %d\n", erase_region_count, erase_region_size); for (j = 0; j < erase_region_count; j++) { - if (sect_cnt >= CFG_MAX_FLASH_SECT) { + if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { printf("ERROR: too many flash sectors\n"); break; } @@ -1947,41 +1947,41 @@ unsigned long flash_init (void) { unsigned long size = 0; int i; -#if defined(CFG_FLASH_AUTOPROTECT_LIST) +#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) struct apl_s { ulong start; ulong size; - } apl[] = CFG_FLASH_AUTOPROTECT_LIST; + } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; #endif -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION char *s = getenv("unlock"); #endif -#define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CFG_FLASH_BANKS_LIST)[i]) +#define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; if (!flash_detect_legacy (BANK_BASE(i), i)) flash_get_size (BANK_BASE(i), i); size += flash_info[i].size; if (flash_info[i].flash_id == FLASH_UNKNOWN) { -#ifndef CFG_FLASH_QUIET_TEST +#ifndef CONFIG_SYS_FLASH_QUIET_TEST printf ("## Unknown FLASH on Bank %d " "- Size = 0x%08lx = %ld MB\n", i+1, flash_info[i].size, flash_info[i].size << 20); -#endif /* CFG_FLASH_QUIET_TEST */ +#endif /* CONFIG_SYS_FLASH_QUIET_TEST */ } -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION else if ((s != NULL) && (strcmp(s, "yes") == 0)) { /* * Only the U-Boot image and it's environment * is protected, all other sectors are * unprotected (unlocked) if flash hardware - * protection is used (CFG_FLASH_PROTECTION) + * protection is used (CONFIG_SYS_FLASH_PROTECTION) * and the environment variable "unlock" is * set to "yes". */ @@ -2022,15 +2022,15 @@ unsigned long flash_init (void) &flash_info[i]); } } -#endif /* CFG_FLASH_PROTECTION */ +#endif /* CONFIG_SYS_FLASH_PROTECTION */ } /* Monitor protection ON by default */ -#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) +#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) flash_protect (FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - flash_get_info(CFG_MONITOR_BASE)); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, + flash_get_info(CONFIG_SYS_MONITOR_BASE)); #endif /* Environment protection ON by default */ @@ -2049,7 +2049,7 @@ unsigned long flash_init (void) flash_get_info(CONFIG_ENV_ADDR_REDUND)); #endif -#if defined(CFG_FLASH_AUTOPROTECT_LIST) +#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { debug("autoprotecting from %08x to %08x\n", apl[i].start, apl[i].start + apl[i].size - 1); diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c index 049da69fe..201e5180b 100644 --- a/drivers/mtd/dataflash.c +++ b/drivers/mtd/dataflash.c @@ -40,12 +40,12 @@ int AT91F_DataflashInit (void) int dfcode; int part; int last_part; - int found[CFG_MAX_DATAFLASH_BANKS]; + int found[CONFIG_SYS_MAX_DATAFLASH_BANKS]; unsigned char protected; AT91F_SpiInit (); - for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { found[i] = 0; dataflash_info[i].Desc.state = IDLE; dataflash_info[i].id = 0; @@ -179,7 +179,7 @@ void AT91F_DataflashSetEnv (void) unsigned char s[32]; /* Will fit a long int in hex */ unsigned long start; - for (i = 0, part= 0; i < CFG_MAX_DATAFLASH_BANKS; i++) { + for (i = 0, part= 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { for(j = 0; j<NB_DATAFLASH_AREA; j++) { env = area_list[part].setenv; /* Set the environment according to the label...*/ @@ -198,7 +198,7 @@ void dataflash_print_info (void) { int i, j; - for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { if (dataflash_info[i].id != 0) { printf("DataFlash:"); switch (dataflash_info[i].id) { @@ -258,7 +258,7 @@ AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, char addr_valid = 0; int i; - for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) + for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) if ( dataflash_info[i].id && ((((int) *addr) & 0xFF000000) == dataflash_info[i].logical_address)) { @@ -284,7 +284,7 @@ int addr_dataflash (unsigned long addr) int addr_valid = 0; int i; - for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { if ((((int) addr) & 0xFF000000) == dataflash_info[i].logical_address) { addr_valid = 1; @@ -349,7 +349,7 @@ int dataflash_real_protect (int flag, unsigned long start_addr, int i,j, area1, area2, addr_valid = 0; /* find dataflash */ - for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { if ((((int) start_addr) & 0xF0000000) == dataflash_info[i].logical_address) { addr_valid = 1; diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c index 020647a7c..226e1e418 100644 --- a/drivers/mtd/jedec_flash.c +++ b/drivers/mtd/jedec_flash.c @@ -170,7 +170,7 @@ struct amd_flash_info { #define SIZE_8MiB 23 static const struct amd_flash_info jedec_table[] = { -#ifdef CFG_FLASH_LEGACY_256Kx8 +#ifdef CONFIG_SYS_FLASH_LEGACY_256Kx8 { .mfr_id = MANUFACTURER_SST, .dev_id = SST39LF020, @@ -186,7 +186,7 @@ static const struct amd_flash_info jedec_table[] = { } }, #endif -#ifdef CFG_FLASH_LEGACY_512Kx8 +#ifdef CONFIG_SYS_FLASH_LEGACY_512Kx8 { .mfr_id = MANUFACTURER_AMD, .dev_id = AM29LV040B, @@ -216,7 +216,7 @@ static const struct amd_flash_info jedec_table[] = { } }, #endif -#ifdef CFG_FLASH_LEGACY_512Kx16 +#ifdef CONFIG_SYS_FLASH_LEGACY_512Kx16 { .mfr_id = MANUFACTURER_AMD, .dev_id = AM29LV400BB, @@ -307,7 +307,7 @@ static inline void fill_info(flash_info_t *info, const struct amd_flash_info *je debug ("erase_region_count = %d erase_region_size = %d\n", erase_region_count, erase_region_size); for (j = 0; j < erase_region_count; j++) { - if (sect_cnt >= CFG_MAX_FLASH_SECT) { + if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { printf("ERROR: too many flash sectors\n"); break; } diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 435182438..7dda6c4e5 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -693,7 +693,7 @@ static struct fsl_elbc_ctrl *elbc_ctrl; static void fsl_elbc_ctrl_init(void) { - immap_t *im = (immap_t *)CFG_IMMR; + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; elbc_ctrl = kzalloc(sizeof(*elbc_ctrl), GFP_KERNEL); if (!elbc_ctrl) diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index 71a0e4bbb..eeb19ff1b 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -24,15 +24,15 @@ #include <common.h> #include <nand.h> -#ifndef CFG_NAND_BASE_LIST -#define CFG_NAND_BASE_LIST { CFG_NAND_BASE } +#ifndef CONFIG_SYS_NAND_BASE_LIST +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #endif int nand_curr_device = -1; -nand_info_t nand_info[CFG_MAX_NAND_DEVICE]; +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE]; -static struct nand_chip nand_chip[CFG_MAX_NAND_DEVICE]; -static ulong base_address[CFG_MAX_NAND_DEVICE] = CFG_NAND_BASE_LIST; +static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; +static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST; static const char default_nand_name[] = "nand"; @@ -61,7 +61,7 @@ void nand_init(void) { int i; unsigned int size = 0; - for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) { + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) { nand_init_chip(&nand_info[i], &nand_chip[i], base_address[i]); size += nand_info[i].size / 1024; if (nand_curr_device == -1) @@ -69,7 +69,7 @@ void nand_init(void) } printf("%u MiB\n", size / 1024); -#ifdef CFG_NAND_SELECT_DEVICE +#ifdef CONFIG_SYS_NAND_SELECT_DEVICE /* * Select the chip in the board/cpu specific driver */ diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 0913bb874..fe34a4864 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -492,7 +492,7 @@ EXPORT_SYMBOL_GPL(nand_wait_ready); void nand_wait_ready(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; - u32 timeo = (CFG_HZ * 20) / 1000; + u32 timeo = (CONFIG_SYS_HZ * 20) / 1000; reset_timer(); @@ -831,9 +831,9 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this) int state = this->state; if (state == FL_ERASING) - timeo = (CFG_HZ * 400) / 1000; + timeo = (CONFIG_SYS_HZ * 400) / 1000; else - timeo = (CFG_HZ * 20) / 1000; + timeo = (CONFIG_SYS_HZ * 20) / 1000; if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c index 159fe76aa..edaf55a14 100644 --- a/drivers/mtd/nand/s3c64xx.c +++ b/drivers/mtd/nand/s3c64xx.c @@ -141,7 +141,7 @@ static int s3c_nand_device_ready(struct mtd_info *mtdinfo) return !!(readl(NFSTAT) & NFSTAT_RnB); } -#ifdef CFG_S3C_NAND_HWECC +#ifdef CONFIG_SYS_S3C_NAND_HWECC /* * This function is called before encoding ecc codes to ready ecc engine. * Written by jsgood @@ -256,7 +256,7 @@ static int s3c_nand_correct_data(struct mtd_info *mtd, u_char *dat, return ret; } -#endif /* CFG_S3C_NAND_HWECC */ +#endif /* CONFIG_SYS_S3C_NAND_HWECC */ /* * Board-specific NAND initialization. The following members of the @@ -297,7 +297,7 @@ int board_nand_init(struct nand_chip *nand) nand->read_buf = nand_read_buf; #endif -#ifdef CFG_S3C_NAND_HWECC +#ifdef CONFIG_SYS_S3C_NAND_HWECC nand->ecc.hwctl = s3c_nand_enable_hwecc; nand->ecc.calculate = s3c_nand_calculate_ecc; nand->ecc.correct = s3c_nand_correct_data; @@ -307,11 +307,11 @@ int board_nand_init(struct nand_chip *nand) * board one day, it will get more complicated... */ nand->ecc.mode = NAND_ECC_HW; - nand->ecc.size = CFG_NAND_ECCSIZE; - nand->ecc.bytes = CFG_NAND_ECCBYTES; + nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE; + nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES; #else nand->ecc.mode = NAND_ECC_SOFT; -#endif /* ! CFG_S3C_NAND_HWECC */ +#endif /* ! CONFIG_SYS_S3C_NAND_HWECC */ nand->priv = nand_cs + chip_n++; diff --git a/drivers/mtd/nand_legacy/nand_legacy.c b/drivers/mtd/nand_legacy/nand_legacy.c index bf5565a8f..407e901a3 100644 --- a/drivers/mtd/nand_legacy/nand_legacy.c +++ b/drivers/mtd/nand_legacy/nand_legacy.c @@ -66,7 +66,7 @@ struct nand_oob_config { int eccvalid_pos; } oob_config = { {0}, 0, 0}; -struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}}; +struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE] = {{0}}; int curr_device = -1; /* Current NAND Device */ @@ -982,7 +982,7 @@ static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len, #ifdef CONFIG_OMAP1510 archflashwp(0,0); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_OFF(); #endif @@ -1036,7 +1036,7 @@ out: #ifdef CONFIG_OMAP1510 archflashwp(0,1); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_ON(); #endif @@ -1235,7 +1235,7 @@ int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean) #ifdef CONFIG_OMAP1510 archflashwp(0,0); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_OFF(); #endif NAND_ENABLE_CE(nand); /* set pin low */ @@ -1321,7 +1321,7 @@ out: #ifdef CONFIG_OMAP1510 archflashwp(0,1); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_ON(); #endif @@ -1358,7 +1358,7 @@ unsigned long nand_probe(unsigned long physadr) #endif oob_config.badblock_pos = 5; - for (i=0; i<CFG_MAX_NAND_DEVICE; i++) { + for (i=0; i<CONFIG_SYS_MAX_NAND_DEVICE; i++) { if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) { nand = &nand_dev_desc[i]; break; diff --git a/drivers/mtd/onenand/onenand_uboot.c b/drivers/mtd/onenand/onenand_uboot.c index d61445061..08082f3ed 100644 --- a/drivers/mtd/onenand/onenand_uboot.c +++ b/drivers/mtd/onenand/onenand_uboot.c @@ -26,7 +26,7 @@ void onenand_init(void) memset(&onenand_mtd, 0, sizeof(struct mtd_info)); memset(&onenand_chip, 0, sizeof(struct onenand_chip)); - onenand_chip.base = (void *) CFG_ONENAND_BASE; + onenand_chip.base = (void *) CONFIG_SYS_ONENAND_BASE; onenand_mtd.priv = &onenand_chip; onenand_scan(&onenand_mtd, 1); diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index e5f758e10..75f5900dc 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -5,9 +5,9 @@ */ /* Common parameters */ -#define SPI_FLASH_PROG_TIMEOUT ((10 * CFG_HZ) / 1000) -#define SPI_FLASH_PAGE_ERASE_TIMEOUT ((50 * CFG_HZ) / 1000) -#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CFG_HZ) +#define SPI_FLASH_PROG_TIMEOUT ((10 * CONFIG_SYS_HZ) / 1000) +#define SPI_FLASH_PAGE_ERASE_TIMEOUT ((50 * CONFIG_SYS_HZ) / 1000) +#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) /* Common commands */ #define CMD_READ_ID 0x9f diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c index c999b125e..b8b835a3f 100644 --- a/drivers/mtd/spi/stmicro.c +++ b/drivers/mtd/spi/stmicro.c @@ -295,7 +295,7 @@ int stmicro_erase(struct spi_flash *flash, u32 offset, size_t len) } /* Up to 2 seconds */ - ret = stmicro_wait_ready(flash, 2 * CFG_HZ); + ret = stmicro_wait_ready(flash, 2 * CONFIG_SYS_HZ); if (ret < 0) { debug("SF: STMicro page erase timed out\n"); break; diff --git a/drivers/net/bcm570x.c b/drivers/net/bcm570x.c index 6b28b95eb..185764ef5 100644 --- a/drivers/net/bcm570x.c +++ b/drivers/net/bcm570x.c @@ -439,9 +439,9 @@ int eth_init (bd_t * bis) /* Setup timer delays */ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { pDevice->UseTaggedStatus = TRUE; - pUmDevice->timer_interval = CFG_HZ; + pUmDevice->timer_interval = CONFIG_SYS_HZ; } else { - pUmDevice->timer_interval = CFG_HZ / 50; + pUmDevice->timer_interval = CONFIG_SYS_HZ / 50; } /* Grab name .... */ @@ -458,15 +458,15 @@ int eth_init (bd_t * bis) pUmDevice->rx_last_cnt = pUmDevice->tx_last_cnt = 0; /* delay for 4 seconds */ - pUmDevice->delayed_link_ind = (4 * CFG_HZ) / pUmDevice->timer_interval; + pUmDevice->delayed_link_ind = (4 * CONFIG_SYS_HZ) / pUmDevice->timer_interval; - pUmDevice->adaptive_expiry = CFG_HZ / pUmDevice->timer_interval; + pUmDevice->adaptive_expiry = CONFIG_SYS_HZ / pUmDevice->timer_interval; /* Sometimes we get spurious ints. after reset when link is down. */ /* This field tells the isr to service the int. even if there is */ /* no status block update. */ pUmDevice->adapter_just_inited = - (3 * CFG_HZ) / pUmDevice->timer_interval; + (3 * CONFIG_SYS_HZ) / pUmDevice->timer_interval; /* Initialize 570x */ if (LM_InitializeAdapter (pDevice) != LM_STATUS_SUCCESS) { @@ -1046,9 +1046,9 @@ LM_STATUS MM_GetConfig (PLM_DEVICE_BLOCK pDevice) if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { pDevice->UseTaggedStatus = TRUE; - pUmDevice->timer_interval = CFG_HZ; + pUmDevice->timer_interval = CONFIG_SYS_HZ; } else { - pUmDevice->timer_interval = CFG_HZ / 50; + pUmDevice->timer_interval = CONFIG_SYS_HZ / 50; } pDevice->TxPacketDescCnt = tx_pkt_desc_cnt[index]; diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c index c5e74b8b5..504fd100a 100644 --- a/drivers/net/bfin_mac.c +++ b/drivers/net/bfin_mac.c @@ -466,7 +466,7 @@ ADI_ETHER_BUFFER *SetupTxBuffer(int no) return buf; } -#if defined(CONFIG_POST) && defined(CFG_POST_ETHER) +#if defined(CONFIG_POST) && defined(CONFIG_SYS_POST_ETHER) int ether_post_test(int flags) { uchar buf[64]; diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c index ae1983ac0..35a9bafaa 100644 --- a/drivers/net/cs8900.c +++ b/drivers/net/cs8900.c @@ -90,7 +90,7 @@ static void eth_reset (void) udelay (200000); /* Wait until the chip is reset */ - tmo = get_timer (0) + 1 * CFG_HZ; + tmo = get_timer (0) + 1 * CONFIG_SYS_HZ; while ((((us = get_reg_init_bus (PP_SelfSTAT)) & PP_SelfSTAT_InitD) == 0) && tmo < get_timer (0)) /*NOP*/; @@ -244,7 +244,7 @@ retry: #ifdef DEBUG printf ("cs: unable to send packet; retrying...\n"); #endif - for (tmo = get_timer (0) + 5 * CFG_HZ; get_timer (0) < tmo;) + for (tmo = get_timer (0) + 5 * CONFIG_SYS_HZ; get_timer (0) < tmo;) /*NOP*/; eth_reset (); eth_reginit (); @@ -257,7 +257,7 @@ retry: CS8900_RTDATA = *addr++; /* wait for transfer to succeed */ - tmo = get_timer (0) + 5 * CFG_HZ; + tmo = get_timer (0) + 5 * CONFIG_SYS_HZ; while ((s = get_reg (PP_TER) & ~0x1F) == 0) { if (get_timer (0) >= tmo) break; diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c index 3a61b802e..ffb739de9 100644 --- a/drivers/net/dm9000x.c +++ b/drivers/net/dm9000x.c @@ -447,7 +447,7 @@ eth_send(volatile void *packet, int length) DM9000_iow(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ /* wait for end of transmission */ - tmo = get_timer(0) + 5 * CFG_HZ; + tmo = get_timer(0) + 5 * CONFIG_SYS_HZ; while ( !(DM9000_ior(DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) || !(DM9000_ior(DM9000_ISR) & IMR_PTM) ) { if (get_timer(0) >= tmo) { diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c index d6539c01a..9c06b2556 100644 --- a/drivers/net/eepro100.c +++ b/drivers/net/eepro100.c @@ -194,14 +194,14 @@ struct descriptor { /* A generic descriptor. */ unsigned char params[0]; }; -#define CFG_CMD_EL 0x8000 -#define CFG_CMD_SUSPEND 0x4000 -#define CFG_CMD_INT 0x2000 -#define CFG_CMD_IAS 0x0001 /* individual address setup */ -#define CFG_CMD_CONFIGURE 0x0002 /* configure */ +#define CONFIG_SYS_CMD_EL 0x8000 +#define CONFIG_SYS_CMD_SUSPEND 0x4000 +#define CONFIG_SYS_CMD_INT 0x2000 +#define CONFIG_SYS_CMD_IAS 0x0001 /* individual address setup */ +#define CONFIG_SYS_CMD_CONFIGURE 0x0002 /* configure */ -#define CFG_STATUS_C 0x8000 -#define CFG_STATUS_OK 0x2000 +#define CONFIG_SYS_STATUS_C 0x8000 +#define CONFIG_SYS_STATUS_OK 0x2000 /* Misc. */ @@ -529,7 +529,7 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis) tx_next = ((tx_next + 1) % NUM_TX_DESC); cfg_cmd = (struct descriptor *) &tx_ring[tx_cur]; - cfg_cmd->command = cpu_to_le16 ((CFG_CMD_SUSPEND | CFG_CMD_CONFIGURE)); + cfg_cmd->command = cpu_to_le16 ((CONFIG_SYS_CMD_SUSPEND | CONFIG_SYS_CMD_CONFIGURE)); cfg_cmd->status = 0; cfg_cmd->link = cpu_to_le32 (phys_to_bus ((u32) & tx_ring[tx_next])); @@ -537,7 +537,7 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis) sizeof (i82558_config_cmd)); if (!wait_for_eepro100 (dev)) { - printf ("Error---CFG_CMD_CONFIGURE: Can not reset ethernet controller.\n"); + printf ("Error---CONFIG_SYS_CMD_CONFIGURE: Can not reset ethernet controller.\n"); goto Done; } @@ -545,7 +545,7 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis) OUTW (dev, SCB_M | CU_START, SCBCmd); for (i = 0; - !(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_C); + !(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C); i++) { if (i >= TOUT_LOOP) { printf ("%s: Tx error buffer not ready\n", dev->name); @@ -553,7 +553,7 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis) } } - if (!(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_OK)) { + if (!(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_OK)) { printf ("TX error status = 0x%08X\n", le16_to_cpu (tx_ring[tx_cur].status)); goto Done; @@ -565,7 +565,7 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis) tx_next = ((tx_next + 1) % NUM_TX_DESC); ias_cmd = (struct descriptor *) &tx_ring[tx_cur]; - ias_cmd->command = cpu_to_le16 ((CFG_CMD_SUSPEND | CFG_CMD_IAS)); + ias_cmd->command = cpu_to_le16 ((CONFIG_SYS_CMD_SUSPEND | CONFIG_SYS_CMD_IAS)); ias_cmd->status = 0; ias_cmd->link = cpu_to_le32 (phys_to_bus ((u32) & tx_ring[tx_next])); @@ -581,7 +581,7 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis) OUTL (dev, phys_to_bus ((u32) & tx_ring[tx_cur]), SCBPointer); OUTW (dev, SCB_M | CU_START, SCBCmd); - for (i = 0; !(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_C); + for (i = 0; !(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C); i++) { if (i >= TOUT_LOOP) { printf ("%s: Tx error buffer not ready\n", @@ -590,7 +590,7 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis) } } - if (!(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_OK)) { + if (!(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_OK)) { printf ("TX error status = 0x%08X\n", le16_to_cpu (tx_ring[tx_cur].status)); goto Done; @@ -640,7 +640,7 @@ static int eepro100_send (struct eth_device *dev, volatile void *packet, int len OUTL (dev, phys_to_bus ((u32) & tx_ring[tx_cur]), SCBPointer); OUTW (dev, SCB_M | CU_START, SCBCmd); - for (i = 0; !(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_C); + for (i = 0; !(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C); i++) { if (i >= TOUT_LOOP) { printf ("%s: Tx error buffer not ready\n", dev->name); @@ -648,7 +648,7 @@ static int eepro100_send (struct eth_device *dev, volatile void *packet, int len } } - if (!(le16_to_cpu (tx_ring[tx_cur].status) & CFG_STATUS_OK)) { + if (!(le16_to_cpu (tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_OK)) { printf ("TX error status = 0x%08X\n", le16_to_cpu (tx_ring[tx_cur].status)); goto Done; diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index 59524a5ed..d056010c7 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -56,12 +56,12 @@ DECLARE_GLOBAL_DATA_PTR; struct fec_info_dma fec_info[] = { -#ifdef CFG_FEC0_IOBASE +#ifdef CONFIG_SYS_FEC0_IOBASE { 0, /* index */ - CFG_FEC0_IOBASE, /* io base */ - CFG_FEC0_PINMUX, /* gpio pin muxing */ - CFG_FEC0_MIIBASE, /* mii base */ + CONFIG_SYS_FEC0_IOBASE, /* io base */ + CONFIG_SYS_FEC0_PINMUX, /* gpio pin muxing */ + CONFIG_SYS_FEC0_MIIBASE, /* mii base */ -1, /* phy_addr */ 0, /* duplex and speed */ 0, /* phy name */ @@ -83,17 +83,17 @@ struct fec_info_dma fec_info[] = { 0, /* cleanTbdNum */ }, #endif -#ifdef CFG_FEC1_IOBASE +#ifdef CONFIG_SYS_FEC1_IOBASE { 1, /* index */ - CFG_FEC1_IOBASE, /* io base */ - CFG_FEC1_PINMUX, /* gpio pin muxing */ - CFG_FEC1_MIIBASE, /* mii base */ + CONFIG_SYS_FEC1_IOBASE, /* io base */ + CONFIG_SYS_FEC1_PINMUX, /* gpio pin muxing */ + CONFIG_SYS_FEC1_MIIBASE, /* mii base */ -1, /* phy_addr */ 0, /* duplex and speed */ 0, /* phy name */ 0, /* phy name init */ -#ifdef CFG_DMA_USE_INTSRAM +#ifdef CONFIG_SYS_DMA_USE_INTSRAM (cbd_t *)DBUF_LENGTH, /* RX BD */ #else 0, /* RX BD */ @@ -203,7 +203,7 @@ static int fec_send(struct eth_device *dev, volatile void *packet, int length) miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &phyStatus); /* process all the consumed TBDs */ - while (info->cleanTbdNum < CFG_TX_ETH_BUFFER) { + while (info->cleanTbdNum < CONFIG_SYS_TX_ETH_BUFFER) { pUsedTbd = &info->txbd[info->usedTbdIdx]; if (pUsedTbd->cbd_sc & BD_ENET_TX_READY) { #ifdef ET_DEBUG @@ -214,14 +214,14 @@ static int fec_send(struct eth_device *dev, volatile void *packet, int length) } /* clean this buffer descriptor */ - if (info->usedTbdIdx == (CFG_TX_ETH_BUFFER - 1)) + if (info->usedTbdIdx == (CONFIG_SYS_TX_ETH_BUFFER - 1)) pUsedTbd->cbd_sc = BD_ENET_TX_WRAP; else pUsedTbd->cbd_sc = 0; /* update some indeces for a correct handling of the TBD ring */ info->cleanTbdNum++; - info->usedTbdIdx = (info->usedTbdIdx + 1) % CFG_TX_ETH_BUFFER; + info->usedTbdIdx = (info->usedTbdIdx + 1) % CONFIG_SYS_TX_ETH_BUFFER; } /* Check for valid length of data. */ @@ -240,7 +240,7 @@ static int fec_send(struct eth_device *dev, volatile void *packet, int length) pTbd->cbd_datlen = length; pTbd->cbd_bufaddr = (u32) packet; pTbd->cbd_sc |= BD_ENET_TX_LAST | BD_ENET_TX_TC | BD_ENET_TX_READY; - info->txIdx = (info->txIdx + 1) % CFG_TX_ETH_BUFFER; + info->txIdx = (info->txIdx + 1) % CONFIG_SYS_TX_ETH_BUFFER; /* Enable DMA transmit task */ MCD_continDma(info->txTask); @@ -379,15 +379,15 @@ static int fec_init(struct eth_device *dev, bd_t * bd) fec_halt(dev); #if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CFG_DISCOVER_PHY) + defined (CONFIG_SYS_DISCOVER_PHY) mii_init(); set_fec_duplex_speed(fecp, bd, info->dup_spd); #else -#ifndef CFG_DISCOVER_PHY +#ifndef CONFIG_SYS_DISCOVER_PHY set_fec_duplex_speed(fecp, bd, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CFG_DISCOVER_PHY */ +#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ #endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ @@ -397,7 +397,7 @@ static int fec_init(struct eth_device *dev, bd_t * bd) fecp->eir = 0xffffffff; /* Set station address */ - if ((u32) fecp == CFG_FEC0_IOBASE) { + if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE) { fec_set_hwaddr(fecp, bd->bi_enetaddr); } else { fec_set_hwaddr(fecp, bd->bi_enet1addr); @@ -421,15 +421,15 @@ static int fec_init(struct eth_device *dev, bd_t * bd) /* Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19) * Settings: Last, Tx CRC */ - for (i = 0; i < CFG_TX_ETH_BUFFER; i++) { + for (i = 0; i < CONFIG_SYS_TX_ETH_BUFFER; i++) { info->txbd[i].cbd_sc = 0; info->txbd[i].cbd_datlen = 0; info->txbd[i].cbd_bufaddr = (uint) (&info->txbuf[0]); } - info->txbd[CFG_TX_ETH_BUFFER - 1].cbd_sc |= BD_ENET_TX_WRAP; + info->txbd[CONFIG_SYS_TX_ETH_BUFFER - 1].cbd_sc |= BD_ENET_TX_WRAP; info->usedTbdIdx = 0; - info->cleanTbdNum = CFG_TX_ETH_BUFFER; + info->cleanTbdNum = CONFIG_SYS_TX_ETH_BUFFER; /* Set Rx FIFO alarm and granularity value */ fecp->rfcr = 0x0c000000; @@ -516,14 +516,14 @@ int mcdmafec_initialize(bd_t * bis) { struct eth_device *dev; int i; -#ifdef CFG_DMA_USE_INTSRAM - u32 tmp = CFG_INTSRAM + 0x2000; +#ifdef CONFIG_SYS_DMA_USE_INTSRAM + u32 tmp = CONFIG_SYS_INTSRAM + 0x2000; #endif for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { dev = - (struct eth_device *)memalign(CFG_CACHELINE_SIZE, + (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof *dev); if (dev == NULL) hang(); @@ -539,7 +539,7 @@ int mcdmafec_initialize(bd_t * bis) dev->recv = fec_recv; /* setup Receive and Transmit buffer descriptor */ -#ifdef CFG_DMA_USE_INTSRAM +#ifdef CONFIG_SYS_DMA_USE_INTSRAM fec_info[i].rxbd = (cbd_t *)((u32)fec_info[i].rxbd + tmp); tmp = (u32)fec_info[i].rxbd; fec_info[i].txbd = @@ -548,17 +548,17 @@ int mcdmafec_initialize(bd_t * bis) tmp = (u32)fec_info[i].txbd; fec_info[i].txbuf = (char *)((u32)fec_info[i].txbuf + tmp + - (CFG_TX_ETH_BUFFER * sizeof(cbd_t))); + (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); tmp = (u32)fec_info[i].txbuf; #else fec_info[i].rxbd = - (cbd_t *) memalign(CFG_CACHELINE_SIZE, + (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, (PKTBUFSRX * sizeof(cbd_t))); fec_info[i].txbd = - (cbd_t *) memalign(CFG_CACHELINE_SIZE, - (CFG_TX_ETH_BUFFER * sizeof(cbd_t))); + (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, + (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); fec_info[i].txbuf = - (char *)memalign(CFG_CACHELINE_SIZE, DBUF_LENGTH); + (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH); #endif #ifdef ET_DEBUG @@ -566,7 +566,7 @@ int mcdmafec_initialize(bd_t * bis) (int)fec_info[i].rxbd, (int)fec_info[i].txbd); #endif - fec_info[i].phy_name = (char *)memalign(CFG_CACHELINE_SIZE, 32); + fec_info[i].phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32); eth_register(dev); diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c index c23a4000a..318bdf4a1 100644 --- a/drivers/net/lan91c96.c +++ b/drivers/net/lan91c96.c @@ -267,7 +267,7 @@ static void smc_shutdown (void); static int poll4int (byte mask, int timeout) { - int tmo = get_timer (0) + timeout * CFG_HZ; + int tmo = get_timer (0) + timeout * CONFIG_SYS_HZ; int is_timeout = 0; word old_bank = SMC_inw (LAN91C96_BANK_SELECT); diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 08bebf74a..98e8c73ca 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -28,7 +28,7 @@ * allocate our own, but we need one such buffer in case a packet * wraps around the DMA ring so that we have to copy it. * - * Therefore, define CFG_RX_ETH_BUFFER to 1 in the board-specific + * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific * configuration header. This way, the core allocates one RX buffer * and one TX buffer, each of which can hold a ethernet packet of * maximum size. @@ -52,11 +52,11 @@ #define barrier() asm volatile("" ::: "memory") -#define CFG_MACB_RX_BUFFER_SIZE 4096 -#define CFG_MACB_RX_RING_SIZE (CFG_MACB_RX_BUFFER_SIZE / 128) -#define CFG_MACB_TX_RING_SIZE 16 -#define CFG_MACB_TX_TIMEOUT 1000 -#define CFG_MACB_AUTONEG_TIMEOUT 5000000 +#define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096 +#define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128) +#define CONFIG_SYS_MACB_TX_RING_SIZE 16 +#define CONFIG_SYS_MACB_TX_TIMEOUT 1000 +#define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000 struct macb_dma_desc { u32 addr; @@ -178,7 +178,7 @@ static int macb_send(struct eth_device *netdev, volatile void *packet, ctrl = length & TXBUF_FRMLEN_MASK; ctrl |= TXBUF_FRAME_END; - if (tx_head == (CFG_MACB_TX_RING_SIZE - 1)) { + if (tx_head == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) { ctrl |= TXBUF_WRAP; macb->tx_head = 0; } else @@ -193,7 +193,7 @@ static int macb_send(struct eth_device *netdev, volatile void *packet, * I guess this is necessary because the networking core may * re-use the transmit buffer as soon as we return... */ - for (i = 0; i <= CFG_MACB_TX_TIMEOUT; i++) { + for (i = 0; i <= CONFIG_SYS_MACB_TX_TIMEOUT; i++) { barrier(); ctrl = macb->tx_ring[tx_head].ctrl; if (ctrl & TXBUF_USED) @@ -203,7 +203,7 @@ static int macb_send(struct eth_device *netdev, volatile void *packet, dma_unmap_single(packet, length, paddr); - if (i <= CFG_MACB_TX_TIMEOUT) { + if (i <= CONFIG_SYS_MACB_TX_TIMEOUT) { if (ctrl & TXBUF_UNDERRUN) printf("%s: TX underrun\n", netdev->name); if (ctrl & TXBUF_EXHAUSTED) @@ -226,7 +226,7 @@ static void reclaim_rx_buffers(struct macb_device *macb, while (i > new_tail) { macb->rx_ring[i].addr &= ~RXADDR_USED; i++; - if (i > CFG_MACB_RX_RING_SIZE) + if (i > CONFIG_SYS_MACB_RX_RING_SIZE) i = 0; } @@ -265,7 +265,7 @@ static int macb_recv(struct eth_device *netdev) if (wrapped) { unsigned int headlen, taillen; - headlen = 128 * (CFG_MACB_RX_RING_SIZE + headlen = 128 * (CONFIG_SYS_MACB_RX_RING_SIZE - macb->rx_tail); taillen = length - headlen; memcpy((void *)NetRxPackets[0], @@ -276,11 +276,11 @@ static int macb_recv(struct eth_device *netdev) } NetReceive(buffer, length); - if (++rx_tail >= CFG_MACB_RX_RING_SIZE) + if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) rx_tail = 0; reclaim_rx_buffers(macb, rx_tail); } else { - if (++rx_tail >= CFG_MACB_RX_RING_SIZE) { + if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) { wrapped = 1; rx_tail = 0; } @@ -303,7 +303,7 @@ static void macb_phy_reset(struct macb_device *macb) macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE | BMCR_ANRESTART)); - for (i = 0; i < CFG_MACB_AUTONEG_TIMEOUT / 100; i++) { + for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) { status = macb_mdio_read(macb, MII_BMSR); if (status & BMSR_ANEGCOMPLETE) break; @@ -337,7 +337,7 @@ static int macb_phy_init(struct macb_device *macb) /* Try to re-negotiate if we don't have link already. */ macb_phy_reset(macb); - for (i = 0; i < CFG_MACB_AUTONEG_TIMEOUT / 100; i++) { + for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) { status = macb_mdio_read(macb, MII_BMSR); if (status & BMSR_LSTATUS) break; @@ -388,16 +388,16 @@ static int macb_init(struct eth_device *netdev, bd_t *bd) /* initialize DMA descriptors */ paddr = macb->rx_buffer_dma; - for (i = 0; i < CFG_MACB_RX_RING_SIZE; i++) { - if (i == (CFG_MACB_RX_RING_SIZE - 1)) + for (i = 0; i < CONFIG_SYS_MACB_RX_RING_SIZE; i++) { + if (i == (CONFIG_SYS_MACB_RX_RING_SIZE - 1)) paddr |= RXADDR_WRAP; macb->rx_ring[i].addr = paddr; macb->rx_ring[i].ctrl = 0; paddr += 128; } - for (i = 0; i < CFG_MACB_TX_RING_SIZE; i++) { + for (i = 0; i < CONFIG_SYS_MACB_TX_RING_SIZE; i++) { macb->tx_ring[i].addr = 0; - if (i == (CFG_MACB_TX_RING_SIZE - 1)) + if (i == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP; else macb->tx_ring[i].ctrl = TXBUF_USED; @@ -473,12 +473,12 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr) netdev = &macb->netdev; - macb->rx_buffer = dma_alloc_coherent(CFG_MACB_RX_BUFFER_SIZE, + macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE, &macb->rx_buffer_dma); - macb->rx_ring = dma_alloc_coherent(CFG_MACB_RX_RING_SIZE + macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE * sizeof(struct macb_dma_desc), &macb->rx_ring_dma); - macb->tx_ring = dma_alloc_coherent(CFG_MACB_TX_RING_SIZE + macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE * sizeof(struct macb_dma_desc), &macb->tx_ring_dma); diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index f93cf598e..c00474e22 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -51,12 +51,12 @@ DECLARE_GLOBAL_DATA_PTR; struct fec_info_s fec_info[] = { -#ifdef CFG_FEC0_IOBASE +#ifdef CONFIG_SYS_FEC0_IOBASE { 0, /* index */ - CFG_FEC0_IOBASE, /* io base */ - CFG_FEC0_PINMUX, /* gpio pin muxing */ - CFG_FEC0_MIIBASE, /* mii base */ + CONFIG_SYS_FEC0_IOBASE, /* io base */ + CONFIG_SYS_FEC0_PINMUX, /* gpio pin muxing */ + CONFIG_SYS_FEC0_MIIBASE, /* mii base */ -1, /* phy_addr */ 0, /* duplex and speed */ 0, /* phy name */ @@ -70,17 +70,17 @@ struct fec_info_s fec_info[] = { (struct fec_info_s *)-1, }, #endif -#ifdef CFG_FEC1_IOBASE +#ifdef CONFIG_SYS_FEC1_IOBASE { 1, /* index */ - CFG_FEC1_IOBASE, /* io base */ - CFG_FEC1_PINMUX, /* gpio pin muxing */ - CFG_FEC1_MIIBASE, /* mii base */ + CONFIG_SYS_FEC1_IOBASE, /* io base */ + CONFIG_SYS_FEC1_PINMUX, /* gpio pin muxing */ + CONFIG_SYS_FEC1_MIIBASE, /* mii base */ -1, /* phy_addr */ 0, /* duplex and speed */ 0, /* phy name */ 0, /* phy name init */ -#ifdef CFG_FEC_BUF_USE_SRAM +#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM (cbd_t *)DBUF_LENGTH, /* RX BD */ #else 0, /* RX BD */ @@ -103,7 +103,7 @@ void fec_reset(struct eth_device *dev); extern int fecpin_setclear(struct eth_device *dev, int setclear); -#ifdef CFG_DISCOVER_PHY +#ifdef CONFIG_SYS_DISCOVER_PHY extern void __mii_init(void); extern uint mii_send(uint mii_cmd); extern int mii_discover_phy(struct eth_device *dev); @@ -175,7 +175,7 @@ int fec_send(struct eth_device *dev, volatile void *packet, int length) /* Activate transmit Buffer Descriptor polling */ fecp->tdar = 0x01000000; /* Descriptor polling active */ -#ifndef CFG_FEC_BUF_USE_SRAM +#ifndef CONFIG_SYS_FEC_BUF_USE_SRAM /* * FEC unable to initial transmit data packet. * A nop will ensure the descriptor polling active completed. @@ -187,7 +187,7 @@ int fec_send(struct eth_device *dev, volatile void *packet, int length) #endif -#ifdef CFG_UNIFY_CACHE +#ifdef CONFIG_SYS_UNIFY_CACHE icache_invalid(); #endif @@ -222,9 +222,9 @@ int fec_recv(struct eth_device *dev) int length; for (;;) { -#ifndef CFG_FEC_BUF_USE_SRAM +#ifndef CONFIG_SYS_FEC_BUF_USE_SRAM #endif -#ifdef CFG_UNIFY_CACHE +#ifdef CONFIG_SYS_UNIFY_CACHE icache_invalid(); #endif /* section 16.9.23.2 */ @@ -435,15 +435,15 @@ int fec_init(struct eth_device *dev, bd_t * bd) fec_reset(dev); #if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CFG_DISCOVER_PHY) + defined (CONFIG_SYS_DISCOVER_PHY) mii_init(); setFecDuplexSpeed(fecp, bd, info->dup_spd); #else -#ifndef CFG_DISCOVER_PHY +#ifndef CONFIG_SYS_DISCOVER_PHY setFecDuplexSpeed(fecp, bd, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CFG_DISCOVER_PHY */ +#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ #endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ @@ -453,9 +453,9 @@ int fec_init(struct eth_device *dev, bd_t * bd) fecp->eir = 0xffffffff; /* Set station address */ - if ((u32) fecp == CFG_FEC0_IOBASE) { -#ifdef CFG_FEC1_IOBASE - volatile fec_t *fecp1 = (fec_t *) (CFG_FEC1_IOBASE); + if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE) { +#ifdef CONFIG_SYS_FEC1_IOBASE + volatile fec_t *fecp1 = (fec_t *) (CONFIG_SYS_FEC1_IOBASE); ea = &bd->bi_enet1addr[0]; fecp1->palr = (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); @@ -466,14 +466,14 @@ int fec_init(struct eth_device *dev, bd_t * bd) (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); fecp->paur = (ea[4] << 24) | (ea[5] << 16); } else { -#ifdef CFG_FEC0_IOBASE - volatile fec_t *fecp0 = (fec_t *) (CFG_FEC0_IOBASE); +#ifdef CONFIG_SYS_FEC0_IOBASE + volatile fec_t *fecp0 = (fec_t *) (CONFIG_SYS_FEC0_IOBASE); ea = &bd->bi_enetaddr[0]; fecp0->palr = (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); fecp0->paur = (ea[4] << 24) | (ea[5] << 16); #endif -#ifdef CFG_FEC1_IOBASE +#ifdef CONFIG_SYS_FEC1_IOBASE ea = &bd->bi_enet1addr[0]; fecp->palr = (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); @@ -568,14 +568,14 @@ int mcffec_initialize(bd_t * bis) { struct eth_device *dev; int i; -#ifdef CFG_FEC_BUF_USE_SRAM - u32 tmp = CFG_INIT_RAM_ADDR + 0x1000; +#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM + u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; #endif for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { dev = - (struct eth_device *)memalign(CFG_CACHELINE_SIZE, + (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof *dev); if (dev == NULL) hang(); @@ -591,7 +591,7 @@ int mcffec_initialize(bd_t * bis) dev->recv = fec_recv; /* setup Receive and Transmit buffer descriptor */ -#ifdef CFG_FEC_BUF_USE_SRAM +#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM fec_info[i].rxbd = (cbd_t *)((u32)fec_info[i].rxbd + tmp); tmp = (u32)fec_info[i].rxbd; fec_info[i].txbd = @@ -600,17 +600,17 @@ int mcffec_initialize(bd_t * bis) tmp = (u32)fec_info[i].txbd; fec_info[i].txbuf = (char *)((u32)fec_info[i].txbuf + tmp + - (CFG_TX_ETH_BUFFER * sizeof(cbd_t))); + (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); tmp = (u32)fec_info[i].txbuf; #else fec_info[i].rxbd = - (cbd_t *) memalign(CFG_CACHELINE_SIZE, + (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, (PKTBUFSRX * sizeof(cbd_t))); fec_info[i].txbd = - (cbd_t *) memalign(CFG_CACHELINE_SIZE, + (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, (TX_BUF_CNT * sizeof(cbd_t))); fec_info[i].txbuf = - (char *)memalign(CFG_CACHELINE_SIZE, DBUF_LENGTH); + (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH); #endif #ifdef ET_DEBUG @@ -618,7 +618,7 @@ int mcffec_initialize(bd_t * bis) (int)fec_info[i].rxbd, (int)fec_info[i].txbd); #endif - fec_info[i].phy_name = (char *)memalign(CFG_CACHELINE_SIZE, 32); + fec_info[i].phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32); eth_register(dev); diff --git a/drivers/net/ne2000_base.c b/drivers/net/ne2000_base.c index 4a0770814..f93f93227 100644 --- a/drivers/net/ne2000_base.c +++ b/drivers/net/ne2000_base.c @@ -740,7 +740,7 @@ int eth_send(volatile void *packet, int length) { pkey = -1; dp83902a_send((u8 *) packet, length, 666); - tmo = get_timer (0) + TOUT * CFG_HZ; + tmo = get_timer (0) + TOUT * CONFIG_SYS_HZ; while(1) { dp83902a_poll(); if (pkey != -1) { diff --git a/drivers/net/netarm_eth.c b/drivers/net/netarm_eth.c index c011809b6..c9e324ee2 100644 --- a/drivers/net/netarm_eth.c +++ b/drivers/net/netarm_eth.c @@ -56,7 +56,7 @@ static void na_mii_write (int reg, int value) int mii_addr; /* Select register */ - mii_addr = CFG_ETH_PHY_ADDR + reg; + mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg; SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr); /* Write value */ SET_EADDR (NETARM_ETH_MII_WRITE, value); @@ -68,7 +68,7 @@ static unsigned int na_mii_read (int reg) int mii_addr, val; /* Select register */ - mii_addr = CFG_ETH_PHY_ADDR + reg; + mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg; SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr); /* do one management cycle */ SET_EADDR (NETARM_ETH_MII_CMD, diff --git a/drivers/net/ns7520_eth.c b/drivers/net/ns7520_eth.c index e19c22325..c28726e69 100644 --- a/drivers/net/ns7520_eth.c +++ b/drivers/net/ns7520_eth.c @@ -86,8 +86,8 @@ static int nDebugLvl = DEBUG_ERROR_CRIT; # define ASSERT(expr, func) #endif /* DEBUG */ -#define NS7520_MII_NEG_DELAY (5*CFG_HZ) /* in s */ -#define TX_TIMEOUT (5*CFG_HZ) /* in s */ +#define NS7520_MII_NEG_DELAY (5*CONFIG_SYS_HZ) /* in s */ +#define TX_TIMEOUT (5*CONFIG_SYS_HZ) /* in s */ #define RX_STALL_WORKAROUND_CNT 100 static int ns7520_eth_reset(void); diff --git a/drivers/net/ns9750_eth.c b/drivers/net/ns9750_eth.c index cade831ac..d4901b411 100644 --- a/drivers/net/ns9750_eth.c +++ b/drivers/net/ns9750_eth.c @@ -90,8 +90,8 @@ static int nDebugLvl = DEBUG_ERROR_CRIT; # define ASSERT(expr, func) #endif /* DEBUG */ -#define NS9750_MII_NEG_DELAY (5*CFG_HZ) /* in s */ -#define TX_TIMEOUT (5*CFG_HZ) /* in s */ +#define NS9750_MII_NEG_DELAY (5*CONFIG_SYS_HZ) /* in s */ +#define TX_TIMEOUT (5*CONFIG_SYS_HZ) /* in s */ /* @TODO move it to eeprom.h */ #define FS_EEPROM_AUTONEG_MASK 0x7 diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index 6446012f9..e3c163a34 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -39,7 +39,7 @@ static void miiphy_pre (char read, unsigned char addr, unsigned char reg) { int j; /* counter */ #if !(defined(CONFIG_EP8248) || defined(CONFIG_EP82XXM)) - volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT); + volatile ioport_t *iop = ioport_addr ((immap_t *) CONFIG_SYS_IMMR, MDIO_PORT); #endif /* @@ -124,7 +124,7 @@ int bb_miiphy_read (char *devname, unsigned char addr, short rdreg; /* register working value */ int j; /* counter */ #if !(defined(CONFIG_EP8248) || defined(CONFIG_EP82XXM)) - volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT); + volatile ioport_t *iop = ioport_addr ((immap_t *) CONFIG_SYS_IMMR, MDIO_PORT); #endif miiphy_pre (1, addr, reg); @@ -191,7 +191,7 @@ int bb_miiphy_write (char *devname, unsigned char addr, { int j; /* counter */ #if !(defined(CONFIG_EP8248) || defined(CONFIG_EP82XXM)) - volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT); + volatile ioport_t *iop = ioport_addr ((immap_t *) CONFIG_SYS_IMMR, MDIO_PORT); #endif miiphy_pre (0, addr, reg); diff --git a/drivers/net/sk98lin/h/skdrv1st.h b/drivers/net/sk98lin/h/skdrv1st.h index af34d7b96..8d372b58d 100644 --- a/drivers/net/sk98lin/h/skdrv1st.h +++ b/drivers/net/sk98lin/h/skdrv1st.h @@ -174,7 +174,7 @@ typedef struct s_AC SK_AC; #if 0 #define SK_TICKS_PER_SEC HZ #else -#define SK_TICKS_PER_SEC CFG_HZ +#define SK_TICKS_PER_SEC CONFIG_SYS_HZ #endif #define SK_MEM_MAPPED_IO diff --git a/drivers/net/sk98lin/h/skgehw.h b/drivers/net/sk98lin/h/skgehw.h index 52dc83f8b..8aad4425f 100644 --- a/drivers/net/sk98lin/h/skgehw.h +++ b/drivers/net/sk98lin/h/skgehw.h @@ -1107,10 +1107,10 @@ extern "C" { /* Values of connector and PMD type comply to SysKonnect internal std */ /* B2_MAC_CFG 8 bit MAC Configuration / Chip Revision */ -#define CFG_CHIP_R_MSK (0xf<<4) /* Bit 7.. 4: Chip Revision */ +#define CONFIG_SYS_CHIP_R_MSK (0xf<<4) /* Bit 7.. 4: Chip Revision */ /* Bit 3.. 2: reserved */ -#define CFG_DIS_M2_CLK BIT_1S /* Disable Clock for 2nd MAC */ -#define CFG_SNG_MAC BIT_0S /* MAC Config: 0=2 MACs / 1=1 MAC*/ +#define CONFIG_SYS_DIS_M2_CLK BIT_1S /* Disable Clock for 2nd MAC */ +#define CONFIG_SYS_SNG_MAC BIT_0S /* MAC Config: 0=2 MACs / 1=1 MAC*/ /* B2_CHIP_ID 8 bit Chip Identification Number */ #define CHIP_ID_GENESIS 0x0a /* Chip ID for GENESIS */ diff --git a/drivers/net/sk98lin/skgeinit.c b/drivers/net/sk98lin/skgeinit.c index ab740c7fc..df63f27e8 100644 --- a/drivers/net/sk98lin/skgeinit.c +++ b/drivers/net/sk98lin/skgeinit.c @@ -1882,10 +1882,10 @@ SK_IOC IoC) /* IO context */ /* read number of MACs */ SK_IN8(IoC, B2_MAC_CFG, &Byte); - pAC->GIni.GIMacsFound = (Byte & CFG_SNG_MAC) ? 1 : 2; + pAC->GIni.GIMacsFound = (Byte & CONFIG_SYS_SNG_MAC) ? 1 : 2; /* get Chip Revision Number */ - pAC->GIni.GIChipRev = (SK_U8)((Byte & CFG_CHIP_R_MSK) >> 4); + pAC->GIni.GIChipRev = (SK_U8)((Byte & CONFIG_SYS_CHIP_R_MSK) >> 4); /* get diff. PCI parameters */ SK_IN16(IoC, B0_CTST, &CtrlStat); diff --git a/drivers/net/sk98lin/u-boot_compat.h b/drivers/net/sk98lin/u-boot_compat.h index 1e385f8ef..cadf40296 100644 --- a/drivers/net/sk98lin/u-boot_compat.h +++ b/drivers/net/sk98lin/u-boot_compat.h @@ -54,7 +54,7 @@ #define EAGAIN 2 #define EBUSY 3 -#define HZ CFG_HZ +#define HZ CONFIG_SYS_HZ #define printk printf diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c index e8b235b4a..82abb0201 100644 --- a/drivers/net/smc91111.c +++ b/drivers/net/smc91111.c @@ -383,7 +383,7 @@ static void smc_write_phy_register(byte phyreg, word phydata); static int poll4int (byte mask, int timeout) { - int tmo = get_timer (0) + timeout * CFG_HZ; + int tmo = get_timer (0) + timeout * CONFIG_SYS_HZ; int is_timeout = 0; word old_bank = SMC_inw (BSR_REG); diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index e34076ff7..d7da0819d 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -305,8 +305,8 @@ static int init_phy(struct eth_device *dev) volatile tsec_t *regs = priv->regs; /* Assign a Physical address to the TBI */ - regs->tbipa = CFG_TBIPA_VALUE; - phyregs->tbipa = CFG_TBIPA_VALUE; + regs->tbipa = CONFIG_SYS_TBIPA_VALUE; + phyregs->tbipa = CONFIG_SYS_TBIPA_VALUE; asm("sync"); /* Reset MII (due to new addresses) */ @@ -1357,11 +1357,11 @@ struct phy_info phy_info_VSC8601 = { /* Override PHY config settings */ /* Configure some basic stuff */ {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init}, -#ifdef CFG_VSC8601_SKEWFIX +#ifdef CONFIG_SYS_VSC8601_SKEWFIX {MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL}, -#if defined(CFG_VSC8601_SKEW_TX) && defined(CFG_VSC8601_SKEW_RX) +#if defined(CONFIG_SYS_VSC8601_SKEW_TX) && defined(CONFIG_SYS_VSC8601_SKEW_RX) {MIIM_EXT_PAGE_ACCESS,1,NULL}, -#define VSC8101_SKEW (CFG_VSC8601_SKEW_TX<<14)|(CFG_VSC8601_SKEW_RX<<12) +#define VSC8101_SKEW (CONFIG_SYS_VSC8601_SKEW_TX<<14)|(CONFIG_SYS_VSC8601_SKEW_RX<<12) {MIIM_VSC8601_SKEW_CTRL,VSC8101_SKEW,NULL}, {MIIM_EXT_PAGE_ACCESS,0,NULL}, #endif diff --git a/drivers/net/tsi108_eth.c b/drivers/net/tsi108_eth.c index 50fa765f7..079354aaf 100644 --- a/drivers/net/tsi108_eth.c +++ b/drivers/net/tsi108_eth.c @@ -54,7 +54,7 @@ printf ("%s %d: " fmt, __FUNCTION__, __LINE__, ##args) #define RX_PRINT_ERRORS #define TX_PRINT_ERRORS -#define ETH_BASE (CFG_TSI108_CSR_BASE + 0x6000) +#define ETH_BASE (CONFIG_SYS_TSI108_CSR_BASE + 0x6000) #define ETH_PORT_OFFSET 0x400 diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c index 4e7259fd9..ada42c41f 100644 --- a/drivers/net/vsc7385.c +++ b/drivers/net/vsc7385.c @@ -35,13 +35,13 @@ int vsc7385_upload_firmware(void *firmware, unsigned int size) u8 *fw = firmware; unsigned int i; - u32 *gloreset = (u32 *) (CFG_VSC7385_BASE + 0x1c050); - u32 *icpu_ctrl = (u32 *) (CFG_VSC7385_BASE + 0x1c040); - u32 *icpu_addr = (u32 *) (CFG_VSC7385_BASE + 0x1c044); - u32 *icpu_data = (u32 *) (CFG_VSC7385_BASE + 0x1c048); - u32 *icpu_rom_map = (u32 *) (CFG_VSC7385_BASE + 0x1c070); + u32 *gloreset = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c050); + u32 *icpu_ctrl = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c040); + u32 *icpu_addr = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c044); + u32 *icpu_data = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c048); + u32 *icpu_rom_map = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c070); #ifdef DEBUG - u32 *chipid = (u32 *) (CFG_VSC7385_BASE + 0x1c060); + u32 *chipid = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c060); #endif out_be32(gloreset, 3); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b5eea89e7..41780dbe7 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -157,7 +157,7 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index) for (hose = hose_head; hose; hose = hose->next) { -#ifdef CFG_SCSI_SCAN_BUS_REVERSE +#ifdef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE for (bus = hose->last_busno; bus >= hose->first_busno; bus--) #else for (bus = hose->first_busno; bus <= hose->last_busno; bus++) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 2acf9bf78..384435951 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -26,9 +26,9 @@ #define PCIAUTO_IDE_MODE_MASK 0x05 -/* the user can define CFG_PCI_CACHE_LINE_SIZE to avoid problems */ -#ifndef CFG_PCI_CACHE_LINE_SIZE -#define CFG_PCI_CACHE_LINE_SIZE 8 +/* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */ +#ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE +#define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8 #endif /* @@ -154,7 +154,7 @@ void pciauto_setup_device(struct pci_controller *hose, pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, - CFG_PCI_CACHE_LINE_SIZE); + CONFIG_SYS_PCI_CACHE_LINE_SIZE); pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); } diff --git a/drivers/pci/tsi108_pci.c b/drivers/pci/tsi108_pci.c index edd614f23..d153fc6be 100644 --- a/drivers/pci/tsi108_pci.c +++ b/drivers/pci/tsi108_pci.c @@ -47,32 +47,32 @@ void tsi108_clear_pci_error (void) * requests. */ /* Read PB Error Log Registers */ - err_stat = *(volatile u32 *)(CFG_TSI108_CSR_BASE + + err_stat = *(volatile u32 *)(CONFIG_SYS_TSI108_CSR_BASE + TSI108_PB_REG_OFFSET + PB_ERRCS); - err_addr = *(volatile u32 *)(CFG_TSI108_CSR_BASE + + err_addr = *(volatile u32 *)(CONFIG_SYS_TSI108_CSR_BASE + TSI108_PB_REG_OFFSET + PB_AERR); if (err_stat & PB_ERRCS_ES) { /* Clear PCI/X bus errors if applicable */ - if ((err_addr & 0xFF000000) == CFG_PCI_CFG_BASE) { + if ((err_addr & 0xFF000000) == CONFIG_SYS_PCI_CFG_BASE) { /* Clear error flag */ - *(u32 *) (CFG_TSI108_CSR_BASE + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_PB_REG_OFFSET + PB_ERRCS) = PB_ERRCS_ES; /* Clear read error reported in PB_ISR */ - *(u32 *) (CFG_TSI108_CSR_BASE + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_PB_REG_OFFSET + PB_ISR) = PB_ISR_PBS_RD_ERR; /* Clear errors reported by PCI CSR (Normally Master Abort) */ - pci_stat = *(volatile u32 *)(CFG_TSI108_CSR_BASE + + pci_stat = *(volatile u32 *)(CONFIG_SYS_TSI108_CSR_BASE + TSI108_PCI_REG_OFFSET + PCI_CSR); - *(volatile u32 *)(CFG_TSI108_CSR_BASE + + *(volatile u32 *)(CONFIG_SYS_TSI108_CSR_BASE + TSI108_PCI_REG_OFFSET + PCI_CSR) = pci_stat; - *(volatile u32 *)(CFG_TSI108_CSR_BASE + + *(volatile u32 *)(CONFIG_SYS_TSI108_CSR_BASE + TSI108_PCI_REG_OFFSET + PCI_IRP_STAT) = PCI_IRP_STAT_P_CSR; } @@ -102,8 +102,8 @@ unsigned int __get_pci_config_dword (u32 addr) static int tsi108_read_config_dword (struct pci_controller *hose, pci_dev_t dev, int offset, u32 * value) { - dev &= (CFG_PCI_CFG_SIZE - 1); - dev |= (CFG_PCI_CFG_BASE | (offset & 0xfc)); + dev &= (CONFIG_SYS_PCI_CFG_SIZE - 1); + dev |= (CONFIG_SYS_PCI_CFG_BASE | (offset & 0xfc)); *value = __get_pci_config_dword(dev); if (0xFFFFFFFF == *value) tsi108_clear_pci_error (); @@ -113,8 +113,8 @@ static int tsi108_read_config_dword (struct pci_controller *hose, static int tsi108_write_config_dword (struct pci_controller *hose, pci_dev_t dev, int offset, u32 value) { - dev &= (CFG_PCI_CFG_SIZE - 1); - dev |= (CFG_PCI_CFG_BASE | (offset & 0xfc)); + dev &= (CONFIG_SYS_PCI_CFG_SIZE - 1); + dev |= (CONFIG_SYS_PCI_CFG_BASE | (offset & 0xfc)); out_le32 ((volatile unsigned *)dev, value); @@ -129,19 +129,19 @@ void pci_init_board (void) hose->last_busno = 0xff; pci_set_region (hose->regions + 0, - CFG_PCI_MEMORY_BUS, - CFG_PCI_MEMORY_PHYS, - CFG_PCI_MEMORY_SIZE, PCI_REGION_MEM | PCI_REGION_MEMORY); + CONFIG_SYS_PCI_MEMORY_BUS, + CONFIG_SYS_PCI_MEMORY_PHYS, + CONFIG_SYS_PCI_MEMORY_SIZE, PCI_REGION_MEM | PCI_REGION_MEMORY); /* PCI memory space */ pci_set_region (hose->regions + 1, - CFG_PCI_MEM_BUS, - CFG_PCI_MEM_PHYS, CFG_PCI_MEM_SIZE, PCI_REGION_MEM); + CONFIG_SYS_PCI_MEM_BUS, + CONFIG_SYS_PCI_MEM_PHYS, CONFIG_SYS_PCI_MEM_SIZE, PCI_REGION_MEM); /* PCI I/O space */ pci_set_region (hose->regions + 2, - CFG_PCI_IO_BUS, - CFG_PCI_IO_PHYS, CFG_PCI_IO_SIZE, PCI_REGION_IO); + CONFIG_SYS_PCI_IO_BUS, + CONFIG_SYS_PCI_IO_PHYS, CONFIG_SYS_PCI_IO_SIZE, PCI_REGION_IO); hose->region_count = 3; diff --git a/drivers/pci/w83c553f.c b/drivers/pci/w83c553f.c index d7355a408..85614223f 100644 --- a/drivers/pci/w83c553f.c +++ b/drivers/pci/w83c553f.c @@ -42,7 +42,7 @@ out_be16((u16*) (addr),(val)); udelay(1); \ } while (0) -extern uint ide_bus_offset[CFG_IDE_MAXBUS]; +extern uint ide_bus_offset[CONFIG_SYS_IDE_MAXBUS]; void initialise_pic(void); void initialise_dma(void); @@ -105,7 +105,7 @@ void initialise_w83c553f(void) pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &ide_bus_offset[0]); ide_bus_offset[0] &= ~1; -#if CFG_IDE_MAXBUS > 1 +#if CONFIG_SYS_IDE_MAXBUS > 1 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, &ide_bus_offset[1]); ide_bus_offset[1] &= ~1; #endif diff --git a/drivers/pcmcia/i82365.c b/drivers/pcmcia/i82365.c index 1e2431e49..1bcb3a52e 100644 --- a/drivers/pcmcia/i82365.c +++ b/drivers/pcmcia/i82365.c @@ -909,8 +909,8 @@ int i82365_init (void) mem.map = 0; mem.flags = MAP_ATTRIB | MAP_ACTIVE; mem.speed = 300; - mem.sys_start = CFG_PCMCIA_MEM_ADDR; - mem.sys_stop = CFG_PCMCIA_MEM_ADDR + CFG_PCMCIA_MEM_SIZE - 1; + mem.sys_start = CONFIG_SYS_PCMCIA_MEM_ADDR; + mem.sys_stop = CONFIG_SYS_PCMCIA_MEM_ADDR + CONFIG_SYS_PCMCIA_MEM_SIZE - 1; mem.card_start = 0; i365_set_mem_map (&socket, &mem); @@ -918,8 +918,8 @@ int i82365_init (void) mem.map = 1; mem.flags = MAP_ACTIVE; mem.speed = 300; - mem.sys_start = CFG_PCMCIA_MEM_ADDR + CFG_PCMCIA_MEM_SIZE; - mem.sys_stop = CFG_PCMCIA_MEM_ADDR + (2 * CFG_PCMCIA_MEM_SIZE) - 1; + mem.sys_start = CONFIG_SYS_PCMCIA_MEM_ADDR + CONFIG_SYS_PCMCIA_MEM_SIZE; + mem.sys_stop = CONFIG_SYS_PCMCIA_MEM_ADDR + (2 * CONFIG_SYS_PCMCIA_MEM_SIZE) - 1; mem.card_start = 0; i365_set_mem_map (&socket, &mem); @@ -988,8 +988,8 @@ static void i82365_dump_regions (pci_dev_t dev) { u_int tmp[2]; u_int *mem = (void *) socket.cb_phys; - u_char *cis = (void *) CFG_PCMCIA_MEM_ADDR; - u_char *ide = (void *) (CFG_ATA_BASE_ADDR + CFG_ATA_REG_OFFSET); + u_char *cis = (void *) CONFIG_SYS_PCMCIA_MEM_ADDR; + u_char *ide = (void *) (CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_REG_OFFSET); pci_read_config_dword (dev, 0x00, tmp + 0); pci_read_config_dword (dev, 0x80, tmp + 1); diff --git a/drivers/pcmcia/marubun_pcmcia.c b/drivers/pcmcia/marubun_pcmcia.c index d075ba37c..f715dec5f 100644 --- a/drivers/pcmcia/marubun_pcmcia.c +++ b/drivers/pcmcia/marubun_pcmcia.c @@ -38,20 +38,20 @@ #if defined(CONFIG_PCMCIA) /* MR-SHPC-01 register */ -#define MRSHPC_MODE (CFG_MARUBUN_MRSHPC + 4) -#define MRSHPC_OPTION (CFG_MARUBUN_MRSHPC + 6) -#define MRSHPC_CSR (CFG_MARUBUN_MRSHPC + 8) -#define MRSHPC_ISR (CFG_MARUBUN_MRSHPC + 10) -#define MRSHPC_ICR (CFG_MARUBUN_MRSHPC + 12) -#define MRSHPC_CPWCR (CFG_MARUBUN_MRSHPC + 14) -#define MRSHPC_MW0CR1 (CFG_MARUBUN_MRSHPC + 16) -#define MRSHPC_MW1CR1 (CFG_MARUBUN_MRSHPC + 18) -#define MRSHPC_IOWCR1 (CFG_MARUBUN_MRSHPC + 20) -#define MRSHPC_MW0CR2 (CFG_MARUBUN_MRSHPC + 22) -#define MRSHPC_MW1CR2 (CFG_MARUBUN_MRSHPC + 24) -#define MRSHPC_IOWCR2 (CFG_MARUBUN_MRSHPC + 26) -#define MRSHPC_CDCR (CFG_MARUBUN_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (CFG_MARUBUN_MRSHPC + 30) +#define MRSHPC_MODE (CONFIG_SYS_MARUBUN_MRSHPC + 4) +#define MRSHPC_OPTION (CONFIG_SYS_MARUBUN_MRSHPC + 6) +#define MRSHPC_CSR (CONFIG_SYS_MARUBUN_MRSHPC + 8) +#define MRSHPC_ISR (CONFIG_SYS_MARUBUN_MRSHPC + 10) +#define MRSHPC_ICR (CONFIG_SYS_MARUBUN_MRSHPC + 12) +#define MRSHPC_CPWCR (CONFIG_SYS_MARUBUN_MRSHPC + 14) +#define MRSHPC_MW0CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 16) +#define MRSHPC_MW1CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 18) +#define MRSHPC_IOWCR1 (CONFIG_SYS_MARUBUN_MRSHPC + 20) +#define MRSHPC_MW0CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 22) +#define MRSHPC_MW1CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 24) +#define MRSHPC_IOWCR2 (CONFIG_SYS_MARUBUN_MRSHPC + 26) +#define MRSHPC_CDCR (CONFIG_SYS_MARUBUN_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (CONFIG_SYS_MARUBUN_MRSHPC + 30) int pcmcia_on (void) { @@ -98,8 +98,8 @@ int pcmcia_on (void) outw(0x0000,MRSHPC_ISR); outw(0x2000,MRSHPC_ICR); - outb(0x00,(CFG_MARUBUN_MW2 + 0x206)); - outb(0x42,(CFG_MARUBUN_MW2 + 0x200)); + outb(0x00,(CONFIG_SYS_MARUBUN_MW2 + 0x206)); + outb(0x42,(CONFIG_SYS_MARUBUN_MW2 + 0x200)); return 0; } diff --git a/drivers/pcmcia/mpc8xx_pcmcia.c b/drivers/pcmcia/mpc8xx_pcmcia.c index 14477a448..95ea5e999 100644 --- a/drivers/pcmcia/mpc8xx_pcmcia.c +++ b/drivers/pcmcia/mpc8xx_pcmcia.c @@ -34,8 +34,8 @@ static u_int m8xx_get_speed(u_int ns, u_int is_io); /* look up table for pgcrx registers */ u_int *pcmcia_pgcrx[2] = { - &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcra, - &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcrb, + &((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcra, + &((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcrb, }; /* @@ -66,11 +66,11 @@ static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] = #endif #if defined(CONFIG_LWMON) || defined(CONFIG_NSCU) -#define CFG_PCMCIA_TIMING ( PCMCIA_SHT(9) \ +#define CONFIG_SYS_PCMCIA_TIMING ( PCMCIA_SHT(9) \ | PCMCIA_SST(3) \ | PCMCIA_SL(12)) #else -#define CFG_PCMCIA_TIMING ( PCMCIA_SHT(2) \ +#define CONFIG_SYS_PCMCIA_TIMING ( PCMCIA_SHT(2) \ | PCMCIA_SST(4) \ | PCMCIA_SL(9)) #endif @@ -88,12 +88,12 @@ int pcmcia_on (void) debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n"); /* intialize the fixed memory windows */ - win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0); - base = CFG_PCMCIA_MEM_ADDR; + win = (pcmcia_win_t *)(&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pbr0); + base = CONFIG_SYS_PCMCIA_MEM_ADDR; - if((reg = m8xx_get_graycode(CFG_PCMCIA_MEM_SIZE)) == -1) { + if((reg = m8xx_get_graycode(CONFIG_SYS_PCMCIA_MEM_SIZE)) == -1) { printf ("Cannot set window size to 0x%08x\n", - CFG_PCMCIA_MEM_SIZE); + CONFIG_SYS_PCMCIA_MEM_SIZE); return (1); } @@ -125,7 +125,7 @@ int pcmcia_on (void) | PCMCIA_PRS_ATTR | slotbit | PCMCIA_PV - | CFG_PCMCIA_TIMING ); + | CONFIG_SYS_PCMCIA_TIMING ); break; } case 5: @@ -135,7 +135,7 @@ int pcmcia_on (void) | PCMCIA_PRS_IO | slotbit | PCMCIA_PV - | CFG_PCMCIA_TIMING ); + | CONFIG_SYS_PCMCIA_TIMING ); break; } case 6: @@ -145,7 +145,7 @@ int pcmcia_on (void) | PCMCIA_PRS_IO | slotbit | PCMCIA_PV - | CFG_PCMCIA_TIMING ); + | CONFIG_SYS_PCMCIA_TIMING ); break; } #endif /* CONFIG_IDE_8xx_PCCARD */ @@ -157,7 +157,7 @@ int pcmcia_on (void) | PCMCIA_PRS_IO | slotbit | PCMCIA_PV - | CFG_PCMCIA_TIMING ); + | CONFIG_SYS_PCMCIA_TIMING ); break; } #endif /* CONFIG_HMI10 */ @@ -168,7 +168,7 @@ int pcmcia_on (void) debug ("MemWin %d: PBR 0x%08lX POR %08lX\n", i, win->br, win->or); - base += CFG_PCMCIA_MEM_SIZE; + base += CONFIG_SYS_PCMCIA_MEM_SIZE; ++win; } @@ -198,14 +198,14 @@ int pcmcia_off (void) printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n"); /* clear interrupt state, and disable interrupts */ - ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_); - ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_); + ((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_); + ((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_); /* turn off interrupt and disable CxOE */ PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE; /* turn off memory windows */ - win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0); + win = (pcmcia_win_t *)(&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pbr0); for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) { /* disable memory window */ diff --git a/drivers/pcmcia/pxa_pcmcia.c b/drivers/pcmcia/pxa_pcmcia.c index 11d8590d7..d06ab746c 100644 --- a/drivers/pcmcia/pxa_pcmcia.c +++ b/drivers/pcmcia/pxa_pcmcia.c @@ -13,12 +13,12 @@ static inline void msWait(unsigned msVal) int pcmcia_on (void) { unsigned int reg_arr[] = { - 0x48000028, CFG_MCMEM0_VAL, - 0x4800002c, CFG_MCMEM1_VAL, - 0x48000030, CFG_MCATT0_VAL, - 0x48000034, CFG_MCATT1_VAL, - 0x48000038, CFG_MCIO0_VAL, - 0x4800003c, CFG_MCIO1_VAL, + 0x48000028, CONFIG_SYS_MCMEM0_VAL, + 0x4800002c, CONFIG_SYS_MCMEM1_VAL, + 0x48000030, CONFIG_SYS_MCATT0_VAL, + 0x48000034, CONFIG_SYS_MCATT1_VAL, + 0x48000038, CONFIG_SYS_MCIO0_VAL, + 0x4800003c, CONFIG_SYS_MCIO1_VAL, 0, 0 }; diff --git a/drivers/pcmcia/ti_pci1410a.c b/drivers/pcmcia/ti_pci1410a.c index c876d0c40..6ab97597f 100644 --- a/drivers/pcmcia/ti_pci1410a.c +++ b/drivers/pcmcia/ti_pci1410a.c @@ -88,8 +88,8 @@ const char *indent = "\t "; int do_pinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { -#ifndef CFG_FIRST_PCMCIA_BUS -# define CFG_FIRST_PCMCIA_BUS 0 +#ifndef CONFIG_SYS_FIRST_PCMCIA_BUS +# define CONFIG_SYS_FIRST_PCMCIA_BUS 0 #endif int rcode = 0; @@ -99,7 +99,7 @@ int do_pinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 1; } if (strcmp(argv[1],"on") == 0) { - rcode = pcmcia_on(CFG_FIRST_PCMCIA_BUS); + rcode = pcmcia_on(CONFIG_SYS_FIRST_PCMCIA_BUS); } else if (strcmp(argv[1],"off") == 0) { rcode = pcmcia_off(); } else { @@ -148,11 +148,11 @@ int pcmcia_on(int ide_base_bus) debug("Enable PCMCIA Ti PCI1410A\n"); } - pcmcia_cis_ptr = CFG_PCMCIA_CIS_WIN; - cis_len = CFG_PCMCIA_CIS_WIN_SIZE; + pcmcia_cis_ptr = CONFIG_SYS_PCMCIA_CIS_WIN; + cis_len = CONFIG_SYS_PCMCIA_CIS_WIN_SIZE; - io_base = CFG_PCMCIA_IO_WIN; - io_len = CFG_PCMCIA_IO_WIN_SIZE; + io_base = CONFIG_SYS_PCMCIA_IO_WIN; + io_len = CONFIG_SYS_PCMCIA_IO_WIN_SIZE; /* * Setup the PCI device. diff --git a/drivers/pcmcia/tqm8xx_pcmcia.c b/drivers/pcmcia/tqm8xx_pcmcia.c index cc980c2ea..6ba8b5c01 100644 --- a/drivers/pcmcia/tqm8xx_pcmcia.c +++ b/drivers/pcmcia/tqm8xx_pcmcia.c @@ -40,7 +40,7 @@ static inline void power_config(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; /* * Configure Port B pins for * 5 Volts Enable and 3 Volts enable @@ -50,21 +50,21 @@ static inline void power_config(int slot) static inline void power_off(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; /* remove all power */ immap->im_cpm.cp_pbdat |= 0x00000300; } static inline void power_on_5_0(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; immap->im_cpm.cp_pbdat &= ~(0x0000100); immap->im_cpm.cp_pbdir |= 0x00000300; } static inline void power_on_3_3(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; immap->im_cpm.cp_pbdat &= ~(0x0000200); immap->im_cpm.cp_pbdir |= 0x00000300; } @@ -97,7 +97,7 @@ static inline void power_on_3_3(int slot) static inline void power_config(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; /* * Configure Port C pins for * 5 Volts Enable and 3 Volts enable @@ -108,20 +108,20 @@ static inline void power_config(int slot) static inline void power_off(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004); } static inline void power_on_5_0(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; immap->im_ioport.iop_pcdat |= 0x0004; immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004); } static inline void power_on_3_3(int slot) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; immap->im_ioport.iop_pcdat |= 0x0002; immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004); } @@ -132,14 +132,14 @@ static inline void power_on_3_3(int slot) static inline int check_card_is_absent(int slot) { volatile pcmconf8xx_t *pcmp = - (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); + (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); return pcmp->pcmc_pipr & (0x10000000 >> (slot << 4)); } #else static inline int check_card_is_absent(int slot) { volatile pcmconf8xx_t *pcmp = - (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); + (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); return pcmp->pcmc_pipr & (0x18000000 >> (slot << 4)); } #endif @@ -153,9 +153,9 @@ static inline int check_card_is_absent(int slot) int pcmcia_hardware_enable(int slot) { volatile pcmconf8xx_t *pcmp = - (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); + (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); volatile sysconf8xx_t *sysp = - (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf)); + (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf)); uint reg, mask; debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot); @@ -271,7 +271,7 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) u_long reg; # ifdef DEBUG volatile pcmconf8xx_t *pcmp = - (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); + (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); # endif debug ("voltage_set: " PCMCIA_BOARD_MSG diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index 0d48360a2..ed7ed6575 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -34,12 +34,12 @@ #ifdef CONFIG_UEC_ETH1 static uec_info_t eth1_uec_info = { .uf_info = { - .ucc_num = CFG_UEC1_UCC_NUM, - .rx_clock = CFG_UEC1_RX_CLK, - .tx_clock = CFG_UEC1_TX_CLK, - .eth_type = CFG_UEC1_ETH_TYPE, + .ucc_num = CONFIG_SYS_UEC1_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC1_RX_CLK, + .tx_clock = CONFIG_SYS_UEC1_TX_CLK, + .eth_type = CONFIG_SYS_UEC1_ETH_TYPE, }, -#if (CFG_UEC1_ETH_TYPE == FAST_ETH) +#if (CONFIG_SYS_UEC1_ETH_TYPE == FAST_ETH) .num_threads_tx = UEC_NUM_OF_THREADS_1, .num_threads_rx = UEC_NUM_OF_THREADS_1, #else @@ -50,19 +50,19 @@ static uec_info_t eth1_uec_info = { .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, - .phy_address = CFG_UEC1_PHY_ADDR, - .enet_interface = CFG_UEC1_INTERFACE_MODE, + .phy_address = CONFIG_SYS_UEC1_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC1_INTERFACE_MODE, }; #endif #ifdef CONFIG_UEC_ETH2 static uec_info_t eth2_uec_info = { .uf_info = { - .ucc_num = CFG_UEC2_UCC_NUM, - .rx_clock = CFG_UEC2_RX_CLK, - .tx_clock = CFG_UEC2_TX_CLK, - .eth_type = CFG_UEC2_ETH_TYPE, + .ucc_num = CONFIG_SYS_UEC2_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC2_RX_CLK, + .tx_clock = CONFIG_SYS_UEC2_TX_CLK, + .eth_type = CONFIG_SYS_UEC2_ETH_TYPE, }, -#if (CFG_UEC2_ETH_TYPE == FAST_ETH) +#if (CONFIG_SYS_UEC2_ETH_TYPE == FAST_ETH) .num_threads_tx = UEC_NUM_OF_THREADS_1, .num_threads_rx = UEC_NUM_OF_THREADS_1, #else @@ -73,19 +73,19 @@ static uec_info_t eth2_uec_info = { .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, - .phy_address = CFG_UEC2_PHY_ADDR, - .enet_interface = CFG_UEC2_INTERFACE_MODE, + .phy_address = CONFIG_SYS_UEC2_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC2_INTERFACE_MODE, }; #endif #ifdef CONFIG_UEC_ETH3 static uec_info_t eth3_uec_info = { .uf_info = { - .ucc_num = CFG_UEC3_UCC_NUM, - .rx_clock = CFG_UEC3_RX_CLK, - .tx_clock = CFG_UEC3_TX_CLK, - .eth_type = CFG_UEC3_ETH_TYPE, + .ucc_num = CONFIG_SYS_UEC3_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC3_RX_CLK, + .tx_clock = CONFIG_SYS_UEC3_TX_CLK, + .eth_type = CONFIG_SYS_UEC3_ETH_TYPE, }, -#if (CFG_UEC3_ETH_TYPE == FAST_ETH) +#if (CONFIG_SYS_UEC3_ETH_TYPE == FAST_ETH) .num_threads_tx = UEC_NUM_OF_THREADS_1, .num_threads_rx = UEC_NUM_OF_THREADS_1, #else @@ -96,19 +96,19 @@ static uec_info_t eth3_uec_info = { .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, - .phy_address = CFG_UEC3_PHY_ADDR, - .enet_interface = CFG_UEC3_INTERFACE_MODE, + .phy_address = CONFIG_SYS_UEC3_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC3_INTERFACE_MODE, }; #endif #ifdef CONFIG_UEC_ETH4 static uec_info_t eth4_uec_info = { .uf_info = { - .ucc_num = CFG_UEC4_UCC_NUM, - .rx_clock = CFG_UEC4_RX_CLK, - .tx_clock = CFG_UEC4_TX_CLK, - .eth_type = CFG_UEC4_ETH_TYPE, + .ucc_num = CONFIG_SYS_UEC4_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC4_RX_CLK, + .tx_clock = CONFIG_SYS_UEC4_TX_CLK, + .eth_type = CONFIG_SYS_UEC4_ETH_TYPE, }, -#if (CFG_UEC4_ETH_TYPE == FAST_ETH) +#if (CONFIG_SYS_UEC4_ETH_TYPE == FAST_ETH) .num_threads_tx = UEC_NUM_OF_THREADS_1, .num_threads_rx = UEC_NUM_OF_THREADS_1, #else @@ -119,19 +119,19 @@ static uec_info_t eth4_uec_info = { .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, - .phy_address = CFG_UEC4_PHY_ADDR, - .enet_interface = CFG_UEC4_INTERFACE_MODE, + .phy_address = CONFIG_SYS_UEC4_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC4_INTERFACE_MODE, }; #endif #ifdef CONFIG_UEC_ETH5 static uec_info_t eth5_uec_info = { .uf_info = { - .ucc_num = CFG_UEC5_UCC_NUM, - .rx_clock = CFG_UEC5_RX_CLK, - .tx_clock = CFG_UEC5_TX_CLK, - .eth_type = CFG_UEC5_ETH_TYPE, + .ucc_num = CONFIG_SYS_UEC5_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC5_RX_CLK, + .tx_clock = CONFIG_SYS_UEC5_TX_CLK, + .eth_type = CONFIG_SYS_UEC5_ETH_TYPE, }, -#if (CFG_UEC5_ETH_TYPE == FAST_ETH) +#if (CONFIG_SYS_UEC5_ETH_TYPE == FAST_ETH) .num_threads_tx = UEC_NUM_OF_THREADS_1, .num_threads_rx = UEC_NUM_OF_THREADS_1, #else @@ -142,19 +142,19 @@ static uec_info_t eth5_uec_info = { .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, - .phy_address = CFG_UEC5_PHY_ADDR, - .enet_interface = CFG_UEC5_INTERFACE_MODE, + .phy_address = CONFIG_SYS_UEC5_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC5_INTERFACE_MODE, }; #endif #ifdef CONFIG_UEC_ETH6 static uec_info_t eth6_uec_info = { .uf_info = { - .ucc_num = CFG_UEC6_UCC_NUM, - .rx_clock = CFG_UEC6_RX_CLK, - .tx_clock = CFG_UEC6_TX_CLK, - .eth_type = CFG_UEC6_ETH_TYPE, + .ucc_num = CONFIG_SYS_UEC6_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC6_RX_CLK, + .tx_clock = CONFIG_SYS_UEC6_TX_CLK, + .eth_type = CONFIG_SYS_UEC6_ETH_TYPE, }, -#if (CFG_UEC6_ETH_TYPE == FAST_ETH) +#if (CONFIG_SYS_UEC6_ETH_TYPE == FAST_ETH) .num_threads_tx = UEC_NUM_OF_THREADS_1, .num_threads_rx = UEC_NUM_OF_THREADS_1, #else @@ -165,8 +165,8 @@ static uec_info_t eth6_uec_info = { .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, - .phy_address = CFG_UEC6_PHY_ADDR, - .enet_interface = CFG_UEC6_INTERFACE_MODE, + .phy_address = CONFIG_SYS_UEC6_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC6_INTERFACE_MODE, }; #endif diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c index 03c408926..75f88a9a5 100644 --- a/drivers/rtc/ds1306.c +++ b/drivers/rtc/ds1306.c @@ -86,7 +86,7 @@ static void init_spi (void); /* read clock time from DS1306 and return it in *tmp */ int rtc_get (struct rtc_time *tmp) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; unsigned char spi_byte; /* Data Byte */ init_spi (); /* set port B for software SPI */ @@ -143,7 +143,7 @@ int rtc_get (struct rtc_time *tmp) /* set clock time in DS1306 RTC and in MPC8xx RTC */ int rtc_set (struct rtc_time *tmp) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; init_spi (); /* set port B for software SPI */ @@ -218,7 +218,7 @@ int rtc_set (struct rtc_time *tmp) /* Initialize Port B for software SPI */ static void init_spi (void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; /* Force output pins to begin at logic 0 */ immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK); @@ -235,7 +235,7 @@ static void init_spi (void) /* NOTE: soft_spi_send() assumes that the I/O lines are configured already */ static void soft_spi_send (unsigned char n) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; unsigned char bitpos; /* bit position to receive */ unsigned char i; /* Loop Control */ @@ -264,7 +264,7 @@ static void soft_spi_send (unsigned char n) /* NOTE: soft_spi_read() assumes that the I/O lines are configured already */ static unsigned char soft_spi_read (void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; unsigned char spi_byte = 0; /* Return value, assume success */ unsigned char bitpos; /* bit position to receive */ @@ -314,7 +314,7 @@ int rtc_get (struct rtc_time *tmp) * step just once. */ if (!slave) { - slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, SPI_MODE_3 | SPI_CS_HIGH); if (!slave) return; @@ -377,7 +377,7 @@ int rtc_set (struct rtc_time *tmp) { /* Assuming Vcc = 2.0V (lowest speed) */ if (!slave) { - slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, SPI_MODE_3 | SPI_CS_HIGH); if (!slave) return; @@ -408,7 +408,7 @@ void rtc_reset (void) { /* Assuming Vcc = 2.0V (lowest speed) */ if (!slave) { - slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000, SPI_MODE_3 | SPI_CS_HIGH); if (!slave) return; diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c index afc4b782d..0650d915a 100644 --- a/drivers/rtc/ds1307.c +++ b/drivers/rtc/ds1307.c @@ -47,11 +47,11 @@ #endif /*---------------------------------------------------------------------*/ -#ifndef CFG_I2C_RTC_ADDR -# define CFG_I2C_RTC_ADDR 0x68 +#ifndef CONFIG_SYS_I2C_RTC_ADDR +# define CONFIG_SYS_I2C_RTC_ADDR 0x68 #endif -#if defined(CONFIG_RTC_DS1307) && (CFG_I2C_SPEED > 100000) +#if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000) # error The DS1307 is specified only up to 100kHz! #endif @@ -187,13 +187,13 @@ void rtc_reset (void) static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } static unsigned bcd2bin (uchar n) diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c index 509f81ff7..58e3966ec 100644 --- a/drivers/rtc/ds1337.c +++ b/drivers/rtc/ds1337.c @@ -160,10 +160,10 @@ int rtc_set (struct rtc_time *tmp) * SQW/INTB* pin and program it for 32,768 Hz output. Note that * according to the datasheet, turning on the square wave output * increases the current drain on the backup battery from about - * 600 nA to 2uA. Define CFG_RTC_DS1337_NOOSC if you wish to turn + * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn * off the OSC output. */ -#ifdef CFG_RTC_DS1337_NOOSC +#ifdef CONFIG_SYS_RTC_DS1337_NOOSC #define RTC_DS1337_RESET_VAL \ (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) #else @@ -182,13 +182,13 @@ void rtc_reset (void) static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } static unsigned bcd2bin (uchar n) diff --git a/drivers/rtc/ds1374.c b/drivers/rtc/ds1374.c index 79a3d7306..d61a2289f 100644 --- a/drivers/rtc/ds1374.c +++ b/drivers/rtc/ds1374.c @@ -48,11 +48,11 @@ #endif /*---------------------------------------------------------------------*/ -#ifndef CFG_I2C_RTC_ADDR -# define CFG_I2C_RTC_ADDR 0x68 +#ifndef CONFIG_SYS_I2C_RTC_ADDR +# define CONFIG_SYS_I2C_RTC_ADDR 0x68 #endif -#if defined(CONFIG_RTC_DS1374) && (CFG_I2C_SPEED > 400000) +#if defined(CONFIG_RTC_DS1374) && (CONFIG_SYS_I2C_SPEED > 400000) # error The DS1374 is specified up to 400kHz in fast mode! #endif @@ -239,22 +239,22 @@ void rtc_reset (void){ */ static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val, boolean_t set) { if (set == TRUE) { - val |= i2c_reg_read (CFG_I2C_RTC_ADDR, reg); - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } else { - val = i2c_reg_read (CFG_I2C_RTC_ADDR, reg) & ~val; - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val; + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } } static void rtc_write_raw (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } #endif diff --git a/drivers/rtc/ds1556.c b/drivers/rtc/ds1556.c index 757462617..763d22a03 100644 --- a/drivers/rtc/ds1556.c +++ b/drivers/rtc/ds1556.c @@ -43,7 +43,7 @@ static void rtc_write( unsigned int addr, uchar val); static uchar bin2bcd (unsigned int n); static unsigned bcd2bin(uchar c); -#define RTC_BASE ( CFG_NVRAM_SIZE + CFG_NVRAM_BASE_ADDR ) +#define RTC_BASE ( CONFIG_SYS_NVRAM_SIZE + CONFIG_SYS_NVRAM_BASE_ADDR ) #define RTC_YEAR ( RTC_BASE + 0xf ) #define RTC_MONTH ( RTC_BASE + 0xe ) diff --git a/drivers/rtc/ds164x.c b/drivers/rtc/ds164x.c index 00494b38d..1e96679de 100644 --- a/drivers/rtc/ds164x.c +++ b/drivers/rtc/ds164x.c @@ -49,7 +49,7 @@ static unsigned bcd2bin(uchar c); /* * DS164x registers layout */ -#define RTC_BASE ( CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE ) +#define RTC_BASE ( CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE ) #define RTC_YEAR ( RTC_BASE + 0x07 ) #define RTC_MONTH ( RTC_BASE + 0x06 ) diff --git a/drivers/rtc/ds174x.c b/drivers/rtc/ds174x.c index 43e6ab763..738d1185c 100644 --- a/drivers/rtc/ds174x.c +++ b/drivers/rtc/ds174x.c @@ -40,7 +40,7 @@ static void rtc_write( unsigned int addr, uchar val); static uchar bin2bcd (unsigned int n); static unsigned bcd2bin(uchar c); -#define RTC_BASE ( CFG_NVRAM_SIZE + CFG_NVRAM_BASE_ADDR ) +#define RTC_BASE ( CONFIG_SYS_NVRAM_SIZE + CONFIG_SYS_NVRAM_BASE_ADDR ) #define RTC_YEAR ( RTC_BASE + 7 ) #define RTC_MONTH ( RTC_BASE + 6 ) diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c index da8a3e63f..ef033588a 100644 --- a/drivers/rtc/ds3231.c +++ b/drivers/rtc/ds3231.c @@ -177,13 +177,13 @@ void rtc_reset (void) static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } static unsigned bcd2bin (uchar n) diff --git a/drivers/rtc/isl1208.c b/drivers/rtc/isl1208.c index 87f06cc1f..71f63d5fa 100644 --- a/drivers/rtc/isl1208.c +++ b/drivers/rtc/isl1208.c @@ -153,12 +153,12 @@ void rtc_reset (void) static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } static unsigned bcd2bin (uchar n) diff --git a/drivers/rtc/m41t11.c b/drivers/rtc/m41t11.c index 0a9b12ec2..3a77c1b63 100644 --- a/drivers/rtc/m41t11.c +++ b/drivers/rtc/m41t11.c @@ -35,15 +35,15 @@ is what should be done. #define CONFIG_RTC_M41T11 1 -#define CFG_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 #if 0 -#define CFG_M41T11_EXT_CENTURY_DATA +#define CONFIG_SYS_M41T11_EXT_CENTURY_DATA #else -#define CFG_M41T11_BASE_YEAR 2000 +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 #endif */ -#if defined(CFG_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE) +#if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE) static unsigned bcd2bin (uchar n) { @@ -75,7 +75,7 @@ static unsigned char bin2bcd (unsigned int n) #define RTC_CONTROL_ADDR 0x7 -#ifndef CFG_M41T11_EXT_CENTURY_DATA +#ifndef CONFIG_SYS_M41T11_EXT_CENTURY_DATA #define REG_CNT (RTC_REG_CNT+1) @@ -83,8 +83,8 @@ static unsigned char bin2bcd (unsigned int n) you only get 00-99 for the year we will asume you want from the year 2000 if you don't set the config */ -#ifndef CFG_M41T11_BASE_YEAR -#define CFG_M41T11_BASE_YEAR 2000 +#ifndef CONFIG_SYS_M41T11_BASE_YEAR +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 #endif #else @@ -101,7 +101,7 @@ int rtc_get (struct rtc_time *tmp) int rel = 0; uchar data[RTC_REG_CNT]; - i2c_read(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); if( data[RTC_SEC_ADDR] & 0x80 ){ printf( "m41t11 RTC Clock stopped!!!\n" ); @@ -112,14 +112,14 @@ int rtc_get (struct rtc_time *tmp) tmp->tm_hour = bcd2bin (data[RTC_HOUR_ADDR] & 0x3F); tmp->tm_mday = bcd2bin (data[RTC_DATE_ADDR] & 0x3F); tmp->tm_mon = bcd2bin (data[RTC_MONTH_ADDR]& 0x1F); -#ifndef CFG_M41T11_EXT_CENTURY_DATA - tmp->tm_year = CFG_M41T11_BASE_YEAR +#ifndef CONFIG_SYS_M41T11_EXT_CENTURY_DATA + tmp->tm_year = CONFIG_SYS_M41T11_BASE_YEAR + bcd2bin(data[RTC_YEARS_ADDR]) + ((data[RTC_HOUR_ADDR]&0x40) ? 100 : 0); #else { unsigned char cent; - i2c_read(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); if( !(data[RTC_HOUR_ADDR] & 0x80) ){ printf( "m41t11 RTC: cann't keep track of years without CEB set\n" ); rel = -1; @@ -127,7 +127,7 @@ int rtc_get (struct rtc_time *tmp) if( (cent & 0x1) != ((data[RTC_HOUR_ADDR]&0x40)>>7) ){ /*century flip store off new year*/ cent += 1; - i2c_write(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); + i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); } tmp->tm_year =((int)cent*100)+bcd2bin(data[RTC_YEARS_ADDR]); } @@ -161,21 +161,21 @@ int rtc_set (struct rtc_time *tmp) data[RTC_HOUR_ADDR] |= 0x80;/*we will always use CEB*/ data[RTC_YEARS_ADDR] = bin2bcd(tmp->tm_year%100);/*same thing either way*/ -#ifndef CFG_M41T11_EXT_CENTURY_DATA - if( ((tmp->tm_year - CFG_M41T11_BASE_YEAR) > 200) || - (tmp->tm_year < CFG_M41T11_BASE_YEAR) ){ +#ifndef CONFIG_SYS_M41T11_EXT_CENTURY_DATA + if( ((tmp->tm_year - CONFIG_SYS_M41T11_BASE_YEAR) > 200) || + (tmp->tm_year < CONFIG_SYS_M41T11_BASE_YEAR) ){ printf( "m41t11 RTC setting year out of range!!need recompile\n" ); } - data[RTC_HOUR_ADDR] |= (tmp->tm_year - CFG_M41T11_BASE_YEAR) > 100 ? 0x40 : 0; + data[RTC_HOUR_ADDR] |= (tmp->tm_year - CONFIG_SYS_M41T11_BASE_YEAR) > 100 ? 0x40 : 0; #else { unsigned char cent; cent = tmp->tm_year ? tmp->tm_year / 100 : 0; data[RTC_HOUR_ADDR] |= (cent & 0x1) ? 0x40 : 0; - i2c_write(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); + i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); } #endif - i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); + i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); return 0; } @@ -184,13 +184,13 @@ void rtc_reset (void) { unsigned char val; /* clear all control & status registers */ - i2c_read(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, 1); + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, 1); val = val & 0x7F;/*make sure we are running*/ - i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, RTC_REG_CNT); + i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, RTC_REG_CNT); - i2c_read(CFG_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); val = val & 0x3F;/*turn off freq test keep calibration*/ - i2c_write(CFG_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); + i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); } int rtc_store(int addr, unsigned char* data, int size) @@ -198,12 +198,12 @@ int rtc_store(int addr, unsigned char* data, int size) /*don't let things wrap onto the time on a write*/ if( (addr+size) >= M41T11_STORAGE_SZ ) return 1; - return i2c_write( CFG_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); + return i2c_write( CONFIG_SYS_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); } int rtc_recall(int addr, unsigned char* data, int size) { - return i2c_read( CFG_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); + return i2c_read( CONFIG_SYS_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); } #endif diff --git a/drivers/rtc/m41t60.c b/drivers/rtc/m41t60.c index 71bfc3267..e34a5f478 100644 --- a/drivers/rtc/m41t60.c +++ b/drivers/rtc/m41t60.c @@ -34,7 +34,7 @@ #include <rtc.h> #include <i2c.h> -#if defined(CFG_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE) +#if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE) static unsigned bcd2bin(uchar n) { @@ -85,7 +85,7 @@ static void rtc_dump(char const *const label) { uchar data[8]; - if (i2c_read(CFG_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { + if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { printf("I2C read failed in rtc_dump()\n"); return; } @@ -114,7 +114,7 @@ static uchar *rtc_validate(void) uchar min, date, month, years; rtc_dump("begin validate"); - if (i2c_read(CFG_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { + if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { printf("I2C read failed in rtc_validate()\n"); return 0; } @@ -125,7 +125,7 @@ static uchar *rtc_validate(void) if (0x00 != (data[RTC_CTRL] & 0x80)) { printf("M41T60 RTC clock lost power.\n"); data[RTC_SEC] = 0x80; - if (i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC, 1, data, 1)) { + if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC, 1, data, 1)) { printf("I2C write failed in rtc_validate()\n"); return 0; } @@ -161,7 +161,7 @@ static uchar *rtc_validate(void) data[RTC_YEAR] = 0x00; data[RTC_CTRL] &= 0x7F; /* reset OUT bit */ - if (i2c_write(CFG_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { + if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { printf("I2C write failed in rtc_validate()\n"); return 0; } @@ -212,7 +212,7 @@ int rtc_set(struct rtc_time *tmp) data[RTC_YEAR] = bin2bcd(tmp->tm_year % 100); data[RTC_MONTH] |= year2cb(tmp->tm_year) << 6; data[RTC_DAY] = bin2bcd(tmp->tm_wday + 1) & 0x07; - if (i2c_write(CFG_I2C_RTC_ADDR, 0, 1, data, RTC_REG_CNT)) { + if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, RTC_REG_CNT)) { printf("I2C write failed in rtc_set()\n"); return -1; } @@ -255,10 +255,10 @@ void rtc_reset(void) * Turn off frequency test. */ data[RTC_CTRL] &= 0xBF; - if (i2c_write(CFG_I2C_RTC_ADDR, RTC_CTRL, 1, data + RTC_CTRL, 1)) { + if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_CTRL, 1, data + RTC_CTRL, 1)) { printf("I2C write failed in rtc_reset()\n"); return; } rtc_dump("end reset"); } -#endif /* CONFIG_RTC_M41T60 && CFG_I2C_RTC_ADDR && CONFIG_CMD_DATE */ +#endif /* CONFIG_RTC_M41T60 && CONFIG_SYS_I2C_RTC_ADDR && CONFIG_CMD_DATE */ diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c index 9b7c84a08..cfe84f926 100644 --- a/drivers/rtc/m41t62.c +++ b/drivers/rtc/m41t62.c @@ -68,7 +68,7 @@ int rtc_get(struct rtc_time *tm) { u8 buf[M41T62_DATETIME_REG_SIZE]; - i2c_read(CFG_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE); + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE); debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", @@ -104,7 +104,7 @@ int rtc_set(struct rtc_time *tm) tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec); - i2c_read(CFG_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE); + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE); /* Merge time-data and register flags into buf[0..7] */ buf[M41T62_REG_SSEC] = 0; @@ -123,7 +123,7 @@ int rtc_set(struct rtc_time *tm) /* assume 20YY not 19YY */ buf[M41T62_REG_YEAR] = BIN2BCD(tm->tm_year % 100); - if (i2c_write(CFG_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) { + if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) { printf("I2C write failed in %s()\n", __func__); return -1; } diff --git a/drivers/rtc/m48t35ax.c b/drivers/rtc/m48t35ax.c index e19b81b16..1482edd60 100644 --- a/drivers/rtc/m48t35ax.c +++ b/drivers/rtc/m48t35ax.c @@ -147,14 +147,14 @@ static uchar rtc_read (uchar reg) { uchar val; val = *(unsigned char *) - ((CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE - 8) + reg); + ((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg); return val; } static void rtc_write (uchar reg, uchar val) { *(unsigned char *) - ((CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE - 8) + reg) = val; + ((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val; } static unsigned bcd2bin (uchar n) diff --git a/drivers/rtc/max6900.c b/drivers/rtc/max6900.c index 758d7b79d..7c99c5e5b 100644 --- a/drivers/rtc/max6900.c +++ b/drivers/rtc/max6900.c @@ -34,20 +34,20 @@ #if defined(CONFIG_CMD_DATE) -#ifndef CFG_I2C_RTC_ADDR -#define CFG_I2C_RTC_ADDR 0x50 +#ifndef CONFIG_SYS_I2C_RTC_ADDR +#define CONFIG_SYS_I2C_RTC_ADDR 0x50 #endif /* ------------------------------------------------------------------------- */ static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); udelay(2500); } diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c index 1225454fc..38484ce26 100644 --- a/drivers/rtc/mc146818.c +++ b/drivers/rtc/mc146818.c @@ -38,7 +38,7 @@ static void rtc_write (uchar reg, uchar val); static uchar bin2bcd (unsigned int n); static unsigned bcd2bin(uchar c); -#define RTC_PORT_MC146818 CFG_ISA_IO_BASE_ADDRESS + 0x70 +#define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70 #define RTC_SECONDS 0x00 #define RTC_SECONDS_ALARM 0x01 #define RTC_MINUTES 0x02 @@ -141,18 +141,18 @@ void rtc_reset (void) /* ------------------------------------------------------------------------- */ -#ifdef CFG_RTC_REG_BASE_ADDR +#ifdef CONFIG_SYS_RTC_REG_BASE_ADDR /* * use direct memory access */ static uchar rtc_read (uchar reg) { - return(in8(CFG_RTC_REG_BASE_ADDR+reg)); + return(in8(CONFIG_SYS_RTC_REG_BASE_ADDR+reg)); } static void rtc_write (uchar reg, uchar val) { - out8(CFG_RTC_REG_BASE_ADDR+reg, val); + out8(CONFIG_SYS_RTC_REG_BASE_ADDR+reg, val); } #else static uchar rtc_read (uchar reg) diff --git a/drivers/rtc/mcfrtc.c b/drivers/rtc/mcfrtc.c index c2af19798..979c46651 100644 --- a/drivers/rtc/mcfrtc.c +++ b/drivers/rtc/mcfrtc.c @@ -32,7 +32,7 @@ #undef RTC_DEBUG -#ifndef CFG_MCFRTC_BASE +#ifndef CONFIG_SYS_MCFRTC_BASE #error RTC_BASE is not defined! #endif @@ -41,7 +41,7 @@ int rtc_get(struct rtc_time *tmp) { - volatile rtc_t *rtc = (rtc_t *) (CFG_MCFRTC_BASE); + volatile rtc_t *rtc = (rtc_t *) (CONFIG_SYS_MCFRTC_BASE); int rtc_days, rtc_hrs, rtc_mins; int tim; @@ -70,7 +70,7 @@ int rtc_get(struct rtc_time *tmp) int rtc_set(struct rtc_time *tmp) { - volatile rtc_t *rtc = (rtc_t *) (CFG_MCFRTC_BASE); + volatile rtc_t *rtc = (rtc_t *) (CONFIG_SYS_MCFRTC_BASE); static int month_days[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 @@ -112,7 +112,7 @@ int rtc_set(struct rtc_time *tmp) void rtc_reset(void) { - volatile rtc_t *rtc = (rtc_t *) (CFG_MCFRTC_BASE); + volatile rtc_t *rtc = (rtc_t *) (CONFIG_SYS_MCFRTC_BASE); if ((rtc->cr & RTC_CR_EN) == 0) { printf("real-time-clock was stopped. Now starting...\n"); diff --git a/drivers/rtc/mpc5xxx.c b/drivers/rtc/mpc5xxx.c index 6231b9b69..ec0b0ef68 100644 --- a/drivers/rtc/mpc5xxx.c +++ b/drivers/rtc/mpc5xxx.c @@ -57,7 +57,7 @@ typedef struct rtc5200 { *****************************************************************************/ int rtc_get (struct rtc_time *tmp) { - RTC5200 *rtc = (RTC5200 *) (CFG_MBAR+0x800); + RTC5200 *rtc = (RTC5200 *) (CONFIG_SYS_MBAR+0x800); ulong time, date, time2; /* read twice to avoid getting a funny time when the second is just changing */ @@ -90,7 +90,7 @@ int rtc_get (struct rtc_time *tmp) *****************************************************************************/ int rtc_set (struct rtc_time *tmp) { - RTC5200 *rtc = (RTC5200 *) (CFG_MBAR+0x800); + RTC5200 *rtc = (RTC5200 *) (CONFIG_SYS_MBAR+0x800); ulong time, date, year; debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", diff --git a/drivers/rtc/mpc8xx.c b/drivers/rtc/mpc8xx.c index 2bbc5d3d2..1c24e59e4 100644 --- a/drivers/rtc/mpc8xx.c +++ b/drivers/rtc/mpc8xx.c @@ -37,7 +37,7 @@ int rtc_get (struct rtc_time *tmp) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; ulong tim; tim = immr->im_sit.sit_rtc; @@ -53,7 +53,7 @@ int rtc_get (struct rtc_time *tmp) int rtc_set (struct rtc_time *tmp) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; ulong tim; debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c index 2fe1e37dc..cd9fb65c3 100644 --- a/drivers/rtc/pcf8563.c +++ b/drivers/rtc/pcf8563.c @@ -129,12 +129,12 @@ void rtc_reset (void) static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } static unsigned bcd2bin (uchar n) diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c index 6c1e9bdec..8b2b174ae 100644 --- a/drivers/rtc/pl031.c +++ b/drivers/rtc/pl031.c @@ -29,8 +29,8 @@ #if defined(CONFIG_CMD_DATE) -#ifndef CFG_RTC_PL031_BASE -#error CFG_RTC_PL031_BASE is not defined! +#ifndef CONFIG_SYS_RTC_PL031_BASE +#error CONFIG_SYS_RTC_PL031_BASE is not defined! #endif /* @@ -48,9 +48,9 @@ #define RTC_CR_START (1 << 0) #define RTC_WRITE_REG(addr, val) \ - (*(volatile unsigned int *)(CFG_RTC_PL031_BASE + (addr)) = (val)) + (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr)) = (val)) #define RTC_READ_REG(addr) \ - (*(volatile unsigned int *)(CFG_RTC_PL031_BASE + (addr))) + (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr))) static int pl031_initted = 0; diff --git a/drivers/rtc/rs5c372.c b/drivers/rtc/rs5c372.c index 82dd9694e..d6cd7c825 100644 --- a/drivers/rtc/rs5c372.c +++ b/drivers/rtc/rs5c372.c @@ -50,8 +50,8 @@ static unsigned int rtc_debug = DEBUG; #define rtc_debug 0 /* gcc will remove all the debug code for us */ #endif -#ifndef CFG_I2C_RTC_ADDR -#define CFG_I2C_RTC_ADDR 0x32 +#ifndef CONFIG_SYS_I2C_RTC_ADDR +#define CONFIG_SYS_I2C_RTC_ADDR 0x32 #endif #define RS5C372_RAM_SIZE 0x10 @@ -77,7 +77,7 @@ rs5c372_readram(unsigned char *buf, int len) { int ret; - ret = i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, len); + ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, len); if (ret != 0) { printf("%s: failed to read\n", __FUNCTION__); return ret; @@ -117,7 +117,7 @@ rs5c372_enable(void) buf[14] = 0; /* reg. 13 */ buf[15] = 0; /* reg. 14 */ buf[16] = USE_24HOUR_MODE; /* reg. 15 */ - ret = i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, RS5C372_RAM_SIZE+1); + ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, RS5C372_RAM_SIZE+1); if (ret != 0) { printf("%s: failed\n", __FUNCTION__); return; @@ -218,7 +218,7 @@ int rtc_set (struct rtc_time *tmp) memset(buf, 0, sizeof(buf)); /* only read register 15 */ - ret = i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 1); + ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 1); if (ret == 0) { /* need to save register 15 */ @@ -247,7 +247,7 @@ int rtc_set (struct rtc_time *tmp) printf("WARNING: year should be between 1970 and 2069!\n"); buf[7] = bin2bcd(tmp->tm_year % 100); - ret = i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, 8); + ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 8); if (ret != 0) { printf("rs5c372_set_datetime(), i2c_master_send() returned %d\n",ret); return -1; diff --git a/drivers/rtc/rx8025.c b/drivers/rtc/rx8025.c index 9f4ce2f9a..da87394a0 100644 --- a/drivers/rtc/rx8025.c +++ b/drivers/rtc/rx8025.c @@ -42,8 +42,8 @@ #endif /*---------------------------------------------------------------------*/ -#ifndef CFG_I2C_RTC_ADDR -# define CFG_I2C_RTC_ADDR 0x32 +#ifndef CONFIG_SYS_I2C_RTC_ADDR +# define CONFIG_SYS_I2C_RTC_ADDR 0x32 #endif /* @@ -102,7 +102,7 @@ int rtc_get (struct rtc_time *tmp) uchar sec, min, hour, mday, wday, mon, year, ctl2; uchar buf[16]; - if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16)) + if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16)) printf("Error reading from RTC\n"); sec = rtc_read(RTC_SEC_REG_ADDR); @@ -189,7 +189,7 @@ void rtc_reset (void) uchar buf[16]; uchar ctl2; - if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16)) + if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16)) printf("Error reading from RTC\n"); ctl2 = rtc_read(RTC_CTL2_REG_ADDR); @@ -221,7 +221,7 @@ static void rtc_write (uchar reg, uchar val) uchar buf[2]; buf[0] = reg << 4; buf[1] = val; - if (i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, 2) != 0) + if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 2) != 0) printf("Error writing to RTC\n"); } diff --git a/drivers/rtc/x1205.c b/drivers/rtc/x1205.c index 7a3b51491..56115b032 100644 --- a/drivers/rtc/x1205.c +++ b/drivers/rtc/x1205.c @@ -96,7 +96,7 @@ static void rtc_write(int reg, u8 val) { - i2c_write(CFG_I2C_RTC_ADDR, reg, 2, &val, 1); + i2c_write(CONFIG_SYS_I2C_RTC_ADDR, reg, 2, &val, 1); } /* @@ -108,7 +108,7 @@ int rtc_get(struct rtc_time *tm) { u8 buf[8]; - i2c_read(CFG_I2C_RTC_ADDR, X1205_CCR_BASE, 2, buf, 8); + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, X1205_CCR_BASE, 2, buf, 8); debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c index a1fcd057a..e04fc298d 100644 --- a/drivers/serial/mcfuart.c +++ b/drivers/serial/mcfuart.c @@ -41,7 +41,7 @@ int serial_init(void) volatile uart_t *uart; u32 counter; - uart = (volatile uart_t *)(CFG_UART_BASE); + uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); uart_port_conf(); @@ -76,7 +76,7 @@ int serial_init(void) void serial_putc(const char c) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); if (c == '\n') serial_putc('\r'); @@ -96,7 +96,7 @@ void serial_puts(const char *s) int serial_getc(void) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); /* Wait for a character to arrive. */ while (!(uart->usr & UART_USR_RXRDY)) ; @@ -105,14 +105,14 @@ int serial_getc(void) int serial_tstc(void) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); return (uart->usr & UART_USR_RXRDY); } void serial_setbrg(void) { - volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE); + volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); u32 counter; counter = ((gd->bus_clk / gd->baudrate)) >> 5; diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 6b3f60eb5..93c2243d7 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -1,12 +1,12 @@ /* * COM1 NS16550 support * originally from linux source (arch/ppc/boot/ns16550.c) - * modified to use CFG_ISA_MEM and new defines + * modified to use CONFIG_SYS_ISA_MEM and new defines */ #include <config.h> -#ifdef CFG_NS16550 +#ifdef CONFIG_SYS_NS16550 #include <ns16550.h> diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index b361eef9a..bce75489d 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -23,7 +23,7 @@ #include <common.h> -#ifdef CFG_NS16550_SERIAL +#ifdef CONFIG_SYS_NS16550_SERIAL #include <ns16550.h> #ifdef CONFIG_NS87308 @@ -48,13 +48,13 @@ DECLARE_GLOBAL_DATA_PTR; #error "Invalid console index value." #endif -#if CONFIG_CONS_INDEX == 1 && !defined(CFG_NS16550_COM1) +#if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1) #error "Console port 1 defined but not configured." -#elif CONFIG_CONS_INDEX == 2 && !defined(CFG_NS16550_COM2) +#elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2) #error "Console port 2 defined but not configured." -#elif CONFIG_CONS_INDEX == 3 && !defined(CFG_NS16550_COM3) +#elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3) #error "Console port 3 defined but not configured." -#elif CONFIG_CONS_INDEX == 4 && !defined(CFG_NS16550_COM4) +#elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4) #error "Console port 4 defined but not configured." #endif @@ -62,23 +62,23 @@ DECLARE_GLOBAL_DATA_PTR; * the array is 0 based. */ static NS16550_t serial_ports[4] = { -#ifdef CFG_NS16550_COM1 - (NS16550_t)CFG_NS16550_COM1, +#ifdef CONFIG_SYS_NS16550_COM1 + (NS16550_t)CONFIG_SYS_NS16550_COM1, #else NULL, #endif -#ifdef CFG_NS16550_COM2 - (NS16550_t)CFG_NS16550_COM2, +#ifdef CONFIG_SYS_NS16550_COM2 + (NS16550_t)CONFIG_SYS_NS16550_COM2, #else NULL, #endif -#ifdef CFG_NS16550_COM3 - (NS16550_t)CFG_NS16550_COM3, +#ifdef CONFIG_SYS_NS16550_COM3 + (NS16550_t)CONFIG_SYS_NS16550_COM3, #else NULL, #endif -#ifdef CFG_NS16550_COM4 - (NS16550_t)CFG_NS16550_COM4 +#ifdef CONFIG_SYS_NS16550_COM4 + (NS16550_t)CONFIG_SYS_NS16550_COM4 #else NULL #endif @@ -126,7 +126,7 @@ static int calc_divisor (NS16550_t port) { #ifdef CONFIG_OMAP1510 /* If can't cleanly clock 115200 set div to 1 */ - if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { + if ((CONFIG_SYS_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ return (1); /* return 1 for base divisor */ } @@ -134,7 +134,7 @@ static int calc_divisor (NS16550_t port) #endif #ifdef CONFIG_OMAP1610 /* If can't cleanly clock 115200 set div to 1 */ - if ((CFG_NS16550_CLK == 48000000) && (gd->baudrate == 115200)) { + if ((CONFIG_SYS_NS16550_CLK == 48000000) && (gd->baudrate == 115200)) { return (26); /* return 26 for base divisor */ } #endif @@ -146,11 +146,11 @@ static int calc_divisor (NS16550_t port) #endif /* Compute divisor value. Normally, we should simply return: - * CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate + * CONFIG_SYS_NS16550_CLK) / MODE_X_DIV / gd->baudrate * but we need to round that value by adding 0.5. * Rounding is especially important at high baud rates. */ - return (CFG_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) / + return (CONFIG_SYS_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) / (MODE_X_DIV * gd->baudrate); } @@ -163,19 +163,19 @@ int serial_init (void) initialise_ns87308(); #endif -#ifdef CFG_NS16550_COM1 +#ifdef CONFIG_SYS_NS16550_COM1 clock_divisor = calc_divisor(serial_ports[0]); NS16550_init(serial_ports[0], clock_divisor); #endif -#ifdef CFG_NS16550_COM2 +#ifdef CONFIG_SYS_NS16550_COM2 clock_divisor = calc_divisor(serial_ports[1]); NS16550_init(serial_ports[1], clock_divisor); #endif -#ifdef CFG_NS16550_COM3 +#ifdef CONFIG_SYS_NS16550_COM3 clock_divisor = calc_divisor(serial_ports[2]); NS16550_init(serial_ports[2], clock_divisor); #endif -#ifdef CFG_NS16550_COM4 +#ifdef CONFIG_SYS_NS16550_COM4 clock_divisor = calc_divisor(serial_ports[3]); NS16550_init(serial_ports[3], clock_divisor); #endif diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 9eaf9860b..c4b36f06c 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -67,7 +67,7 @@ void spi_free_slave(struct spi_slave *slave) void spi_init(void) { - volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; + volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; /* * SPI pins on the MPC83xx are not muxed, so all we do is initialize @@ -94,7 +94,7 @@ void spi_release_bus(struct spi_slave *slave) int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags) { - volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; + volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; unsigned int tmpdout, tmpdin, event; int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0); int tm, isRead = 0; diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c index 25b589ad7..13df8cb7d 100644 --- a/drivers/spi/soft_spi.c +++ b/drivers/spi/soft_spi.c @@ -59,7 +59,7 @@ static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) void spi_init (void) { #ifdef SPI_INIT - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; SPI_INIT; #endif @@ -95,8 +95,8 @@ void spi_free_slave(struct spi_slave *slave) int spi_claim_bus(struct spi_slave *slave) { -#ifdef CFG_IMMR - volatile immap_t *immr = (immap_t *)CFG_IMMR; +#ifdef CONFIG_SYS_IMMR + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; #endif struct soft_spi_slave *ss = to_soft_spi(slave); @@ -132,8 +132,8 @@ void spi_release_bus(struct spi_slave *slave) int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags) { -#ifdef CFG_IMMR - volatile immap_t *immr = (immap_t *)CFG_IMMR; +#ifdef CONFIG_SYS_IMMR + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; #endif struct soft_spi_slave *ss = to_soft_spi(slave); uchar tmpdin = 0; diff --git a/drivers/usb/sl811_usb.c b/drivers/usb/sl811_usb.c index 159cc2527..48f1ee95f 100644 --- a/drivers/usb/sl811_usb.c +++ b/drivers/usb/sl811_usb.c @@ -111,7 +111,7 @@ static void inline sl811_write_buf(__u8 offset, __u8 *buf, __u8 size) int usb_init_kup4x (void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; int i; unsigned char tmp; @@ -265,7 +265,7 @@ static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *b sl811_write(SL811_CTRL_A, ctrl); while (!(sl811_read(SL811_INTRSTS) & SL811_INTR_DONE_A)) { - if (5*CFG_HZ < get_timer(time_start)) { + if (5*CONFIG_SYS_HZ < get_timer(time_start)) { printf("USB transmit timed out\n"); return -USB_ST_CRC_ERR; } diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c index da11ecbc0..c1aac3382 100644 --- a/drivers/usb/usb_ohci.c +++ b/drivers/usb/usb_ohci.c @@ -73,7 +73,7 @@ defined(CONFIG_440EP) || \ defined(CONFIG_PCI_OHCI) || \ defined(CONFIG_MPC5200) || \ - defined(CFG_OHCI_USE_NPS) + defined(CONFIG_SYS_OHCI_USE_NPS) # define OHCI_USE_NPS /* force NoPowerSwitching mode */ #endif @@ -89,13 +89,13 @@ /* * e.g. PCI controllers need this */ -#ifdef CFG_OHCI_SWAP_REG_ACCESS +#ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS # define readl(a) __swap_32(*((volatile u32 *)(a))) # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a)) #else # define readl(a) (*((volatile u32 *)(a))) # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a)) -#endif /* CFG_OHCI_SWAP_REG_ACCESS */ +#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */ #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; }) @@ -129,13 +129,13 @@ static struct pci_device_id ehci_pci_ids[] = { #define info(format, arg...) do {} while(0) #endif -#ifdef CFG_OHCI_BE_CONTROLLER +#ifdef CONFIG_SYS_OHCI_BE_CONTROLLER # define m16_swap(x) cpu_to_be16(x) # define m32_swap(x) cpu_to_be32(x) #else # define m16_swap(x) cpu_to_le16(x) # define m32_swap(x) cpu_to_le32(x) -#endif /* CFG_OHCI_BE_CONTROLLER */ +#endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */ /* global ohci_t */ static ohci_t gohci; @@ -1819,13 +1819,13 @@ int usb_lowlevel_init(void) pci_dev_t pdev; #endif -#ifdef CFG_USB_OHCI_CPU_INIT +#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT /* cpu dependant init */ if(usb_cpu_init()) return -1; #endif -#ifdef CFG_USB_OHCI_BOARD_INIT +#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT /* board dependant init */ if(usb_board_init()) return -1; @@ -1873,21 +1873,21 @@ int usb_lowlevel_init(void) } else return -1; #else - gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE; + gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE; #endif gohci.flags = 0; - gohci.slot_name = CFG_USB_OHCI_SLOT_NAME; + gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME; if (hc_reset (&gohci) < 0) { hc_release_ohci (&gohci); err ("can't reset usb-%s", gohci.slot_name); -#ifdef CFG_USB_OHCI_BOARD_INIT +#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT /* board dependant cleanup */ usb_board_init_fail(); #endif -#ifdef CFG_USB_OHCI_CPU_INIT +#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT /* cpu dependant cleanup */ usb_cpu_init_fail(); #endif @@ -1901,12 +1901,12 @@ int usb_lowlevel_init(void) err ("can't start usb-%s", gohci.slot_name); hc_release_ohci (&gohci); /* Initialization failed */ -#ifdef CFG_USB_OHCI_BOARD_INIT +#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT /* board dependant cleanup */ usb_board_stop(); #endif -#ifdef CFG_USB_OHCI_CPU_INIT +#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT /* cpu dependant cleanup */ usb_cpu_stop(); #endif @@ -1932,13 +1932,13 @@ int usb_lowlevel_stop(void) /* call hc_release_ohci() here ? */ hc_reset (&gohci); -#ifdef CFG_USB_OHCI_BOARD_INIT +#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT /* board dependant cleanup */ if(usb_board_stop()) return -1; #endif -#ifdef CFG_USB_OHCI_CPU_INIT +#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT /* cpu dependant cleanup */ if(usb_cpu_stop()) return -1; diff --git a/drivers/usb/usb_ohci.h b/drivers/usb/usb_ohci.h index 7a04bf5e8..c1af547fa 100644 --- a/drivers/usb/usb_ohci.h +++ b/drivers/usb/usb_ohci.h @@ -155,8 +155,8 @@ struct ohci_hcca { /* * Maximum number of root hub ports. */ -#ifndef CFG_USB_OHCI_MAX_ROOT_PORTS -# error "CFG_USB_OHCI_MAX_ROOT_PORTS undefined!" +#ifndef CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS +# error "CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS undefined!" #endif /* @@ -191,7 +191,7 @@ struct ohci_regs { __u32 a; __u32 b; __u32 status; - __u32 portstatus[CFG_USB_OHCI_MAX_ROOT_PORTS]; + __u32 portstatus[CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS]; } roothub; } __attribute((aligned(32))); diff --git a/drivers/usb/usbdcore_mpc8xx.c b/drivers/usb/usbdcore_mpc8xx.c index 122793c02..fa02003d1 100644 --- a/drivers/usb/usbdcore_mpc8xx.c +++ b/drivers/usb/usbdcore_mpc8xx.c @@ -133,7 +133,7 @@ static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid); int udc_init (void) { /* Init various pointers */ - immr = (immap_t *) CFG_IMMR; + immr = (immap_t *) CONFIG_SYS_IMMR; cp = (cpm8xx_t *) & (immr->im_cpm); usb_paramp = (usb_pram_t *) & (cp->cp_dparam[PROFF_USB]); usbp = (usb_t *) & (cp->cp_scc[0]); @@ -752,7 +752,7 @@ static short mpc8xx_udc_handle_txerr () static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid) { if ((*rx_cbdp)->cbd_sc & RX_BD_W) { - *rx_cbdp = (volatile cbd_t *) (endpoints[epid]->rbase + CFG_IMMR); + *rx_cbdp = (volatile cbd_t *) (endpoints[epid]->rbase + CONFIG_SYS_IMMR); } else { (*rx_cbdp)++; @@ -780,7 +780,7 @@ static void mpc8xx_udc_flush_tx_fifo (int epid) usbp->uscom = 0x40 | 0; /* reset ring */ - tx_cbdp = (cbd_t *) (endpoints[epid]->tbptr + CFG_IMMR); + tx_cbdp = (cbd_t *) (endpoints[epid]->tbptr + CONFIG_SYS_IMMR); tx_cbdp->cbd_sc = (TX_BD_I | TX_BD_W); @@ -886,7 +886,7 @@ static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi) } ep = epi->endpoint_address & 0x03; - tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CFG_IMMR); + tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR); if (tx_cbdp->cbd_sc & TX_BD_R || usbp->usber & USB_E_TXB) { mpc8xx_udc_flush_tx_fifo (ep); @@ -903,7 +903,7 @@ static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi) return -1; } - tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CFG_IMMR); + tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR); while (tx_cbdp->cbd_sc & TX_BD_R) { }; tx_cbdp->cbd_sc = (tx_cbdp->cbd_sc & TX_BD_W); @@ -1187,10 +1187,10 @@ static void mpc8xx_udc_clock_init (volatile immap_t * immr, volatile cpm8xx_t * cp) { -#if defined(CFG_USB_EXTC_CLK) +#if defined(CONFIG_SYS_USB_EXTC_CLK) /* This has been tested with a 48MHz crystal on CLK6 */ - switch (CFG_USB_EXTC_CLK) { + switch (CONFIG_SYS_USB_EXTC_CLK) { case 1: immr->im_ioport.iop_papar |= 0x0100; immr->im_ioport.iop_padir &= ~0x0100; @@ -1216,7 +1216,7 @@ static void mpc8xx_udc_clock_init (volatile immap_t * immr, break; } -#elif defined(CFG_USB_BRGCLK) +#elif defined(CONFIG_SYS_USB_BRGCLK) /* This has been tested with brgclk == 50MHz */ int divisor = 0; @@ -1233,7 +1233,7 @@ static void mpc8xx_udc_clock_init (volatile immap_t * immr, divisor = (gd->cpu_clk / 48000000L) - 1; cp->cp_sicr &= ~0x0000003F; - switch (CFG_USB_BRGCLK) { + switch (CONFIG_SYS_USB_BRGCLK) { case 1: cp->cp_brgc1 |= (divisor | CPM_BRG_EN); cp->cp_sicr &= ~0x2F; @@ -1256,7 +1256,7 @@ static void mpc8xx_udc_clock_init (volatile immap_t * immr, } #else -#error "CFG_USB_EXTC_CLK or CFG_USB_BRGCLK must be defined" +#error "CONFIG_SYS_USB_EXTC_CLK or CONFIG_SYS_USB_BRGCLK must be defined" #endif } diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c index 650380b2c..9ebb0b0c9 100644 --- a/drivers/video/ati_radeon_fb.c +++ b/drivers/video/ati_radeon_fb.c @@ -653,7 +653,7 @@ void *video_hw_init(void) tmp = 0; - videomode = CFG_DEFAULT_VIDEO_MODE; + videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE; /* get video mode via environment */ if ((penv = getenv ("videomode")) != NULL) { /* deceide if it is a string */ @@ -672,7 +672,7 @@ void *video_hw_init(void) break; } if (i == VESA_MODES_COUNT) { - printf ("no VESA Mode found, switching to mode 0x%x ", CFG_DEFAULT_VIDEO_MODE); + printf ("no VESA Mode found, switching to mode 0x%x ", CONFIG_SYS_DEFAULT_VIDEO_MODE); i = 0; } res_mode = (struct ctfb_res_modes *) &res_mode_init[vesa_modes[i].resindex]; @@ -732,7 +732,7 @@ void *video_hw_init(void) break; } - pGD->isaBase = CFG_ISA_IO_BASE_ADDRESS; + pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS; pGD->pciBase = rinfo->fb_base_phys; pGD->frameAdrs = rinfo->fb_base_phys; pGD->memSize = 64 * 1024 * 1024; diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index fe418f11b..779aa4b53 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -61,7 +61,7 @@ CONFIG_CONSOLE_CURSOR - on/off drawing cursor is done with delay loop in VIDEO_TSTC_FCT (i8042) - CFG_CONSOLE_BLINK_COUNT - value for delay loop - blink rate + CONFIG_SYS_CONSOLE_BLINK_COUNT - value for delay loop - blink rate CONFIG_CONSOLE_TIME - display time/date in upper right corner, needs CONFIG_CMD_DATE and CONFIG_CONSOLE_CURSOR CONFIG_VIDEO_LOGO - display Linux Logo in upper left corner @@ -824,19 +824,19 @@ int video_display_bitmap (ulong bmp_image, int x, int y) /* * Could be a gzipped bmp image, try to decrompress... */ - len = CFG_VIDEO_LOGO_MAX_SIZE; - dst = malloc(CFG_VIDEO_LOGO_MAX_SIZE); + len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE; + dst = malloc(CONFIG_SYS_VIDEO_LOGO_MAX_SIZE); if (dst == NULL) { printf("Error: malloc in gunzip failed!\n"); return(1); } - if (gunzip(dst, CFG_VIDEO_LOGO_MAX_SIZE, (uchar *)bmp_image, &len) != 0) { + if (gunzip(dst, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE, (uchar *)bmp_image, &len) != 0) { printf ("Error: no valid bmp or bmp.gz image at %lx\n", bmp_image); free(dst); return 1; } - if (len == CFG_VIDEO_LOGO_MAX_SIZE) { - printf("Image could be truncated (increase CFG_VIDEO_LOGO_MAX_SIZE)!\n"); + if (len == CONFIG_SYS_VIDEO_LOGO_MAX_SIZE) { + printf("Image could be truncated (increase CONFIG_SYS_VIDEO_LOGO_MAX_SIZE)!\n"); } /* diff --git a/drivers/video/ct69000.c b/drivers/video/ct69000.c index cae662eaa..ae219ccf8 100644 --- a/drivers/video/ct69000.c +++ b/drivers/video/ct69000.c @@ -1107,7 +1107,7 @@ video_hw_init (void) pGD->gdfIndex = GDF_24BIT_888RGB; break; } - pGD->isaBase = CFG_ISA_IO_BASE_ADDRESS; + pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS; pGD->pciBase = pci_mem_base; pGD->frameAdrs = pci_mem_base; pGD->memSize = chips_param->max_mem; diff --git a/drivers/video/mb862xx.c b/drivers/video/mb862xx.c index d47cb0358..22a85d1a9 100644 --- a/drivers/video/mb862xx.c +++ b/drivers/video/mb862xx.c @@ -358,7 +358,7 @@ void *video_hw_init (void) #endif #if (defined(CONFIG_LWMON5) || \ - defined(CONFIG_SOCRATES)) && !(CONFIG_POST & CFG_POST_SYSMON) + defined(CONFIG_SOCRATES)) && !(CONFIG_POST & CONFIG_SYS_POST_SYSMON) /* Lamp on */ board_backlight_switch (1); #endif diff --git a/drivers/video/smiLynxEM.c b/drivers/video/smiLynxEM.c index 390dd5697..59b43efca 100644 --- a/drivers/video/smiLynxEM.c +++ b/drivers/video/smiLynxEM.c @@ -596,7 +596,7 @@ void *video_hw_init (void) tmp = 0; - videomode = CFG_DEFAULT_VIDEO_MODE; + videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE; /* get video mode via environment */ if ((penv = getenv ("videomode")) != NULL) { /* deceide if it is a string */ @@ -615,7 +615,7 @@ void *video_hw_init (void) break; } if (i == VESA_MODES_COUNT) { - printf ("no VESA Mode found, switching to mode 0x%x ", CFG_DEFAULT_VIDEO_MODE); + printf ("no VESA Mode found, switching to mode 0x%x ", CONFIG_SYS_DEFAULT_VIDEO_MODE); i = 0; } res_mode = @@ -669,7 +669,7 @@ void *video_hw_init (void) break; } - pGD->isaBase = CFG_ISA_IO; + pGD->isaBase = CONFIG_SYS_ISA_IO; pGD->pciBase = pci_mem_base; pGD->dprBase = (pci_mem_base + 0x400000 + 0x8000); pGD->vprBase = (pci_mem_base + 0x400000 + 0xc000); diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c index c81e5bc14..d27ce1d2c 100644 --- a/drivers/video/videomodes.c +++ b/drivers/video/videomodes.c @@ -23,7 +23,7 @@ /************************************************************************ Get Parameters for the video mode: - The default video mode can be defined in CFG_DEFAULT_VIDEO_MODE. + The default video mode can be defined in CONFIG_SYS_DEFAULT_VIDEO_MODE. If undefined, default video mode is set to 0x301 Parameters can be set via the variable "videomode" in the environment. 2 diferent ways are possible: diff --git a/drivers/video/videomodes.h b/drivers/video/videomodes.h index e2dffe7fe..0d7c33541 100644 --- a/drivers/video/videomodes.h +++ b/drivers/video/videomodes.h @@ -22,8 +22,8 @@ */ -#ifndef CFG_DEFAULT_VIDEO_MODE -#define CFG_DEFAULT_VIDEO_MODE 0x301 +#ifndef CONFIG_SYS_DEFAULT_VIDEO_MODE +#define CONFIG_SYS_DEFAULT_VIDEO_MODE 0x301 #endif /* Some mode definitions */ |