diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 2 | ||||
| -rw-r--r-- | drivers/mtd/nand/mxs_nand.c | 3 | ||||
| -rw-r--r-- | drivers/net/cpsw.c | 10 | ||||
| -rw-r--r-- | drivers/net/fec_mxc.c | 4 | ||||
| -rw-r--r-- | drivers/net/fec_mxc.h | 4 | ||||
| -rw-r--r-- | drivers/power/pmic/Makefile | 2 | ||||
| -rw-r--r-- | drivers/power/pmic/pmic_tps65217.c | 109 | ||||
| -rw-r--r-- | drivers/power/pmic/pmic_tps65910.c | 83 | ||||
| -rw-r--r-- | drivers/usb/musb/musb_hcd.c | 10 | 
9 files changed, 217 insertions, 10 deletions
| diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index f87e64788..a7170b49d 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -518,6 +518,8 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)  		return -1;  	mmc = malloc(sizeof(struct mmc)); +	if (!mmc) +		return -ENOMEM;  	sprintf(mmc->name, "FSL_SDHC");  	regs = (struct fsl_esdhc *)cfg->esdhc_base; diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 378f8c513..036c113ad 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -155,6 +155,9 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,  		if (page_oob_size == 218)  			return 16; + +		if (page_oob_size == 224) +			return 16;  	}  	return 0; diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index 9bab71a21..39240d966 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -568,9 +568,14 @@ static void cpsw_set_slave_mac(struct cpsw_slave *slave,  static void cpsw_slave_update_link(struct cpsw_slave *slave,  				   struct cpsw_priv *priv, int *link)  { -	struct phy_device *phy = priv->phydev; +	struct phy_device *phy;  	u32 mac_control = 0; +	phy = priv->phydev; + +	if (!phy) +		return; +  	phy_startup(phy);  	*link = phy->link; @@ -947,6 +952,9 @@ static int cpsw_phy_init(struct eth_device *dev, struct cpsw_slave *slave)  			dev,  			slave->data->phy_if); +	if (!phydev) +		return -1; +  	phydev->supported &= supported;  	phydev->advertising = phydev->supported; diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 690e5724b..107cd6ecc 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -453,7 +453,7 @@ static int fec_open(struct eth_device *edev)  	 */  	writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,  		&fec->eth->ecntrl); -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL)  	udelay(100);  	/*  	 * setup the MII gasket for RMII mode @@ -794,7 +794,7 @@ static int fec_recv(struct eth_device *dev)  	uint16_t bd_status;  	uint32_t addr, size, end;  	int i; -	uchar buff[FEC_MAX_PKT_SIZE] __aligned(ARCH_DMA_MINALIGN); +	ALLOC_CACHE_ALIGN_BUFFER(uchar, buff, FEC_MAX_PKT_SIZE);  	/*  	 * Check if any critical events have happened diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 4b4f8b798..0717cc6c3 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -135,7 +135,7 @@ struct ethernet_regs {  	uint32_t res14[7];		/* MBAR_ETH + 0x2E4-2FC */ -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL)  	uint16_t miigsk_cfgr;		/* MBAR_ETH + 0x300 */  	uint16_t res15[3];		/* MBAR_ETH + 0x302-306 */  	uint16_t miigsk_enr;		/* MBAR_ETH + 0x308 */ @@ -202,7 +202,7 @@ struct ethernet_regs {  #define FEC_X_DES_ACTIVE_TDAR		0x01000000  #define FEC_R_DES_ACTIVE_RDAR		0x01000000 -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL)  /* defines for MIIGSK */  /* RMII frequency control: 0=50MHz, 1=5MHz */  #define MIIGSK_CFGR_FRCONT		(1 << 6) diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index f05447055..11b3d030e 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -13,6 +13,8 @@ COBJS-$(CONFIG_POWER_MAX8998) += pmic_max8998.o  COBJS-$(CONFIG_POWER_MAX8997) += pmic_max8997.o  COBJS-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o  COBJS-$(CONFIG_POWER_MAX77686) += pmic_max77686.o +COBJS-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o +COBJS-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o  COBJS	:= $(COBJS-y)  SRCS	:= $(COBJS:.o=.c) diff --git a/drivers/power/pmic/pmic_tps65217.c b/drivers/power/pmic/pmic_tps65217.c new file mode 100644 index 000000000..36e9024bf --- /dev/null +++ b/drivers/power/pmic/pmic_tps65217.c @@ -0,0 +1,109 @@ +/* + * (C) Copyright 2011-2013 + * Texas Instruments, <www.ti.com> + * + * SPDX-License-Identifier:	GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <power/tps65217.h> + +/** + * tps65217_reg_read() - Generic function that can read a TPS65217 register + * @src_reg:		 Source register address + * @src_val:		 Address of destination variable + * @return:		 0 for success, not 0 on failure. + */ +int tps65217_reg_read(uchar src_reg, uchar *src_val) +{ +	return i2c_read(TPS65217_CHIP_PM, src_reg, 1, src_val, 1); +} + +/** + *  tps65217_reg_write() - Generic function that can write a TPS65217 PMIC + *			   register or bit field regardless of protection + *			   level. + * + *  @prot_level:	   Register password protection.  Use + *			   TPS65217_PROT_LEVEL_NONE, + *			   TPS65217_PROT_LEVEL_1 or TPS65217_PROT_LEVEL_2 + *  @dest_reg:		   Register address to write. + *  @dest_val:		   Value to write. + *  @mask:		   Bit mask (8 bits) to be applied.  Function will only + *			   change bits that are set in the bit mask. + * + *  @return:		   0 for success, not 0 on failure, as per the i2c API + */ +int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val, +		       uchar mask) +{ +	uchar read_val; +	uchar xor_reg; +	int ret; + +	/* +	 * If we are affecting only a bit field, read dest_reg and apply the +	 * mask +	 */ +	if (mask != TPS65217_MASK_ALL_BITS) { +		ret = i2c_read(TPS65217_CHIP_PM, dest_reg, 1, &read_val, 1); +		if (ret) +			return ret; +		read_val &= (~mask); +		read_val |= (dest_val & mask); +		dest_val = read_val; +	} + +	if (prot_level > 0) { +		xor_reg = dest_reg ^ TPS65217_PASSWORD_UNLOCK; +		ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1, +				&xor_reg, 1); +		if (ret) +			return ret; +	} + +	ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1); +	if (ret) +		return ret; + +	if (prot_level == TPS65217_PROT_LEVEL_2) { +		ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1, +				&xor_reg, 1); +		if (ret) +			return ret; + +		ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1); +		if (ret) +			return ret; +	} + +	return 0; +} + +/** + * tps65217_voltage_update() - Function to change a voltage level, as this + *			       is a multi-step process. + * @dc_cntrl_reg:	       DC voltage control register to change. + * @volt_sel:		       New value for the voltage register + * @return:		       0 for success, not 0 on failure. + */ +int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel) +{ +	if ((dc_cntrl_reg != TPS65217_DEFDCDC1) && +	    (dc_cntrl_reg != TPS65217_DEFDCDC2) && +	    (dc_cntrl_reg != TPS65217_DEFDCDC3)) +		return 1; + +	/* set voltage level */ +	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, dc_cntrl_reg, volt_sel, +			       TPS65217_MASK_ALL_BITS)) +		return 1; + +	/* set GO bit to initiate voltage transition */ +	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFSLEW, +			       TPS65217_DCDC_GO, TPS65217_DCDC_GO)) +		return 1; + +	return 0; +} diff --git a/drivers/power/pmic/pmic_tps65910.c b/drivers/power/pmic/pmic_tps65910.c new file mode 100644 index 000000000..7ee1160e0 --- /dev/null +++ b/drivers/power/pmic/pmic_tps65910.c @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2011-2013 + * Texas Instruments, <www.ti.com> + * + * SPDX-License-Identifier:	GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <power/tps65910.h> + +/* + * tps65910_set_i2c_control() - Set the TPS65910 to be controlled via the I2C + * 				interface. + * @return:		       0 on success, not 0 on failure + */ +int tps65910_set_i2c_control(void) +{ +	int ret; +	uchar buf; + +	/* VDD1/2 voltage selection register access by control i/f */ +	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1, +		       &buf, 1); + +	if (ret) +		return ret; + +	buf |= TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C; + +	return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1, +			 &buf, 1); +} + +/* + * tps65910_voltage_update() - Voltage switching for MPU frequency switching. + * @module:		       mpu - 0, core - 1 + * @vddx_op_vol_sel:	       vdd voltage to set + * @return:		       0 on success, not 0 on failure + */ +int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel) +{ +	uchar buf; +	unsigned int reg_offset; +	int ret; + +	if (module == MPU) +		reg_offset = TPS65910_VDD1_OP_REG; +	else +		reg_offset = TPS65910_VDD2_OP_REG; + +	/* Select VDDx OP   */ +	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1); +	if (ret) +		return ret; + +	buf &= ~TPS65910_OP_REG_CMD_MASK; + +	ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1); +	if (ret) +		return ret; + +	/* Configure VDDx OP  Voltage */ +	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1); +	if (ret) +		return ret; + +	buf &= ~TPS65910_OP_REG_SEL_MASK; +	buf |= vddx_op_vol_sel; + +	ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1); +	if (ret) +		return ret; + +	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1); +	if (ret) +		return ret; + +	if ((buf & TPS65910_OP_REG_SEL_MASK) != vddx_op_vol_sel) +		return 1; + +	return 0; +} diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 3dc5d6a55..41a8126b3 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -267,7 +267,7 @@ static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)  /*   * waits until tx ep is ready. Returns 1 when ep is ready and 0 on error.   */ -static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep) +static int wait_until_txep_ready(struct usb_device *dev, u8 ep)  {  	u16 csr;  	int timeout = CONFIG_MUSB_TIMEOUT; @@ -299,7 +299,7 @@ static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)  /*   * waits until rx ep is ready. Returns 1 when ep is ready and 0 on error.   */ -static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep) +static int wait_until_rxep_ready(struct usb_device *dev, u8 ep)  {  	u16 csr;  	int timeout = CONFIG_MUSB_TIMEOUT; @@ -1009,7 +1009,7 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,  			writew(csr | MUSB_TXCSR_TXPKTRDY, &musbr->txcsr);  			/* Wait until the TxPktRdy bit is cleared */ -			if (!wait_until_txep_ready(dev, MUSB_BULK_EP)) { +			if (wait_until_txep_ready(dev, MUSB_BULK_EP) != 1) {  				readw(&musbr->txcsr);  				usb_settoggle(dev, ep, dir_out,  				(csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1); @@ -1044,7 +1044,7 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,  			writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);  			/* Wait until the RxPktRdy bit is set */ -			if (!wait_until_rxep_ready(dev, MUSB_BULK_EP)) { +			if (wait_until_rxep_ready(dev, MUSB_BULK_EP) != 1) {  				csr = readw(&musbr->rxcsr);  				usb_settoggle(dev, ep, dir_out,  				(csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1); @@ -1217,7 +1217,7 @@ int submit_int_msg(struct usb_device *dev, unsigned long pipe,  			writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);  			/* Wait until the RxPktRdy bit is set */ -			if (!wait_until_rxep_ready(dev, MUSB_INTR_EP)) { +			if (wait_until_rxep_ready(dev, MUSB_INTR_EP) != 1) {  				csr = readw(&musbr->rxcsr);  				usb_settoggle(dev, ep, dir_out,  				(csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1); |