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Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci.c126
-rw-r--r--drivers/pci/pci_auto.c104
2 files changed, 134 insertions, 96 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 398542b9e..2a6d0a759 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -118,11 +118,11 @@ PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff)
void *pci_map_bar(pci_dev_t pdev, int bar, int flags)
{
pci_addr_t pci_bus_addr;
- u32 bar_response;
+ pci_addr_t bar_response;
/* read BAR address */
pci_read_config_dword(pdev, bar, &bar_response);
- pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
+ pci_bus_addr = bar_response & ~0xf;
/*
* Pass "0" as the length argument to pci_bus_to_virt. The arg
@@ -151,13 +151,14 @@ void pci_register_hose(struct pci_controller* hose)
*phose = hose;
}
-struct pci_controller *pci_bus_to_hose (int bus)
+struct pci_controller *pci_bus_to_hose(int bus)
{
struct pci_controller *hose;
- for (hose = hose_head; hose; hose = hose->next)
+ for (hose = hose_head; hose; hose = hose->next) {
if (bus >= hose->first_busno && bus <= hose->last_busno)
return hose;
+ }
printf("pci_bus_to_hose() failed\n");
return NULL;
@@ -196,21 +197,20 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
pci_dev_t bdf;
int i, bus, found_multi = 0;
- for (hose = hose_head; hose; hose = hose->next)
- {
+ for (hose = hose_head; hose; hose = hose->next) {
#ifdef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE
for (bus = hose->last_busno; bus >= hose->first_busno; bus--)
#else
for (bus = hose->first_busno; bus <= hose->last_busno; bus++)
#endif
- for (bdf = PCI_BDF(bus,0,0);
+ for (bdf = PCI_BDF(bus, 0, 0);
#if defined(CONFIG_ELPPC) || defined(CONFIG_PPMC7XX)
- bdf < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
+ bdf < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+ PCI_MAX_PCI_FUNCTIONS - 1);
#else
- bdf < PCI_BDF(bus+1,0,0);
+ bdf < PCI_BDF(bus + 1, 0, 0);
#endif
- bdf += PCI_BDF(0,0,1))
- {
+ bdf += PCI_BDF(0, 0, 1)) {
if (!PCI_FUNC(bdf)) {
pci_read_config_byte(bdf,
PCI_HEADER_TYPE,
@@ -229,19 +229,19 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
PCI_DEVICE_ID,
&device);
- for (i=0; ids[i].vendor != 0; i++)
+ for (i = 0; ids[i].vendor != 0; i++) {
if (vendor == ids[i].vendor &&
- device == ids[i].device)
- {
+ device == ids[i].device) {
if (index <= 0)
return bdf;
index--;
}
+ }
}
}
- return (-1);
+ return -1;
}
pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
@@ -258,7 +258,7 @@ pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
*
*/
-int __pci_hose_phys_to_bus (struct pci_controller *hose,
+int __pci_hose_phys_to_bus(struct pci_controller *hose,
phys_addr_t phys_addr,
unsigned long flags,
unsigned long skip_mask,
@@ -297,12 +297,14 @@ pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose,
int ret;
if (!hose) {
- puts ("pci_hose_phys_to_bus: invalid hose\n");
+ puts("pci_hose_phys_to_bus: invalid hose\n");
return bus_addr;
}
- /* if PCI_REGION_MEM is set we do a two pass search with preference
- * on matches that don't have PCI_REGION_SYS_MEMORY set */
+ /*
+ * if PCI_REGION_MEM is set we do a two pass search with preference
+ * on matches that don't have PCI_REGION_SYS_MEMORY set
+ */
if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
ret = __pci_hose_phys_to_bus(hose, phys_addr,
flags, PCI_REGION_SYS_MEMORY, &bus_addr);
@@ -313,12 +315,12 @@ pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose,
ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr);
if (ret)
- puts ("pci_hose_phys_to_bus: invalid physical address\n");
+ puts("pci_hose_phys_to_bus: invalid physical address\n");
return bus_addr;
}
-int __pci_hose_bus_to_phys (struct pci_controller *hose,
+int __pci_hose_bus_to_phys(struct pci_controller *hose,
pci_addr_t bus_addr,
unsigned long flags,
unsigned long skip_mask,
@@ -354,12 +356,14 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
int ret;
if (!hose) {
- puts ("pci_hose_bus_to_phys: invalid hose\n");
+ puts("pci_hose_bus_to_phys: invalid hose\n");
return phys_addr;
}
- /* if PCI_REGION_MEM is set we do a two pass search with preference
- * on matches that don't have PCI_REGION_SYS_MEMORY set */
+ /*
+ * if PCI_REGION_MEM is set we do a two pass search with preference
+ * on matches that don't have PCI_REGION_SYS_MEMORY set
+ */
if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
ret = __pci_hose_bus_to_phys(hose, bus_addr,
flags, PCI_REGION_SYS_MEMORY, &phys_addr);
@@ -370,7 +374,7 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
ret = __pci_hose_bus_to_phys(hose, bus_addr, flags, 0, &phys_addr);
if (ret)
- puts ("pci_hose_bus_to_phys: invalid physical address\n");
+ puts("pci_hose_bus_to_phys: invalid physical address\n");
return phys_addr;
}
@@ -385,20 +389,21 @@ int pci_hose_config_device(struct pci_controller *hose,
pci_addr_t mem,
unsigned long command)
{
- unsigned int bar_response, old_command;
+ pci_addr_t bar_response;
+ unsigned int old_command;
pci_addr_t bar_value;
pci_size_t bar_size;
unsigned char pin;
int bar, found_mem64;
- debug ("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n",
- io, (u64)mem, command);
+ debug("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n", io,
+ (u64)mem, command);
- pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
+ pci_hose_write_config_dword(hose, dev, PCI_COMMAND, 0);
for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) {
- pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
- pci_hose_read_config_dword (hose, dev, bar, &bar_response);
+ pci_hose_write_config_dword(hose, dev, bar, 0xffffffff);
+ pci_hose_read_config_dword(hose, dev, bar, &bar_response);
if (!bar_response)
continue;
@@ -418,8 +423,10 @@ int pci_hose_config_device(struct pci_controller *hose,
PCI_BASE_ADDRESS_MEM_TYPE_64) {
u32 bar_response_upper;
u64 bar64;
- pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff);
- pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper);
+ pci_hose_write_config_dword(hose, dev, bar + 4,
+ 0xffffffff);
+ pci_hose_read_config_dword(hose, dev, bar + 4,
+ &bar_response_upper);
bar64 = ((u64)bar_response_upper << 32) | bar_response;
@@ -442,27 +449,28 @@ int pci_hose_config_device(struct pci_controller *hose,
if (found_mem64) {
bar += 4;
#ifdef CONFIG_SYS_PCI_64BIT
- pci_hose_write_config_dword(hose, dev, bar, (u32)(bar_value>>32));
+ pci_hose_write_config_dword(hose, dev, bar,
+ (u32)(bar_value >> 32));
#else
- pci_hose_write_config_dword (hose, dev, bar, 0x00000000);
+ pci_hose_write_config_dword(hose, dev, bar, 0x00000000);
#endif
}
}
/* Configure Cache Line Size Register */
- pci_hose_write_config_byte (hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
/* Configure Latency Timer */
- pci_hose_write_config_byte (hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
/* Disable interrupt line, if device says it wants to use interrupts */
- pci_hose_read_config_byte (hose, dev, PCI_INTERRUPT_PIN, &pin);
+ pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
if (pin != 0) {
- pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE, 0xff);
+ pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 0xff);
}
- pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &old_command);
- pci_hose_write_config_dword (hose, dev, PCI_COMMAND,
+ pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &old_command);
+ pci_hose_write_config_dword(hose, dev, PCI_COMMAND,
(old_command & 0xffff0000) | command);
return 0;
@@ -500,7 +508,8 @@ void pci_cfgfunc_config_device(struct pci_controller *hose,
pci_dev_t dev,
struct pci_config_table *entry)
{
- pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1], entry->priv[2]);
+ pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1],
+ entry->priv[2]);
}
void pci_cfgfunc_do_nothing(struct pci_controller *hose,
@@ -509,10 +518,7 @@ void pci_cfgfunc_do_nothing(struct pci_controller *hose,
}
/*
- *
- */
-
-/* HJF: Changed this to return int. I think this is required
+ * HJF: Changed this to return int. I think this is required
* to get the correct result when scanning bridges
*/
extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
@@ -618,10 +624,12 @@ int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
int pci_hose_scan_bus(struct pci_controller *hose, int bus)
{
- unsigned int sub_bus, found_multi=0;
+ unsigned int sub_bus, found_multi = 0;
unsigned short vendor, device, class;
unsigned char header_type;
+#ifndef CONFIG_PCI_PNP
struct pci_config_table *cfg;
+#endif
pci_dev_t dev;
#ifdef CONFIG_PCI_SCAN_SHOW
static int indent = 0;
@@ -630,8 +638,9 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
sub_bus = bus;
for (dev = PCI_BDF(bus,0,0);
- dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
- dev += PCI_BDF(0,0,1)) {
+ dev < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+ PCI_MAX_PCI_FUNCTIONS - 1);
+ dev += PCI_BDF(0, 0, 1)) {
if (pci_skip_dev(hose, dev))
continue;
@@ -649,8 +658,8 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
if (!PCI_FUNC(dev))
found_multi = header_type & 0x80;
- debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n",
- PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) );
+ debug("PCI Scan: Found Bus %d, Device %d, Function %d\n",
+ PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device);
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
@@ -668,18 +677,16 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
}
#endif
+#ifdef CONFIG_PCI_PNP
+ sub_bus = max(pciauto_config_device(hose, dev), sub_bus);
+#else
cfg = pci_find_config(hose, class, vendor, device,
PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
if (cfg) {
cfg->config_device(hose, dev, cfg);
sub_bus = max(sub_bus, hose->current_busno);
-#ifdef CONFIG_PCI_PNP
- } else {
- int n = pciauto_config_device(hose, dev);
-
- sub_bus = max(sub_bus, n);
-#endif
}
+#endif
#ifdef CONFIG_PCI_SCAN_SHOW
indent--;
@@ -711,10 +718,11 @@ int pci_hose_scan(struct pci_controller *hose)
}
#endif /* CONFIG_PCI_BOOTDELAY */
- /* Start scan at current_busno.
+ /*
+ * Start scan at current_busno.
* PCIe will start scan at first_busno+1.
*/
- /* For legacy support, ensure current>=first */
+ /* For legacy support, ensure current >= first */
if (hose->first_busno > hose->current_busno)
hose->current_busno = hose->first_busno;
#ifdef CONFIG_PCI_PNP
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 87ee2c240..ae61e2490 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -35,7 +35,7 @@
*
*/
-void pciauto_region_init(struct pci_region* res)
+void pciauto_region_init(struct pci_region *res)
{
/*
* Avoid allocating PCI resources from address 0 -- this is illegal
@@ -50,7 +50,8 @@ void pciauto_region_align(struct pci_region *res, pci_size_t size)
res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1;
}
-int pciauto_region_allocate(struct pci_region* res, pci_size_t size, pci_addr_t *bar)
+int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
+ pci_addr_t *bar)
{
pci_addr_t addr;
@@ -88,58 +89,77 @@ void pciauto_setup_device(struct pci_controller *hose,
struct pci_region *prefetch,
struct pci_region *io)
{
- unsigned int bar_response;
- pci_addr_t bar_value;
+ pci_addr_t bar_response;
pci_size_t bar_size;
- unsigned int cmdstat = 0;
- struct pci_region *bar_res;
+ u16 cmdstat = 0;
int bar, bar_nr = 0;
+#ifndef CONFIG_PCI_ENUM_ONLY
+ pci_addr_t bar_value;
+ struct pci_region *bar_res;
int found_mem64 = 0;
+#endif
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER;
- for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) {
+ for (bar = PCI_BASE_ADDRESS_0;
+ bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) {
/* Tickle the BAR and get the response */
+#ifndef CONFIG_PCI_ENUM_ONLY
pci_hose_write_config_dword(hose, dev, bar, 0xffffffff);
+#endif
pci_hose_read_config_dword(hose, dev, bar, &bar_response);
/* If BAR is not implemented go to the next BAR */
if (!bar_response)
continue;
+#ifndef CONFIG_PCI_ENUM_ONLY
found_mem64 = 0;
+#endif
/* Check the BAR type and set our address mask */
if (bar_response & PCI_BASE_ADDRESS_SPACE) {
bar_size = ((~(bar_response & PCI_BASE_ADDRESS_IO_MASK))
& 0xffff) + 1;
+#ifndef CONFIG_PCI_ENUM_ONLY
bar_res = io;
+#endif
DEBUGF("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", bar_nr, (u64)bar_size);
} else {
- if ( (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
+ if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
PCI_BASE_ADDRESS_MEM_TYPE_64) {
u32 bar_response_upper;
u64 bar64;
- pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff);
- pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper);
+
+#ifndef CONFIG_PCI_ENUM_ONLY
+ pci_hose_write_config_dword(hose, dev, bar + 4,
+ 0xffffffff);
+#endif
+ pci_hose_read_config_dword(hose, dev, bar + 4,
+ &bar_response_upper);
bar64 = ((u64)bar_response_upper << 32) | bar_response;
bar_size = ~(bar64 & PCI_BASE_ADDRESS_MEM_MASK) + 1;
+#ifndef CONFIG_PCI_ENUM_ONLY
found_mem64 = 1;
+#endif
} else {
bar_size = (u32)(~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1);
}
+#ifndef CONFIG_PCI_ENUM_ONLY
if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH))
bar_res = prefetch;
else
bar_res = mem;
+#endif
DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%llx, ", bar_nr, (u64)bar_size);
}
+#ifndef CONFIG_PCI_ENUM_ONLY
if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) {
/* Write it out and update our limit */
pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value);
@@ -158,16 +178,17 @@ void pciauto_setup_device(struct pci_controller *hose,
#endif
}
- cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ?
- PCI_COMMAND_IO : PCI_COMMAND_MEMORY;
}
+#endif
+ cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ?
+ PCI_COMMAND_IO : PCI_COMMAND_MEMORY;
DEBUGF("\n");
bar_nr++;
}
- pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);
pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
CONFIG_SYS_PCI_CACHE_LINE_SIZE);
pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
@@ -179,9 +200,9 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
struct pci_region *pci_mem = hose->pci_mem;
struct pci_region *pci_prefetch = hose->pci_prefetch;
struct pci_region *pci_io = hose->pci_io;
- unsigned int cmdstat;
+ u16 cmdstat;
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
/* Configure bus number registers */
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
@@ -229,7 +250,8 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
}
/* Enable memory and I/O accesses, enable bus master */
- pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER);
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND,
+ cmdstat | PCI_COMMAND_MASTER);
}
void pciauto_postscan_setup_bridge(struct pci_controller *hose,
@@ -248,7 +270,7 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
pciauto_region_align(pci_mem, 0x100000);
pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT,
- (pci_mem->bus_lower-1) >> 16);
+ (pci_mem->bus_lower - 1) >> 16);
}
if (pci_prefetch) {
@@ -256,7 +278,7 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
pciauto_region_align(pci_prefetch, 0x100000);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
- (pci_prefetch->bus_lower-1) >> 16);
+ (pci_prefetch->bus_lower - 1) >> 16);
}
if (pci_io) {
@@ -264,9 +286,9 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
pciauto_region_align(pci_io, 0x1000);
pci_hose_write_config_byte(hose, dev, PCI_IO_LIMIT,
- ((pci_io->bus_lower-1) & 0x0000f000) >> 8);
+ ((pci_io->bus_lower - 1) & 0x0000f000) >> 8);
pci_hose_write_config_word(hose, dev, PCI_IO_LIMIT_UPPER16,
- ((pci_io->bus_lower-1) & 0xffff0000) >> 16);
+ ((pci_io->bus_lower - 1) & 0xffff0000) >> 16);
}
}
@@ -280,7 +302,7 @@ void pciauto_config_init(struct pci_controller *hose)
hose->pci_io = hose->pci_mem = NULL;
- for (i=0; i<hose->region_count; i++) {
+ for (i = 0; i < hose->region_count; i++) {
switch(hose->regions[i].flags) {
case PCI_REGION_IO:
if (!hose->pci_io ||
@@ -338,7 +360,8 @@ void pciauto_config_init(struct pci_controller *hose)
}
}
-/* HJF: Changed this to return int. I think this is required
+/*
+ * HJF: Changed this to return int. I think this is required
* to get the correct result when scanning bridges
*/
int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
@@ -350,16 +373,11 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
- switch(class) {
- case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */
- DEBUGF("PCI AutoConfig: Found PowerPC device\n");
- pciauto_setup_device(hose, dev, 6, hose->pci_mem,
- hose->pci_prefetch, hose->pci_io);
- break;
-
+ switch (class) {
case PCI_CLASS_BRIDGE_PCI:
hose->current_busno++;
- pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
+ pciauto_setup_device(hose, dev, 2, hose->pci_mem,
+ hose->pci_prefetch, hose->pci_io);
DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev));
@@ -385,14 +403,20 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
return sub_bus;
}
- pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
+ pciauto_setup_device(hose, dev, 6, hose->pci_mem,
+ hose->pci_prefetch, hose->pci_io);
break;
case PCI_CLASS_BRIDGE_CARDBUS:
- /* just do a minimal setup of the bridge, let the OS take care of the rest */
- pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
+ /*
+ * just do a minimal setup of the bridge,
+ * let the OS take care of the rest
+ */
+ pciauto_setup_device(hose, dev, 0, hose->pci_mem,
+ hose->pci_prefetch, hose->pci_io);
- DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n", PCI_DEV(dev));
+ DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
+ PCI_DEV(dev));
hose->current_busno++;
break;
@@ -412,11 +436,17 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
* the PIMMR window to be allocated (BAR0 - 1MB size)
*/
DEBUGF("PCI Autoconfig: Broken bridge found, only minimal config\n");
- pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
+ pciauto_setup_device(hose, dev, 0, hose->pci_mem,
+ hose->pci_prefetch, hose->pci_io);
break;
#endif
+
+ case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */
+ DEBUGF("PCI AutoConfig: Found PowerPC device\n");
+
default:
- pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
+ pciauto_setup_device(hose, dev, 6, hose->pci_mem,
+ hose->pci_prefetch, hose->pci_io);
break;
}
generated by cgit v1.2.3-70-g09d2 (git 2.51.2) at 2025-11-04 04:54:02 +0000