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-rw-r--r--drivers/fpga/ACEX1K.c14
-rw-r--r--drivers/fpga/altera.c4
-rw-r--r--drivers/fpga/cyclon2.c6
-rw-r--r--drivers/fpga/lattice.c4
-rw-r--r--drivers/fpga/spartan2.c58
-rw-r--r--drivers/fpga/spartan3.c60
-rw-r--r--drivers/fpga/virtex2.c34
-rw-r--r--drivers/fpga/xilinx.c4
8 files changed, 92 insertions, 92 deletions
diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c
index 4703fc171..0ae78f92b 100644
--- a/drivers/fpga/ACEX1K.c
+++ b/drivers/fpga/ACEX1K.c
@@ -140,7 +140,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
}
/* Establish the initial state */
- (*fn->config) (TRUE, TRUE, cookie); /* Assert nCONFIG */
+ (*fn->config) (true, true, cookie); /* Assert nCONFIG */
udelay(2); /* T_cfg > 2us */
@@ -152,7 +152,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
return FPGA_FAIL;
}
- (*fn->config) (FALSE, TRUE, cookie); /* Deassert nCONFIG */
+ (*fn->config) (false, true, cookie); /* Deassert nCONFIG */
udelay(2); /* T_cf2st1 < 4us */
/* Wait for nSTATUS to be released (i.e. deasserted) */
@@ -192,13 +192,13 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
i = 8;
do {
/* Deassert the clock */
- (*fn->clk) (FALSE, TRUE, cookie);
+ (*fn->clk) (false, true, cookie);
CONFIG_FPGA_DELAY ();
/* Write data */
- (*fn->data) ( (val & 0x01), TRUE, cookie);
+ (*fn->data) ((val & 0x01), true, cookie);
CONFIG_FPGA_DELAY ();
/* Assert the clock */
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->clk) (true, true, cookie);
CONFIG_FPGA_DELAY ();
val >>= 1;
i --;
@@ -232,9 +232,9 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
for (i = 0; i < 12; i++) {
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
}
ret_val = FPGA_SUCCESS;
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index f087d0182..8388da508 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -215,7 +215,7 @@ int altera_info( Altera_desc *desc )
static int altera_validate (Altera_desc * desc, const char *fn)
{
- int ret_val = FALSE;
+ int ret_val = false;
if (desc) {
if ((desc->family > min_altera_type) &&
@@ -223,7 +223,7 @@ static int altera_validate (Altera_desc * desc, const char *fn)
if ((desc->iface > min_altera_iface_type) &&
(desc->iface < max_altera_iface_type)) {
if (desc->size) {
- ret_val = TRUE;
+ ret_val = true;
} else {
printf ("%s: NULL part size\n", fn);
}
diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c
index 0773e731e..6b734c2b3 100644
--- a/drivers/fpga/cyclon2.c
+++ b/drivers/fpga/cyclon2.c
@@ -144,9 +144,9 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
}
/* Establish the initial state */
- (*fn->config) (FALSE, TRUE, cookie); /* De-assert nCONFIG */
+ (*fn->config) (false, true, cookie); /* De-assert nCONFIG */
udelay(100);
- (*fn->config) (TRUE, TRUE, cookie); /* Assert nCONFIG */
+ (*fn->config) (true, true, cookie); /* Assert nCONFIG */
udelay(2); /* T_cfg > 2us */
@@ -164,7 +164,7 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
/* Get ready for the burn */
CONFIG_FPGA_DELAY ();
- ret = (*fn->write) (buf, bsize, TRUE, cookie);
+ ret = (*fn->write) (buf, bsize, true, cookie);
if (ret) {
puts ("** Write failed.\n");
(*fn->abort) (cookie);
diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c
index d8b642a6b..8c3465a7f 100644
--- a/drivers/fpga/lattice.c
+++ b/drivers/fpga/lattice.c
@@ -275,7 +275,7 @@ signed char ispVM(void)
static int lattice_validate(Lattice_desc *desc, const char *fn)
{
- int ret_val = FALSE;
+ int ret_val = false;
if (desc) {
if ((desc->family > min_lattice_type) &&
@@ -283,7 +283,7 @@ static int lattice_validate(Lattice_desc *desc, const char *fn)
if ((desc->iface > min_lattice_iface_type) &&
(desc->iface < max_lattice_iface_type)) {
if (desc->size) {
- ret_val = TRUE;
+ ret_val = true;
} else {
printf("%s: NULL part size\n", fn);
}
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 4bc707004..0bc400d70 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -162,11 +162,11 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
/* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+ (*fn->pgm) (true, true, cookie); /* Assert the program, commit */
/* Get ready for the burn */
CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+ (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */
ts = get_timer (0); /* get current time */
/* Now wait for INIT and BUSY to go high */
@@ -179,20 +179,20 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
} while ((*fn->init) (cookie) && (*fn->busy) (cookie));
- (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->wr) (true, true, cookie); /* Assert write, commit */
+ (*fn->cs) (true, true, cookie); /* Assert chip select, commit */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
/* Load the data */
while (bytecount < bsize) {
/* XXX - do we check for an Ctrl-C press in here ??? */
/* XXX - Check the error bit? */
- (*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
+ (*fn->wdata) (data[bytecount++], true, cookie); /* write the data */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
ts = get_timer (0); /* get current time */
@@ -201,9 +201,9 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
* make sure we aren't busy forever... */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
puts ("** Timeout waiting for BUSY to clear.\n");
@@ -220,8 +220,8 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
CONFIG_FPGA_DELAY ();
- (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
- (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
+ (*fn->cs) (false, true, cookie); /* Deassert the chip select */
+ (*fn->wr) (false, true, cookie); /* Deassert the write pin */
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
putc ('\n'); /* terminate the dotted line */
@@ -233,9 +233,9 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
while ((*fn->done) (cookie) == FPGA_FAIL) {
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
puts ("** Timeout waiting for DONE to clear.\n");
@@ -277,15 +277,15 @@ static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
printf ("Starting Dump of FPGA Device %d...\n", cookie);
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->cs) (true, true, cookie); /* Assert chip select, commit */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
/* dump the data */
while (bytecount < bsize) {
/* XXX - do we check for an Ctrl-C press in here ??? */
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
(*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
if (bytecount % (bsize / 40) == 0)
@@ -293,9 +293,9 @@ static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
#endif
}
- (*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->cs) (false, false, cookie); /* Deassert the chip select */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
putc ('\n'); /* terminate the dotted line */
@@ -351,7 +351,7 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
/* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+ (*fn->pgm) (true, true, cookie); /* Assert the program, commit */
/* Wait for INIT state (init low) */
ts = get_timer (0); /* get current time */
@@ -365,7 +365,7 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/* Get ready for the burn */
CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+ (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */
ts = get_timer (0); /* get current time */
/* Now wait for INIT to go high */
@@ -390,13 +390,13 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
i = 8;
do {
/* Deassert the clock */
- (*fn->clk) (FALSE, TRUE, cookie);
+ (*fn->clk) (false, true, cookie);
CONFIG_FPGA_DELAY ();
/* Write data */
- (*fn->wr) ((val & 0x80), TRUE, cookie);
+ (*fn->wr) ((val & 0x80), true, cookie);
CONFIG_FPGA_DELAY ();
/* Assert the clock */
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->clk) (true, true, cookie);
CONFIG_FPGA_DELAY ();
val <<= 1;
i --;
@@ -417,14 +417,14 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/* now check for done signal */
ts = get_timer (0); /* get current time */
ret_val = FPGA_SUCCESS;
- (*fn->wr) (TRUE, TRUE, cookie);
+ (*fn->wr) (true, true, cookie);
while (! (*fn->done) (cookie)) {
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
putc ('*');
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 1633a7069..c63c60529 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -166,11 +166,11 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
/* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+ (*fn->pgm) (true, true, cookie); /* Assert the program, commit */
/* Get ready for the burn */
CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+ (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */
ts = get_timer (0); /* get current time */
/* Now wait for INIT and BUSY to go high */
@@ -183,20 +183,20 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
} while ((*fn->init) (cookie) && (*fn->busy) (cookie));
- (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->wr) (true, true, cookie); /* Assert write, commit */
+ (*fn->cs) (true, true, cookie); /* Assert chip select, commit */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
/* Load the data */
while (bytecount < bsize) {
/* XXX - do we check for an Ctrl-C press in here ??? */
/* XXX - Check the error bit? */
- (*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
+ (*fn->wdata) (data[bytecount++], true, cookie); /* write the data */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
ts = get_timer (0); /* get current time */
@@ -205,9 +205,9 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
* make sure we aren't busy forever... */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
puts ("** Timeout waiting for BUSY to clear.\n");
@@ -224,8 +224,8 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
CONFIG_FPGA_DELAY ();
- (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
- (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
+ (*fn->cs) (false, true, cookie); /* Deassert the chip select */
+ (*fn->wr) (false, true, cookie); /* Deassert the write pin */
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
putc ('\n'); /* terminate the dotted line */
@@ -239,9 +239,9 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
* make sure we aren't busy forever... */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
puts ("** Timeout waiting for DONE to clear.\n");
@@ -283,15 +283,15 @@ static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
printf ("Starting Dump of FPGA Device %d...\n", cookie);
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->cs) (true, true, cookie); /* Assert chip select, commit */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
/* dump the data */
while (bytecount < bsize) {
/* XXX - do we check for an Ctrl-C press in here ??? */
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
(*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
if (bytecount % (bsize / 40) == 0)
@@ -299,9 +299,9 @@ static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
#endif
}
- (*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->cs) (false, false, cookie); /* Deassert the chip select */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
putc ('\n'); /* terminate the dotted line */
@@ -357,7 +357,7 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
/* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+ (*fn->pgm) (true, true, cookie); /* Assert the program, commit */
/* Wait for INIT state (init low) */
ts = get_timer (0); /* get current time */
@@ -373,7 +373,7 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/* Get ready for the burn */
CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+ (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */
ts = get_timer (0); /* get current time */
/* Now wait for INIT to go high */
@@ -389,7 +389,7 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/* Load the data */
if(*fn->bwr)
- (*fn->bwr) (data, bsize, TRUE, cookie);
+ (*fn->bwr) (data, bsize, true, cookie);
else {
while (bytecount < bsize) {
@@ -405,13 +405,13 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
i = 8;
do {
/* Deassert the clock */
- (*fn->clk) (FALSE, TRUE, cookie);
+ (*fn->clk) (false, true, cookie);
CONFIG_FPGA_DELAY ();
/* Write data */
- (*fn->wr) ((val & 0x80), TRUE, cookie);
+ (*fn->wr) ((val & 0x80), true, cookie);
CONFIG_FPGA_DELAY ();
/* Assert the clock */
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->clk) (true, true, cookie);
CONFIG_FPGA_DELAY ();
val <<= 1;
i --;
@@ -433,16 +433,16 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/* now check for done signal */
ts = get_timer (0); /* get current time */
ret_val = FPGA_SUCCESS;
- (*fn->wr) (TRUE, TRUE, cookie);
+ (*fn->wr) (true, true, cookie);
while (! (*fn->done) (cookie)) {
/* XXX - we should have a check in here somewhere to
* make sure we aren't busy forever... */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (false, true, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->clk) (true, true, cookie); /* Assert the clock pin */
putc ('*');
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index b26d23151..3974e47d9 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -221,7 +221,7 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
* There is no maximum value for the pulse width. Check to make
* sure that INIT_B goes low after assertion of PROG_B
*/
- (*fn->pgm) (TRUE, TRUE, cookie);
+ (*fn->pgm) (true, true, cookie);
udelay (10);
ts = get_timer (0);
do {
@@ -234,9 +234,9 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
} while (!(*fn->init) (cookie));
- (*fn->pgm) (FALSE, TRUE, cookie);
+ (*fn->pgm) (false, true, cookie);
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->clk) (true, true, cookie);
/*
* Start a timer and wait for INIT_B to go high
@@ -253,8 +253,8 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
} while ((*fn->init) (cookie) && (*fn->busy) (cookie));
- (*fn->wr) (TRUE, TRUE, cookie);
- (*fn->cs) (TRUE, TRUE, cookie);
+ (*fn->wr) (true, true, cookie);
+ (*fn->cs) (true, true, cookie);
udelay (10000);
@@ -286,15 +286,15 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
}
#endif
- (*fn->wdata) (data[bytecount++], TRUE, cookie);
+ (*fn->wdata) (data[bytecount++], true, cookie);
CONFIG_FPGA_DELAY ();
/*
* Cycle the clock pin
*/
- (*fn->clk) (FALSE, TRUE, cookie);
+ (*fn->clk) (false, true, cookie);
CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->clk) (true, true, cookie);
#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
ts = get_timer (0);
@@ -319,8 +319,8 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
* Finished writing the data; deassert FPGA CS_B and WRITE_B signals.
*/
CONFIG_FPGA_DELAY ();
- (*fn->cs) (FALSE, TRUE, cookie);
- (*fn->wr) (FALSE, TRUE, cookie);
+ (*fn->cs) (false, true, cookie);
+ (*fn->wr) (false, true, cookie);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
putc ('\n');
@@ -381,8 +381,8 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
printf ("Starting Dump of FPGA Device %d...\n", cookie);
- (*fn->cs) (TRUE, TRUE, cookie);
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->cs) (true, true, cookie);
+ (*fn->clk) (true, true, cookie);
while (bytecount < bsize) {
#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
@@ -394,8 +394,8 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/*
* Cycle the clock and read the data
*/
- (*fn->clk) (FALSE, TRUE, cookie);
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->clk) (false, true, cookie);
+ (*fn->clk) (true, true, cookie);
(*fn->rdata) (&(data[bytecount++]), cookie);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
if (bytecount % (bsize / 40) == 0)
@@ -406,9 +406,9 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/*
* Deassert CS_B and cycle the clock to deselect the device.
*/
- (*fn->cs) (FALSE, FALSE, cookie);
- (*fn->clk) (FALSE, TRUE, cookie);
- (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->cs) (false, false, cookie);
+ (*fn->clk) (false, true, cookie);
+ (*fn->clk) (true, true, cookie);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
putc ('\n');
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 4072cb414..32787b236 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -242,7 +242,7 @@ int xilinx_info (Xilinx_desc * desc)
static int xilinx_validate (Xilinx_desc * desc, char *fn)
{
- int ret_val = FALSE;
+ int ret_val = false;
if (desc) {
if ((desc->family > min_xilinx_type) &&
@@ -250,7 +250,7 @@ static int xilinx_validate (Xilinx_desc * desc, char *fn)
if ((desc->iface > min_xilinx_iface_type) &&
(desc->iface < max_xilinx_iface_type)) {
if (desc->size) {
- ret_val = TRUE;
+ ret_val = true;
} else
printf ("%s: NULL part size\n", fn);
} else
generated by cgit v1.2.3-70-g09d2 (git 2.51.2) at 2025-10-31 10:58:09 +0000