diff options
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.JFFS2_NAND | 2 | ||||
| -rw-r--r-- | doc/README.hwconfig | 2 | ||||
| -rw-r--r-- | doc/README.ubi | 3 | ||||
| -rw-r--r-- | doc/SPI/README.ti_qspi_dra_test | 48 | ||||
| -rw-r--r-- | doc/SPI/README.ti_qspi_flash | 47 | ||||
| -rw-r--r-- | doc/SPI/status.txt | 31 | ||||
| -rw-r--r-- | doc/git-mailrc | 2 | ||||
| -rw-r--r-- | doc/uImage.FIT/command_syntax_extensions.txt | 2 | ||||
| -rw-r--r-- | doc/uImage.FIT/source_file_format.txt | 2 | 
9 files changed, 135 insertions, 4 deletions
| diff --git a/doc/README.JFFS2_NAND b/doc/README.JFFS2_NAND index 5018ae834..09788d534 100644 --- a/doc/README.JFFS2_NAND +++ b/doc/README.JFFS2_NAND @@ -1,6 +1,6 @@  JFFS2 NAND support: -To ebable, use the following #define in the board configuration file: +To enable, use the following #define in the board configuration file:  #define CONFIG_JFFS2_NAND 1 diff --git a/doc/README.hwconfig b/doc/README.hwconfig index cf549651c..b6ddb438c 100644 --- a/doc/README.hwconfig +++ b/doc/README.hwconfig @@ -18,7 +18,7 @@ Current implementation details/limitations:     U-Boot. But I haven't bothered yet.  2. Since we don't implement a hwconfig command, i.e. we're working -   with the environement directly, there is no way to tell that +   with the environment directly, there is no way to tell that     toggling a particular option will need a reboot to take     effect. So, for now it's advised to always reboot the     target after modifying the hwconfig variable. diff --git a/doc/README.ubi b/doc/README.ubi index 3cf4ef232..d82c75c84 100644 --- a/doc/README.ubi +++ b/doc/README.ubi @@ -14,6 +14,8 @@ ubi part [part] [offset]  ubi info [l[ayout]] - Display volume and ubi layout information  ubi create[vol] volume [size] [type] - create volume name with size  ubi write[vol] address volume size - Write volume from address with size +ubi write.part address volume size [fullsize] + - Write part of a volume from address  ubi read[vol] address volume [size] - Read volume to address with size  ubi remove[vol] volume - Remove volume  [Legends] @@ -77,6 +79,7 @@ ubi createvol	Create UBI volume on UBI device  ubi removevol	Remove UBI volume from UBI device  ubi read	Read data from UBI volume to memory  ubi write	Write data from memory to UBI volume +ubi write.part	Write data from memory to UBI volume, in parts  Here a few examples on the usage: diff --git a/doc/SPI/README.ti_qspi_dra_test b/doc/SPI/README.ti_qspi_dra_test new file mode 100644 index 000000000..fe3785723 --- /dev/null +++ b/doc/SPI/README.ti_qspi_dra_test @@ -0,0 +1,48 @@ +------------------------------------------------- +   Simple steps used to test the QSPI at U-Boot +------------------------------------------------- + +For #1, build the patched U-Boot and load MLO/u-boot.img + +---------------------------------- +Boot from another medium like MMC +---------------------------------- + +U-Boot# mmc dev 0 +mmc0 is current device +U-Boot# fatload mmc 0 0x82000000 MLO +reading MLO +55872 bytes read in 8 ms (6.7 MiB/s) +U-Boot# fatload mmc 0 0x83000000 u-boot.img +reading u-boot.img +248600 bytes read in 19 ms (12.5 MiB/s) + +-------------------------------------------------- +Commands to erase/write u-boot/mlo to flash device +-------------------------------------------------- +U-Boot# sf probe 0 +SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB, mapped at 5c000000 +SF: Warning - Only lower 16MiB accessible, Full access #define CONFIG_SPI_FLASH_BAR +U-Boot# sf erase 0 0x10000 +SF: 65536 bytes @ 0x0 Erased: OK +U-Boot# sf erase 0x20000 0x10000 +SF: 65536 bytes @ 0x20000 Erased: OK +U-Boot# sf erase 0x30000 0x10000 +SF: 65536 bytes @ 0x30000 Erased: OK +U-Boot# sf erase 0x40000 0x10000 +SF: 65536 bytes @ 0x40000 Erased: OK +U-Boot# sf erase 0x50000 0x10000 +SF: 65536 bytes @ 0x50000 Erased: OK +U-Boot# sf erase 0x60000 0x10000 +SF: 65536 bytes @ 0x60000 Erased: OK +U-Boot# sf write 82000000 0 0x10000 +SF: 65536 bytes @ 0x0 Written: OK +U-Boot# sf write 83000000 0x20000 0x60000 +SF: 393216 bytes @ 0x20000 Written: OK + +For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power +on. ROM should find the GP header at offset 0 and load/execute SPL. SPL +then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to +find a U-Boot image header at offset 0x20000 (set in the config file) +and proceeds to load that image using the U-Boot image payload offset/size +from the header. It will then start U-Boot. diff --git a/doc/SPI/README.ti_qspi_flash b/doc/SPI/README.ti_qspi_flash new file mode 100644 index 000000000..1b86d01a0 --- /dev/null +++ b/doc/SPI/README.ti_qspi_flash @@ -0,0 +1,47 @@ +QSPI U-boot support +------------------ + +Host processor is connected to serial flash device via qpsi +interface. QSPI is a kind of spi module that allows single, +dual and quad read access to external spi devices. The module +has a memory mapped interface which provide direct interface +for accessing data form external spi devices. + +The one QSPI in the device is primarily intended for fast booting +from Quad SPI flash devices. + +Usecase +------- + +MLO/u-boot.img will be flashed from SD/MMC to the flash device +using serial flash erase and write commands. Then, switch settings +will be changed to qspi boot. Then, the ROM code will read MLO +from the predefined location in the flash, where it was flashed and +execute it after storing it in SDRAM. Then, the MLO will read +u-boot.img from flash and execute it from SDRAM. + +SPI mode +------- +SPI mode uses mtd spi framework for transfer and reception of data. +Can be used in: +1. Normal mode: use single pin for transfers +2. Dual Mode: use two pins for transfers. +3. Quad mode: use four pin for transfer + +Memory mapped read mode +----------------------- +In this, SPI controller is configured using configuration port and then +controler is switched to memory mapped port for data read. + +Driver +------ +drivers/qspi/ti_qspi.c +    - Newly created file which is responsible for configuring the +	qspi controller and also for providing the low level api which +	is responsible for transferring the datas from host controller +	to flash device and vice versa. + +Testing +------- +A seperated file named README.dra_qspi_test has been created which gives all the +details about the commands required to test qspi at u-boot level. diff --git a/doc/SPI/status.txt b/doc/SPI/status.txt new file mode 100644 index 000000000..62c3c8541 --- /dev/null +++ b/doc/SPI/status.txt @@ -0,0 +1,31 @@ +Status on SPI subsystem: +======================= + +SPI COMMAND (common/cmd_sf, cmd_spi): +- + +SPI FLASH (drivers/mtd/spi): +- sf_probe.c: SPI flash probing code. +- sf_ops.c: SPI flash operations code. +- sf.c: SPI flash interface, which interacts controller driver. +- Bank Address Register (Accessing flashes > 16Mbytes in 3-byte addressing) +- Added memory_mapped support for read operations. +- Common probe support for all supported flash vendors except, ramtron. + +SPI DRIVERS (drivers/spi): +- + +TODO: +- Runtime detection of spi_flash params, SFDP(if possible) +- Add support for multibus build/accessing. +- Extended read commands support(dual read, dual IO read) +- Quad Page Program support. +- Quad Read support(quad fast read, quad IO read) +- Dual flash connection topology support(accessing two spi flash memories with single cs) +- Banking support on dual flash connection topology. +- Need proper cleanups on spi_flash and drivers. + +-- +Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> +18-09-2013. +07-10-2013. diff --git a/doc/git-mailrc b/doc/git-mailrc index 2cacaa034..251586e05 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -18,6 +18,7 @@ alias galak          Kumar Gala <galak@kernel.crashing.org>  alias gruss          Graeme Russ <graeme.russ@gmail.com>  alias hs             Heiko Schocher <hs@denx.de>  alias iwamatsu       Nobuhiro Iwamatsu <iwamatsu@nigauri.org> +alias jagan	     Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>  alias jasonjin       Jason Jin <jason.jin@freescale.com>  alias jhersh         Joe Hershberger <joe.hershberger@gmail.com>  alias kimphill       Kim Phillips <kim.phillips@freescale.com> @@ -106,5 +107,6 @@ alias i2c            uboot, hs  alias mmc            uboot, panto  alias nand           uboot, scottwood  alias net            uboot, jhersh +alias spi	     uboot, jagan  alias usb            uboot, marex  alias video          uboot, ag diff --git a/doc/uImage.FIT/command_syntax_extensions.txt b/doc/uImage.FIT/command_syntax_extensions.txt index 002818c22..6c99b1c15 100644 --- a/doc/uImage.FIT/command_syntax_extensions.txt +++ b/doc/uImage.FIT/command_syntax_extensions.txt @@ -170,7 +170,7 @@ bootm 200000  In case of the new uImage argument syntax, the address portion of any argument  can be omitted. If <addr3> is omitted, then it is assumed that image at -<addr2> should be used. Similarly, when <addr2> is omitted, is is assumed that +<addr2> should be used. Similarly, when <addr2> is omitted, it is assumed that  image at <addr1> should be used. If <addr1> is omitted, it is assumed that the  current image address is to be used. For example, consider the following  commands: diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index 6d2070758..160b2d05f 100644 --- a/doc/uImage.FIT/source_file_format.txt +++ b/doc/uImage.FIT/source_file_format.txt @@ -62,7 +62,7 @@ c) Image building procedure  The following picture shows how the new uImage is prepared. Input consists of  image source file (.its) and a set of data files. Image is created with the  help of standard U-boot mkimage tool which in turn uses dtc (device tree -compiler) to produce image tree blob (.itb).  Resulting .itb file is is the +compiler) to produce image tree blob (.itb).  Resulting .itb file is the  actual binary of a new uImage. |