diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm926ejs/davinci/ether.c | 2 | ||||
| -rw-r--r-- | cpu/i386/serial.c | 4 | ||||
| -rw-r--r-- | cpu/ixp/npe/npe.c | 2 | ||||
| -rw-r--r-- | cpu/mpc83xx/fdt.c | 20 | ||||
| -rw-r--r-- | cpu/mpc85xx/cpu.c | 2 | ||||
| -rw-r--r-- | cpu/mpc85xx/cpu_init.c | 47 | ||||
| -rw-r--r-- | cpu/mpc85xx/fdt.c | 7 | ||||
| -rw-r--r-- | cpu/mpc85xx/mp.c | 4 | ||||
| -rw-r--r-- | cpu/mpc85xx/start.S | 9 | ||||
| -rw-r--r-- | cpu/mpc86xx/fdt.c | 2 | ||||
| -rw-r--r-- | cpu/mpc8xx/video.c | 4 | ||||
| -rw-r--r-- | cpu/ppc4xx/40x_spd_sdram.c | 6 | 
12 files changed, 74 insertions, 35 deletions
diff --git a/cpu/arm926ejs/davinci/ether.c b/cpu/arm926ejs/davinci/ether.c index d286ec0c3..5ae035b98 100644 --- a/cpu/arm926ejs/davinci/ether.c +++ b/cpu/arm926ejs/davinci/ether.c @@ -357,6 +357,8 @@ static int dm644x_eth_hw_init(void)  			phy.auto_negotiate = gen_auto_negotiate;  	} +	printf("Ethernet PHY: %s\n", phy.name); +  	return(1);  } diff --git a/cpu/i386/serial.c b/cpu/i386/serial.c index baf35e53d..8b5f8fa11 100644 --- a/cpu/i386/serial.c +++ b/cpu/i386/serial.c @@ -413,8 +413,8 @@ void kgdb_serial_init(void)  	 * Init onboard 16550 UART  	 */  	outb(0x80, UART1_BASE + UART_LCR);	/* set DLAB bit */ -	outb(bdiv & 0xff), UART1_BASE + UART_DLL);	/* set divisor for 9600 baud */ -	outb(bdiv >> 8), UART1_BASE + UART_DLM);	/* set divisor for 9600 baud */ +	outb((bdiv & 0xff), UART1_BASE + UART_DLL);	/* set divisor for 9600 baud */ +	outb((bdiv >> 8  ), UART1_BASE + UART_DLM);	/* set divisor for 9600 baud */  	outb(0x03, UART1_BASE + UART_LCR);	/* line control 8 bits no parity */  	outb(0x00, UART1_BASE + UART_FCR);	/* disable FIFO */  	outb(0x00, UART1_BASE + UART_MCR);	/* no modem control DTR RTS */ diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c index a33b95697..892096b26 100644 --- a/cpu/ixp/npe/npe.c +++ b/cpu/ixp/npe/npe.c @@ -67,7 +67,7 @@ static void *npe_alloc(int size)  		p = npe_alloc_free;  		npe_alloc_free += size;  	} else { -		printf("%s: failed (count=%d, size=%d)!\n", count, size); +		printf("npe_alloc: failed (count=%d, size=%d)!\n", count, size);  	}  	return p;  } diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c index 02c4d0529..fda85c15d 100644 --- a/cpu/mpc83xx/fdt.c +++ b/cpu/mpc83xx/fdt.c @@ -26,6 +26,7 @@  #include <common.h>  #include <libfdt.h>  #include <fdt_support.h> +#include <asm/processor.h>  extern void ft_qe_setup(void *blob); @@ -33,6 +34,23 @@ DECLARE_GLOBAL_DATA_PTR;  void ft_cpu_setup(void *blob, bd_t *bd)  { +	immap_t *immr = (immap_t *)CFG_IMMR; +	int spridr = immr->sysconf.spridr; + +	/* +	 * delete crypto node if not on an E-processor +	 * initial revisions of the MPC834xE/6xE have the original SEC 2.0. +	 * EA revisions got the SEC uprevved to 2.4 but since the default device +	 * tree contains SEC 2.0 properties we uprev them here. +	 */ +	if (!IS_E_PROCESSOR(spridr)) +		fdt_fixup_crypto_node(blob, 0); +	else if (IS_E_PROCESSOR(spridr) && +		 (SPR_FAMILY(spridr) == SPR_834X_FAMILY || +		  SPR_FAMILY(spridr) == SPR_836X_FAMILY) && +		 REVID_MAJOR(spridr) >= 2) +		fdt_fixup_crypto_node(blob, 0x0204); +  #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\      defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)  	fdt_fixup_ethernet(blob, bd); @@ -60,7 +78,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)  #ifdef CFG_NS16550  	do_fixup_by_compat_u32(blob, "ns16550", -		"clock-frequency", bd->bi_busfreq, 1); +		"clock-frequency", CFG_NS16550_CLK, 1);  #endif  	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 0d50549f2..bde8e5670 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -97,7 +97,7 @@ int checkcpu (void)  	if (cpu) {  		puts(cpu->name); -		if (svr & 0x80000) +		if (IS_E_PROCESSOR(svr))  			puts("E");  	} else {  		puts("Unknown"); diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 736aef172..4feb7519a 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -261,37 +261,50 @@ int cpu_init_r(void)  	volatile uint cache_ctl;  	uint svr, ver;  	uint l2srbar; +	u32 l2siz_field;  	svr = get_svr();  	ver = SVR_SOC_VER(svr);  	asm("msync;isync");  	cache_ctl = l2cache->l2ctl; +	l2siz_field = (cache_ctl >> 28) & 0x3; -	switch (cache_ctl & 0x30000000) { -	case 0x20000000: -		if (ver == SVR_8548 || ver == SVR_8548_E || -		    ver == SVR_8544 || ver == SVR_8568_E) { -			puts ("512 KB "); -			/* set L2E=1, L2I=1, & L2SRAM=0 */ -			cache_ctl = 0xc0000000; +	switch (l2siz_field) { +	case 0x0: +		printf(" unknown size (0x%08x)\n", cache_ctl); +		return -1; +		break; +	case 0x1: +		if (ver == SVR_8540 || ver == SVR_8560   || +		    ver == SVR_8541 || ver == SVR_8541_E || +		    ver == SVR_8555 || ver == SVR_8555_E) { +			puts("128 KB "); +			/* set L2E=1, L2I=1, & L2BLKSZ=1 (128 Kbyte) */ +			cache_ctl = 0xc4000000;  		} else {  			puts("256 KB "); +			cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */ +		} +		break; +	case 0x2: +		if (ver == SVR_8540 || ver == SVR_8560   || +		    ver == SVR_8541 || ver == SVR_8541_E || +		    ver == SVR_8555 || ver == SVR_8555_E) { +			puts("256 KB ");  			/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */  			cache_ctl = 0xc8000000; +		} else { +			puts ("512 KB "); +			/* set L2E=1, L2I=1, & L2SRAM=0 */ +			cache_ctl = 0xc0000000;  		}  		break; -	case 0x10000000: -		puts("256 KB "); -		if (ver == SVR_8544 || ver == SVR_8544_E) { -			cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */ -		} +	case 0x3: +		puts("1024 KB "); +		/* set L2E=1, L2I=1, & L2SRAM=0 */ +		cache_ctl = 0xc0000000;  		break; -	case 0x30000000: -	case 0x00000000: -	default: -		printf(" unknown size (0x%08x)\n", cache_ctl); -		return -1;  	}  	if (l2cache->l2ctl & 0x80000000) { diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 92952e6d6..c159934c5 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -29,6 +29,7 @@  #include <asm/processor.h>  extern void ft_qe_setup(void *blob); +  #ifdef CONFIG_MP  #include "mp.h"  DECLARE_GLOBAL_DATA_PTR; @@ -205,6 +206,10 @@ static inline void ft_fixup_cache(void *blob)  void ft_cpu_setup(void *blob, bd_t *bd)  { +	/* delete crypto node if not on an E-processor */ +	if (!IS_E_PROCESSOR(get_svr())) +		fdt_fixup_crypto_node(blob, 0); +  #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\      defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)  	fdt_fixup_ethernet(blob, bd); @@ -224,7 +229,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)  #ifdef CFG_NS16550  	do_fixup_by_compat_u32(blob, "ns16550", -		"clock-frequency", bd->bi_busfreq, 1); +		"clock-frequency", CFG_NS16550_CLK, 1);  #endif  #ifdef CONFIG_CPM2 diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c index a527cf304..554830f46 100644 --- a/cpu/mpc85xx/mp.c +++ b/cpu/mpc85xx/mp.c @@ -50,12 +50,12 @@ int cpu_status(int nr)  	if (nr == id) {  		table = (u32 *)get_spin_addr(); -		printf("table base @ 0x%08x\n", table); +		printf("table base @ 0x%p\n", table);  	} else {  		table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;  		printf("Running on cpu %d\n", id);  		printf("\n"); -		printf("table @ 0x%08x:\n", table); +		printf("table @ 0x%p\n", table);  		printf("   addr - 0x%08x\n", table[BOOT_ENTRY_ADDR_LOWER]);  		printf("   pir  - 0x%08x\n", table[BOOT_ENTRY_PIR]);  		printf("   r3   - 0x%08x\n", table[BOOT_ENTRY_R3_LOWER]); diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 2b5d90e27..10fe93629 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -188,11 +188,12 @@ _start_e500:  	lis     r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@h  	ori     r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@l -	lis     r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h -	ori     r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l +	/* Align the mapping to 16MB */ +	lis     r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@h +	ori     r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@l -	lis     r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h -	ori     r9,r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l +	lis     r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h +	ori     r9,r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l  	mtspr   MAS0,r6  	mtspr   MAS1,r7 diff --git a/cpu/mpc86xx/fdt.c b/cpu/mpc86xx/fdt.c index 379306ea4..80a5c78a7 100644 --- a/cpu/mpc86xx/fdt.c +++ b/cpu/mpc86xx/fdt.c @@ -30,6 +30,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)  #ifdef CFG_NS16550  	do_fixup_by_compat_u32(blob, "ns16550", -			       "clock-frequency", bd->bi_busfreq, 1); +			       "clock-frequency", CFG_NS16550_CLK, 1);  #endif  } diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c index 8bf8e469c..ef9116560 100644 --- a/cpu/mpc8xx/video.c +++ b/cpu/mpc8xx/video.c @@ -833,10 +833,10 @@ static void video_encoder_init (void)  		puts ("[VIDEO ENCODER] Configuring the encoder...\n"); -		printf ("Sending %d bytes (@ %08lX) to I2C 0x%X:\n   ", +		printf ("Sending %zu bytes (@ %08lX) to I2C 0x%lX:\n   ",  			sizeof(video_encoder_data),  			(ulong)video_encoder_data, -			VIDEO_I2C_ADDR); +			(ulong)VIDEO_I2C_ADDR);  		for (i=0; i<sizeof(video_encoder_data); ++i) {  			printf(" %02X", video_encoder_data[i]);  		} diff --git a/cpu/ppc4xx/40x_spd_sdram.c b/cpu/ppc4xx/40x_spd_sdram.c index 42fd7fb87..b21b13e49 100644 --- a/cpu/ppc4xx/40x_spd_sdram.c +++ b/cpu/ppc4xx/40x_spd_sdram.c @@ -126,9 +126,9 @@ long int spd_sdram(int(read_spd)(uint addr))  	int sdram0_pmit=0x07c00000;  #ifndef CONFIG_405EP /* not on PPC405EP */ -	int sdram0_besr0=-1; -	int sdram0_besr1=-1; -	int sdram0_eccesr=-1; +	int sdram0_besr0 = -1; +	int sdram0_besr1 = -1; +	int sdram0_eccesr = -1;  #endif  	int sdram0_ecccfg;  |