diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc5xxx/cpu_init.c | 2 | ||||
| -rw-r--r-- | cpu/mpc5xxx/fec.c | 7 | ||||
| -rw-r--r-- | cpu/mpc8xx/serial.c | 13 | ||||
| -rw-r--r-- | cpu/ppc4xx/cpu.c | 30 | ||||
| -rw-r--r-- | cpu/ppc4xx/cpu_init.c | 13 | ||||
| -rw-r--r-- | cpu/ppc4xx/sdram.c | 2 |
6 files changed, 49 insertions, 18 deletions
diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index b7e00b3e2..7e6582185 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -123,7 +123,7 @@ void cpu_init_f (void) #endif #if defined(CFG_CS7_START) && defined(CFG_CS7_SIZE) - *(vu_long *)MPC5XXX_CS7_START = START_REG(CFG_CS5_START); + *(vu_long *)MPC5XXX_CS7_START = START_REG(CFG_CS7_START); *(vu_long *)MPC5XXX_CS7_STOP = STOP_REG(CFG_CS7_START, CFG_CS7_SIZE); addecr |= (1 << 27); #endif diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c index 37fe3e715..71c1bfab1 100644 --- a/cpu/mpc5xxx/fec.c +++ b/cpu/mpc5xxx/fec.c @@ -376,7 +376,7 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis) #if (DEBUG & 0x2) if (fec->xcv_type != SEVENWIRE) - mpc5xxx_fec_phydump (); + mpc5xxx_fec_phydump (dev->name); #endif /* @@ -575,7 +575,7 @@ static void mpc5xxx_fec_halt(struct eth_device *dev) #if (DEBUG & 0x2) if (fec->xcv_type != SEVENWIRE) - mpc5xxx_fec_phydump (); + mpc5xxx_fec_phydump (dev->name); #endif /* @@ -882,7 +882,8 @@ int mpc5xxx_fec_initialize(bd_t * bis) defined(CONFIG_ICECUBE) || defined(CONFIG_INKA4X0) || \ defined(CONFIG_MCC200) || defined(CONFIG_O2DNT) || \ defined(CONFIG_PM520) || defined(CONFIG_TOP5200) || \ - defined(CONFIG_TQM5200) || defined(CONFIG_V38B) + defined(CONFIG_TQM5200) || defined(CONFIG_V38B) || \ + defined(CONFIG_UC101) # ifndef CONFIG_FEC_10MBIT fec->xcv_type = MII100; # else diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c index 8ae584f2e..9d0fc6b4f 100644 --- a/cpu/mpc8xx/serial.c +++ b/cpu/mpc8xx/serial.c @@ -227,8 +227,17 @@ static int smc_init (void) sp->smc_smcm = 0; sp->smc_smce = 0xff; -#ifdef CFG_SPC1920_SMC1_CLK4 /* clock source is PLD */ - *((volatile uchar *) CFG_SPC1920_PLD_BASE+6) = 0xff; +#ifdef CFG_SPC1920_SMC1_CLK4 + /* clock source is PLD */ + + /* set freq to 19200 Baud */ + *((volatile uchar *) CFG_SPC1920_PLD_BASE+6) = 0x3; + /* configure clk4 as input */ + im->im_ioport.iop_pdpar |= 0x800; + im->im_ioport.iop_pddir &= ~0x800; + + cp->cp_simode = 0x0000; + cp->cp_simode |= 0x7000; #else /* Set up the baud rate generator */ smc_setbrg (); diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 9c5c9109b..57a7e8d6e 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -332,24 +332,44 @@ int checkcpu (void) strcpy(addstr, "No Security/Kasumi support"); break; - case PVR_440SP_RA: - puts("SP Rev. A"); + case PVR_440SP_6_RAB: + puts("SP Rev. A/B"); + strcpy(addstr, "RAID 6 support"); break; - case PVR_440SP_RB: - puts("SP Rev. B"); + case PVR_440SP_RAB: + puts("SP Rev. A/B"); + strcpy(addstr, "No RAID 6 support"); + break; + + case PVR_440SP_6_RC: + puts("SP Rev. C"); + strcpy(addstr, "RAID 6 support"); break; case PVR_440SP_RC: puts("SP Rev. C"); + strcpy(addstr, "No RAID 6 support"); + break; + + case PVR_440SPe_6_RA: + puts("SPe Rev. A"); + strcpy(addstr, "RAID 6 support"); break; case PVR_440SPe_RA: puts("SPe Rev. A"); + strcpy(addstr, "No RAID 6 support"); + break; + + case PVR_440SPe_6_RB: + puts("SPe Rev. B"); + strcpy(addstr, "RAID 6 support"); break; case PVR_440SPe_RB: puts("SPe Rev. B"); + strcpy(addstr, "No RAID 6 support"); break; default: @@ -419,7 +439,7 @@ int ppc440spe_revB() { unsigned int pvr; pvr = get_pvr(); - if (pvr == PVR_440SPe_RB) + if ((pvr == PVR_440SPe_6_RB) || (pvr == PVR_440SPe_RB)) return 1; else return 0; diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index 9e24b33f5..e2aa867c9 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -31,8 +31,6 @@ DECLARE_GLOBAL_DATA_PTR; #endif -#define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data) - #ifdef CFG_INIT_DCACHE_CS # if (CFG_INIT_DCACHE_CS == 0) # define PBxAP pb0ap @@ -221,6 +219,10 @@ void set_chip_gpio_configuration(gpio_param_s (*gpio_tab)[GPIO_GROUP_MAX][GPIO_M void cpu_init_f (void) { +#if defined(CONFIG_WATCHDOG) + unsigned long val; +#endif + #if defined(CONFIG_405EP) /* * GPIO0 setup (select GPIO or alternate function) @@ -312,12 +314,11 @@ cpu_init_f (void) #endif #if defined (CONFIG_SOLIDCARD3) -mtebc(epcr, 0xb84ef000); -*(unsigned long *)0x79000080 = 0x0001; + mtebc(epcr, 0xb84ef000); + *(unsigned long *)0x79000080 = 0x0001; #endif -#if defined(CONFIG_WATCHDOG) - unsigned long val; +#if defined(CONFIG_WATCHDOG) val = mfspr(tcr); #if defined(CONFIG_440EP) || defined(CONFIG_440GR) val |= 0xb8000000; /* generate system reset after 1.34 seconds */ diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c index f06038e99..294b89cb2 100644 --- a/cpu/ppc4xx/sdram.c +++ b/cpu/ppc4xx/sdram.c @@ -380,7 +380,7 @@ long int initdram(int board_type) mtsdram(mem_b0cr, mb0cf[i].reg); mtsdram(mem_tr0, 0x41094012); mtsdram(mem_tr1, 0x80800800); /* SS=T2 SL=STAGE 3 CD=1 CT=0x00*/ - mtsdram(mem_rtr, 0x7e000000); /* Interval 15.20µs @ 133MHz PLB*/ + mtsdram(mem_rtr, 0x04100000); /* Interval 7.8µs @ 133MHz PLB */ mtsdram(mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM*/ udelay(400); /* Delay 200 usecs (min) */ |