diff options
Diffstat (limited to 'cpu/ppc4xx/44x_spd_ddr.c')
| -rw-r--r-- | cpu/ppc4xx/44x_spd_ddr.c | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c index 8621aa00c..a38439240 100644 --- a/cpu/ppc4xx/44x_spd_ddr.c +++ b/cpu/ppc4xx/44x_spd_ddr.c @@ -70,12 +70,14 @@ #define ONE_BILLION 1000000000 -#if defined(CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG) -extern void spd_ddr_init_hang (void); -#define HANG() spd_ddr_init_hang() -#else -#define HANG() hang() -#endif +/* + * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed + */ +void __spd_ddr_init_hang (void) +{ + hang (); +} +void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))); /*----------------------------------------------------------------------------- | Memory Controller Options 0 @@ -474,7 +476,7 @@ static void get_spd_info(unsigned long *dimm_populated, if (dimm_found == FALSE) { printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } } @@ -497,7 +499,7 @@ static void check_mem_type(unsigned long *dimm_populated, dimm_num); printf("Only DDR SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); break; } } @@ -517,7 +519,7 @@ static void check_volt_type(unsigned long *dimm_populated, if (voltage_type != 0x04) { printf("ERROR: DIMM %lu with unsupported voltage level.\n", dimm_num); - HANG(); + spd_ddr_init_hang (); } else { debug("DIMM %lu voltage level supported.\n", dimm_num); } @@ -588,7 +590,7 @@ static void program_cfg0(unsigned long *dimm_populated, printf("WARNING: DIMM with datawidth of %lu bits.\n", data_width); printf("Only DIMMs with 32 or 64 bit datawidths supported.\n"); - HANG(); + spd_ddr_init_hang (); } break; } @@ -776,7 +778,7 @@ static void program_tr0(unsigned long *dimm_populated, if ((tcyc_reg & 0x0F) >= 10) { printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n", dimm_num); - HANG(); + spd_ddr_init_hang (); } cycle_time_ns_x_10[cas_index] = @@ -856,7 +858,7 @@ static void program_tr0(unsigned long *dimm_populated, printf("ERROR: No supported CAS latency with the installed DIMMs.\n"); printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n"); printf("Make sure the PLB speed is within the supported range.\n"); - HANG(); + spd_ddr_init_hang (); } /* @@ -1168,7 +1170,7 @@ static void program_tr1(void) */ if (window_found == FALSE) { printf("ERROR: Cannot determine a common read delay.\n"); - HANG(); + spd_ddr_init_hang (); } /* @@ -1318,7 +1320,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated, printf("ERROR: Unsupported value for the banksize: %d.\n", bank_size_id); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } switch (num_col_addr) { @@ -1340,7 +1342,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated, printf("ERROR: Unsupported value for number of " "column addresses: %d.\n", num_col_addr); printf("Replace the DIMM module with a supported DIMM.\n\n"); - HANG(); + spd_ddr_init_hang (); } /* |