diff options
Diffstat (limited to 'cpu/mips/cpu.c')
| -rw-r--r-- | cpu/mips/cpu.c | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c index 0f58d25b8..d5a16047d 100644 --- a/cpu/mips/cpu.c +++ b/cpu/mips/cpu.c @@ -23,6 +23,7 @@ #include <common.h> #include <command.h> +#include <netdev.h> #include <asm/mipsregs.h> #include <asm/cacheops.h> #include <asm/reboot.h> @@ -51,7 +52,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) void flush_cache(ulong start_addr, ulong size) { - unsigned long lsize = CFG_CACHELINE_SIZE; + unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE; unsigned long addr = start_addr & ~(lsize - 1); unsigned long aend = (start_addr + size - 1) & ~(lsize - 1); @@ -64,6 +65,34 @@ void flush_cache(ulong start_addr, ulong size) } } +void flush_dcache_range(ulong start_addr, ulong stop) +{ + unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (stop - 1) & ~(lsize - 1); + + while (1) { + cache_op(Hit_Writeback_Inv_D, addr); + if (addr == aend) + break; + addr += lsize; + } +} + +void invalidate_dcache_range(ulong start_addr, ulong stop) +{ + unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (stop - 1) & ~(lsize - 1); + + while (1) { + cache_op(Hit_Invalidate_D, addr); + if (addr == aend) + break; + addr += lsize; + } +} + void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) { write_c0_entrylo0(low0); @@ -73,3 +102,11 @@ void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) write_c0_index(index); tlb_write_indexed(); } + +int cpu_eth_init(bd_t *bis) +{ +#ifdef CONFIG_SOC_AU1X00 + au1x00_enet_initialize(bis); +#endif + return 0; +} |