diff options
Diffstat (limited to 'board')
25 files changed, 336 insertions, 86 deletions
diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c index 0e06c2915..e524f3511 100644 --- a/board/LaCie/net2big_v2/net2big_v2.c +++ b/board/LaCie/net2big_v2/net2big_v2.c @@ -39,7 +39,7 @@ int board_early_init_f(void) NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_SPI_SCn, MPP1_SPI_MOSI, MPP2_SPI_SCK, diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c index 101a80a70..0aa5345dd 100644 --- a/board/LaCie/netspace_v2/netspace_v2.c +++ b/board/LaCie/netspace_v2/netspace_v2.c @@ -39,7 +39,7 @@ int board_early_init_f(void) NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_SPI_SCn, MPP1_SPI_MOSI, MPP2_SPI_SCK, diff --git a/board/LaCie/wireless_space/Makefile b/board/LaCie/wireless_space/Makefile new file mode 100644 index 000000000..b43c3d3bf --- /dev/null +++ b/board/LaCie/wireless_space/Makefile @@ -0,0 +1,46 @@ +# +# Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o ../common/common.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/LaCie/wireless_space/kwbimage.cfg b/board/LaCie/wireless_space/kwbimage.cfg new file mode 100644 index 000000000..0daf5b539 --- /dev/null +++ b/board/LaCie/wireless_space/kwbimage.cfg @@ -0,0 +1,82 @@ +# +# Copyright (C) 2012 Albert ARIBAUD <albert.u.boot@aribaud.net> +# +# Based on netspace_v2 kwbimage.cfg: +# Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand # Boot from NAND flash +NAND_PAGE_SIZE 800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Values taken from image original LaCie U-Boot header dump! + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1B1B1B9B + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register + +DATA 0xFFD01404 0x37743000 # DDR Controller Control Low + +DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) + +DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) + +DATA 0xFFD01410 0x0000CCCC # DDR Address Control + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control + +DATA 0xFFD01418 0x00000000 # DDR Operation + +DATA 0xFFD0141C 0x00000662 # DDR Mode + +DATA 0xFFD01420 0x00000004 # DDR Extended Mode + +DATA 0xFFD01424 0x0000F07F # DDR Controller Control High + +DATA 0xFFD01428 0x00096630 # DDR2 ODT Read Timing (default values) + +DATA 0xFFD0147C 0x00009663 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +DATA 0xFFD01508 0x00000000 # CS[1]n Base address to 0x0 +DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled +DATA 0xFFD01494 0x00120012 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +DATA 0xFFD0149C 0x0000E40F # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +DATA 0xFFD20134 0x66666666 +DATA 0xFFD20138 0x66666666 +DATA 0xFFD10000 0x01112222 +DATA 0xFFD1000C 0x00000000 +DATA 0xFFD10104 0x00000000 +DATA 0xFFD10100 0x40000000 +# End of Header extension +DATA 0x0 0x0 diff --git a/board/LaCie/wireless_space/wireless_space.c b/board/LaCie/wireless_space/wireless_space.c new file mode 100644 index 000000000..208065899 --- /dev/null +++ b/board/LaCie/wireless_space/wireless_space.c @@ -0,0 +1,176 @@ +/* + * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <command.h> +#include <asm/arch/cpu.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include <asm/arch/gpio.h> + +#include "../common/common.h" +#include "netdev.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* GPIO configuration: start FAN at low speed, USB and HDD */ + +#define WIRELESS_SPACE_OE_LOW 0xFF006808 +#define WIRELESS_SPACE_OE_HIGH 0x0000F989 +#define WIRELESS_SPACE_OE_VAL_LOW 0x00010080 +#define WIRELESS_SPACE_OE_VAL_HIGH 0x00000240 + +#define WIRELESS_SPACE_REAR_BUTTON 13 +#define WIRELESS_SPACE_FRONT_BUTTON 43 + +const u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, /* Fan speed (bit 1) */ + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP13_GPIO, /* Red led */ + MPP14_GPIO, /* USB fuse */ + MPP15_SATA0_ACTn, + MPP16_GPIO, /* SATA 0 power */ + MPP17_GPIO, /* SATA 1 power */ + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, /* Gigabit Ethernet 1 */ + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GE1_15, + MPP36_GPIO, /* Fan speed (bit 2) */ + MPP37_GPIO, /* Fan speed (bit 0) */ + MPP38_GPIO, /* Fan power */ + MPP39_GPIO, /* Fan rotation fail */ + MPP40_GPIO, /* Ethernet switch link */ + MPP41_GPIO, /* USB enable host vbus */ + MPP42_GPIO, /* LED clock control */ + MPP43_GPIO, /* WPS button (0=Pushed, 1=Released) */ + MPP44_GPIO, /* Red LED on/off */ + MPP45_GPIO, /* Red LED timer blink (on=off=100ms) */ + MPP46_GPIO, /* Green LED on/off */ + MPP47_GPIO, /* LED (blue, green) SATA activity blink */ + MPP48_GPIO, /* Blue LED on/off */ + 0 +}; + +struct mv88e61xx_config swcfg = { + .name = "egiga0", + .vlancfg = MV88E61XX_VLANCFG_ROUTER, + .rgmii_delay = MV88E61XX_RGMII_DELAY_EN, + .led_init = MV88E61XX_LED_INIT_EN, + .mdip = MV88E61XX_MDIP_NOCHANGE, + .portstate = MV88E61XX_PORTSTT_FORWARDING, + .cpuport = 0x20, + .ports_enabled = 0x3F, +}; + +int board_early_init_f(void) +{ + /* Gpio configuration */ + kw_config_gpio(WIRELESS_SPACE_OE_VAL_LOW, WIRELESS_SPACE_OE_VAL_HIGH, + WIRELESS_SPACE_OE_LOW, WIRELESS_SPACE_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + kirkwood_mpp_conf(kwmpp_config, NULL); + + return 0; +} + +int board_init(void) +{ + /* Machine number */ + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; + + /* Boot parameters address */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#if defined(CONFIG_MISC_INIT_R) +int misc_init_r(void) +{ +#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR) + if (!getenv("ethaddr")) { + uchar mac[6]; + if (lacie_read_mac_address(mac) == 0) + eth_setenv_enetaddr("ethaddr", mac); + } +#endif + return 0; +} +#endif + +#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) +/* Configure and initialize PHY */ +void reset_phy(void) +{ + /* configure switch on egiga0 */ + mv88e61xx_switch_initialize(&swcfg); +} +#endif + +#if defined(CONFIG_KIRKWOOD_GPIO) && defined(CONFIG_WIRELESS_SPACE_CMD) +/* Return GPIO button status */ +static int +do_ws(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + if (strcmp(argv[1], "button") == 0) { + if (strcmp(argv[2], "rear") == 0) + /* invert GPIO result for intuitive while/until use */ + return !kw_gpio_get_value(WIRELESS_SPACE_REAR_BUTTON); + else if (strcmp(argv[2], "front") == 0) + return kw_gpio_get_value(WIRELESS_SPACE_FRONT_BUTTON); + else + return -1; + } else { + return -1; + } +} + +U_BOOT_CMD(ws, 3, 0, do_ws, + "Return GPIO button status 0=off 1=on", + "- ws button rear|front: test buttons' states\n" +); +#endif diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c index d6497aaa0..0caf34ff0 100644 --- a/board/Marvell/dreamplug/dreamplug.c +++ b/board/Marvell/dreamplug/dreamplug.c @@ -46,7 +46,7 @@ int board_early_init_f(void) DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_SPI_SCn, /* SPI Flash */ MPP1_SPI_MOSI, MPP2_SPI_SCK, diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c index f5c1c3cfd..3a52ab274 100644 --- a/board/Marvell/guruplug/guruplug.c +++ b/board/Marvell/guruplug/guruplug.c @@ -43,7 +43,7 @@ int board_early_init_f(void) GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c index 43852f6b2..fb57faa52 100644 --- a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c +++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c @@ -45,7 +45,7 @@ int board_early_init_f(void) MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_SPI_SCn, MPP1_SPI_MOSI, MPP2_SPI_SCK, diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c index d48f05a04..c59a32611 100644 --- a/board/Marvell/openrd/openrd.c +++ b/board/Marvell/openrd/openrd.c @@ -48,7 +48,7 @@ int board_early_init_f(void) OPENRD_OE_LOW, OPENRD_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/Marvell/rd6281a/rd6281a.c b/board/Marvell/rd6281a/rd6281a.c index 1fd7677dc..adaa6a1a6 100644 --- a/board/Marvell/rd6281a/rd6281a.c +++ b/board/Marvell/rd6281a/rd6281a.c @@ -44,7 +44,7 @@ int board_early_init_f(void) RD6281A_OE_LOW, RD6281A_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 688d3086d..16efe645d 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -43,7 +43,7 @@ int board_early_init_f(void) SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c index fc88520b2..4f1f899b9 100644 --- a/board/Seagate/dockstar/dockstar.c +++ b/board/Seagate/dockstar/dockstar.c @@ -47,7 +47,7 @@ int board_early_init_f(void) DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index edb088680..8773e6fd3 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -295,6 +295,9 @@ int board_init(void) at91_macb_hw_init(); #endif +#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI) + at91_uhp_hw_init(); +#endif #ifdef CONFIG_LCD at91sam9x5ek_lcd_hw_init(); #endif diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c index 57776fb07..83eea04cb 100644 --- a/board/buffalo/lsxl/lsxl.c +++ b/board/buffalo/lsxl/lsxl.c @@ -49,9 +49,8 @@ * you can do this only with a working network connection. Therefore, a random * ethernet address is generated if none is set and a DHCP request is sent. * After a successful DHCP response is received, the network settings are - * configured and the ncip parameter is set to the serverip. Eg. for a working - * resuce mode, you should set 'next-server' to the host where the netconsole - * client is started. + * configured and the ncip is unset. Therefore, all netconsole packets are + * broadcasted. * Additionally, the bootsource is set to 'rescue'. */ @@ -76,7 +75,7 @@ int board_early_init_f(void) * Multi-Purpose Pins Functionality configuration * These strappings are taken from the original vendor uboot port. */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_SPI_SCn, MPP1_SPI_MOSI, MPP2_SPI_SCK, diff --git a/board/cloudengines/pogo_e02/pogo_e02.c b/board/cloudengines/pogo_e02/pogo_e02.c index bac9ce55a..3b1c8ec2a 100644 --- a/board/cloudengines/pogo_e02/pogo_e02.c +++ b/board/cloudengines/pogo_e02/pogo_e02.c @@ -45,7 +45,7 @@ int board_early_init_f(void) POGO_E02_OE_LOW, POGO_E02_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/d-link/dns325/dns325.c b/board/d-link/dns325/dns325.c index 11260fe5f..41879017e 100644 --- a/board/d-link/dns325/dns325.c +++ b/board/d-link/dns325/dns325.c @@ -44,7 +44,7 @@ int board_early_init_f(void) DNS325_OE_LOW, DNS325_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/iomega/iconnect/iconnect.c b/board/iomega/iconnect/iconnect.c index 8cfb4e662..c54c95d28 100644 --- a/board/iomega/iconnect/iconnect.c +++ b/board/iomega/iconnect/iconnect.c @@ -41,7 +41,7 @@ int board_early_init_f(void) ICONNECT_OE_LOW, ICONNECT_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c index 96410d77d..7a4e7b328 100644 --- a/board/karo/tk71/tk71.c +++ b/board/karo/tk71/tk71.c @@ -47,7 +47,7 @@ int board_early_init_f(void) TK71_OE_LOW, TK71_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index a90f1124f..6f407b78f 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -121,7 +121,7 @@ int i2c_make_abort(void) { #if defined(CONFIG_HARD_I2C) && !defined(MACH_TYPE_KM_KIRKWOOD) - immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; + immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; /* diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 0c4dddc61..eda9199bb 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR; #define MASK_RBI_DEFECT_16 0x01 /* Multi-Purpose Pins Functionality configuration */ -u32 kwmpp_config[] = { +static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, @@ -193,15 +193,6 @@ void set_bootcount_addr(void) int misc_init_r(void) { - char *str; - int mach_type; - - str = getenv("mach_type"); - if (str != NULL) { - mach_type = simple_strtoul(str, NULL, 10); - printf("Overwriting MACH_TYPE with %d!!!\n", mach_type); - gd->bd->bi_arch_number = mach_type; - } #if defined(CONFIG_KM_MGCOGE3UN) char *wait_for_ne; wait_for_ne = getenv("waitforne"); @@ -258,11 +249,6 @@ int board_early_init_f(void) int board_init(void) { - /* - * arch number of board - */ - gd->bd->bi_arch_number = MACH_TYPE_KM_KIRKWOOD; - /* address of boot parameters */ gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; diff --git a/board/keymile/km_arm/kwbimage-memphis.cfg b/board/keymile/km_arm/kwbimage-memphis.cfg index 6df2ad790..5aa0de252 100644 --- a/board/keymile/km_arm/kwbimage-memphis.cfg +++ b/board/keymile/km_arm/kwbimage-memphis.cfg @@ -55,9 +55,9 @@ DATA 0xFFD10008 0x00001100 # MPP Control 2 Register DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register DATA 0xFFD20134 0x66666666 # L2 RAM Timing 0 Register DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register -DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register -DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register -DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register + +# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched! +# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage #Dram initalization DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register diff --git a/board/keymile/km_arm/kwbimage.cfg b/board/keymile/km_arm/kwbimage.cfg index b2f51936f..e5e9942c1 100644 --- a/board/keymile/km_arm/kwbimage.cfg +++ b/board/keymile/km_arm/kwbimage.cfg @@ -52,9 +52,9 @@ DATA 0xFFD10008 0x00001100 # MPP Control 2 Register DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register DATA 0xFFD20134 0x66666666 # L2 RAM Timing 0 Register DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register -DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register -DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register -DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register + +# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched! +# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage #Dram initalization DATA 0xFFD01400 0x43000400 # SDRAM Configuration Register diff --git a/board/keymile/km_arm/kwbimage_128M16_1.cfg b/board/keymile/km_arm/kwbimage_128M16_1.cfg index bcce9073f..5de8df70f 100644 --- a/board/keymile/km_arm/kwbimage_128M16_1.cfg +++ b/board/keymile/km_arm/kwbimage_128M16_1.cfg @@ -98,29 +98,8 @@ DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register # bit 19-18: 1, ECC RAM WTC RAM0 # bit 31-20: ???,Reserve -DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register -# bit 23-0: 0x000200, Addr Config tuning -# bit 31-24: 0, Reserved - -# ??? Missing register # CPU RAM Management Control2 Register - -DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register -# bit 15-0: 0x1C00, Opmux Tuning -# bit 31-16: 0, Pc Dp Tuning - -DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register -# bit 1-0: 1, addr clk tune -# bit 3-2: 0, reserved -# bit 5-4: 0, dtcmp clk tune -# bit 7-6: 0, reserved -# bit 9-8: 0, macdrv clk tune -# bit 11-10: 0, opmuxgm2 clk tune -# bit 15-14: 0, rf clk tune -# bit 17-16: 0, rfbypass clk tune -# bit 19-18: 0, pc dp clk tune -# bit 23-20: 0, icache clk tune -# bit 27:24: 0, dcache clk tune -# bit 31:28: 0, regfile tunin +# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched! +# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage # SDRAM initalization DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register diff --git a/board/keymile/km_arm/kwbimage_256M8_1.cfg b/board/keymile/km_arm/kwbimage_256M8_1.cfg index 3e1237bbe..d0a09f61d 100644 --- a/board/keymile/km_arm/kwbimage_256M8_1.cfg +++ b/board/keymile/km_arm/kwbimage_256M8_1.cfg @@ -100,29 +100,8 @@ DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register # bit 19-18: 1, ECC RAM WTC RAM0 # bit 31-20: ?,Reserved -DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register -# bit 23-0: 0x000200, Addr Config tuning -# bit 31-24: 0, Reserved - -# ??? Missing register # CPU RAM Management Control2 Register - -DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register -# bit 15-0: 0x1C00, Opmux Tuning -# bit 31-16: 0, Pc Dp Tuning - -DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register -# bit 1-0: 1, addr clk tune -# bit 3-2: 0, reserved -# bit 5-4: 0, dtcmp clk tune -# bit 7-6: 0, reserved -# bit 9-8: 0, macdrv clk tune -# bit 11-10: 0, opmuxgm2 clk tune -# bit 15-14: 0, rf clk tune -# bit 17-16: 0, rfbypass clk tune -# bit 19-18: 0, pc dp clk tune -# bit 23-20: 0, icache clk tune -# bit 27:24: 0, dcache clk tune -# bit 31:28: 0, regfile tunin +# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched! +# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage # SDRAM initalization DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register diff --git a/board/raidsonic/ib62x0/ib62x0.c b/board/raidsonic/ib62x0/ib62x0.c index 5f0f3961d..cf4ca51fc 100644 --- a/board/raidsonic/ib62x0/ib62x0.c +++ b/board/raidsonic/ib62x0/ib62x0.c @@ -45,7 +45,7 @@ int board_early_init_f(void) /* Set SATA activity LEDs to default off */ writel(MVSATAHC_LED_POLARITY_CTRL, MVSATAHC_LED_CONF_REG); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { + static const u32 kwmpp_config[] = { MPP0_NF_IO2, MPP1_NF_IO3, MPP2_NF_IO4, |