diff options
Diffstat (limited to 'board/mpl/common')
| -rw-r--r-- | board/mpl/common/flash.c | 860 | ||||
| -rw-r--r-- | board/mpl/common/isa.c | 469 | ||||
| -rw-r--r-- | board/mpl/common/kbd.c | 655 | ||||
| -rw-r--r-- | board/mpl/common/usb_uhci.c | 1152 | 
4 files changed, 3136 insertions, 0 deletions
| diff --git a/board/mpl/common/flash.c b/board/mpl/common/flash.c new file mode 100644 index 000000000..f0c541b44 --- /dev/null +++ b/board/mpl/common/flash.c @@ -0,0 +1,860 @@ +/* + * (C) Copyright 2000, 2001 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Modified 4/5/2001 + * Wait for completion of each sector erase command issued + * 4/5/2001 + * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com + */ + +/* + * Modified 3/7/2001 + * - adopted for pip405, Denis Peter, MPL AG Switzerland + * TODO: + * clean-up + */ + +#include <common.h> +#include <ppc4xx.h> +#include <asm/processor.h> +#ifdef CONFIG_PIP405 +#include "../pip405/pip405.h" +#endif +#ifdef CONFIG_MIP405 +#include "../mip405/mip405.h" +#endif +#include "common_util.h" + +flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/ +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size (vu_long *addr, flash_info_t *info); +static int write_word (flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets (ulong base, flash_info_t *info); + +void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt); + + +#ifdef CONFIG_ADCIOP +#define ADDR0           0x0aa9 +#define ADDR1           0x0556 +#define FLASH_WORD_SIZE unsigned char +#endif + +#ifdef CONFIG_CPCI405 +#define ADDR0           0x5555 +#define ADDR1           0x2aaa +#define FLASH_WORD_SIZE unsigned short +#endif + +#ifdef CONFIG_PIP405 +#define ADDR0           0x5555 +#define ADDR1           0x2aaa +#define FLASH_WORD_SIZE unsigned short +#endif + +#ifdef CONFIG_MIP405 +#define ADDR0           0x5555 +#define ADDR1           0x2aaa +#define FLASH_WORD_SIZE unsigned short +#endif + +#define FALSE           0 +#define TRUE            1 + +/*----------------------------------------------------------------------- + */ + + +unsigned long flash_init (void) +{ +	unsigned long size_b0, size_b1; +	int i; +  unsigned long pbcr; +  unsigned long base_b0, base_b1; +  unsigned char rc; + +  rc=switch_cs(FALSE); /* map Flash High */ + +	if(rc) +		printf("(MPS Boot) "); +	else +		printf("(Flash Boot) "); +	/* Init: no FLASHes known */ +	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { +		flash_info[i].flash_id = FLASH_UNKNOWN; +	} + +	/* Static FLASH Bank configuration here - FIXME XXX */ + +	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); + +	if (flash_info[0].flash_id == FLASH_UNKNOWN) { +		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", +			size_b0, size_b0<<20); +	} +	/* Only one bank */ +	if (CFG_MAX_FLASH_BANKS == 1) +	  { +	    /* Setup offsets */ +			/*  flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]); */ +	    /* Monitor protection ON by default */ +#if CFG_MONITOR_BASE >= CFG_FLASH_BASE +	 	    flash_protect(FLAG_PROTECT_SET, +				CFG_MONITOR_BASE, +				CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, +				&flash_info[0]); +#endif +	    size_b1 = 0 ; +	    flash_info[0].size = size_b0; +	  } + +	/* 2 banks */ +	else +	  { +	    size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); + +	    /* Re-do sizing to get full correct info */ + +	    if (size_b1) +	      { +		mtdcr(ebccfga, pb0cr); +		pbcr = mfdcr(ebccfgd); +		mtdcr(ebccfga, pb0cr); +		base_b1 = -size_b1; +		pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17); +		mtdcr(ebccfgd, pbcr); +		/*          printf("pb1cr = %x\n", pbcr); */ +	      } + +	    if (size_b0) +	      { +		mtdcr(ebccfga, pb1cr); +		pbcr = mfdcr(ebccfgd); +		mtdcr(ebccfga, pb1cr); +		base_b0 = base_b1 - size_b0; +		pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17); +		mtdcr(ebccfgd, pbcr); +		/*            printf("pb0cr = %x\n", pbcr); */ +	      } + +	    size_b0 = flash_get_size((vu_long *)base_b0, &flash_info[0]); + +	    flash_get_offsets (base_b0, &flash_info[0]); + +	    /* monitor protection ON by default */ +	    (void)flash_protect(FLAG_PROTECT_SET, +				base_b0+size_b0-CFG_MONITOR_LEN, +				base_b0+size_b0-1, +				&flash_info[0]); + +	    if (size_b1) { +	      /* Re-do sizing to get full correct info */ +	      size_b1 = flash_get_size((vu_long *)base_b1, &flash_info[1]); + +	      flash_get_offsets (base_b1, &flash_info[1]); + +	      /* monitor protection ON by default */ +	      (void)flash_protect(FLAG_PROTECT_SET, +				  base_b1+size_b1-CFG_MONITOR_LEN, +				  base_b1+size_b1-1, +				  &flash_info[1]); +	      /* monitor protection OFF by default (one is enough) */ +	      (void)flash_protect(FLAG_PROTECT_CLEAR, +				  base_b0+size_b0-CFG_MONITOR_LEN, +				  base_b0+size_b0-1, +				  &flash_info[0]); +	    } else { +	      flash_info[1].flash_id = FLASH_UNKNOWN; +	      flash_info[1].sector_count = -1; +	    } + +	    flash_info[0].size = size_b0; +	    flash_info[1].size = size_b1; +	  }/* else 2 banks */ +	switch_cs(rc); /* switch mode back */ +	return (size_b0 + size_b1); +} + + +static void flash_get_offsets (ulong base, flash_info_t *info) +{ +	return; +} +#if 0 +/*----------------------------------------------------------------------- + */ +static void flash_get_offsets (ulong base, flash_info_t *info) +{ +	int i; + +	/* set up sector start address table */ +  if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || +	    (info->flash_id  == FLASH_AM040)){ +		for (i = 0; i < info->sector_count; i++) +			info->start[i] = base + (i * 0x00010000); +  } +  else { +		if (info->flash_id & FLASH_BTYPE) { +		/* set sector offsets for bottom boot block type	*/ +		info->start[0] = base + 0x00000000; +		info->start[1] = base + 0x00004000; +		info->start[2] = base + 0x00006000; +		info->start[3] = base + 0x00008000; +		for (i = 4; i < info->sector_count; i++) { +			info->start[i] = base + (i * 0x00010000) - 0x00030000; +		} +	    } else { +		/* set sector offsets for top boot block type		*/ +		i = info->sector_count - 1; +		info->start[i--] = base + info->size - 0x00004000; +		info->start[i--] = base + info->size - 0x00006000; +		info->start[i--] = base + info->size - 0x00008000; +		for (; i >= 0; i--) { +			info->start[i] = base + i * 0x00010000; +		} +	    } +	} +} + +#endif +/*----------------------------------------------------------------------- + */ +void flash_print_info  (flash_info_t *info) +{ +	int i; +    int k; +   	int size; +    int erased; +    volatile unsigned long *flash; + +	if (info->flash_id == FLASH_UNKNOWN) { +		printf ("missing or unknown FLASH type\n"); +		return; +	} + +	switch (info->flash_id & FLASH_VENDMASK) { +	case FLASH_MAN_AMD:	printf ("AMD ");		break; +	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break; +	case FLASH_MAN_SST:	printf ("SST ");		break; +	case FLASH_MAN_INTEL:	printf ("Intel ");		break; +	default:		printf ("Unknown Vendor ");	break; +	} + +	switch (info->flash_id & FLASH_TYPEMASK) { +	case FLASH_AM040:	printf ("AM29F040 (512 Kbit, uniform sector size)\n"); +				break; +	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); +				break; +	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n"); +				break; +	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); +				break; +	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n"); +				break; +	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); +				break; +	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n"); +				break; +	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); +				break; +	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n"); +				break; +	case FLASH_SST800A:	printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); +				break; +	case FLASH_SST160A:	printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); +				break; +	case FLASH_INTEL320T:	printf ("TE28F320C3 (32 Mbit, top sector size)\n"); +				break; +	default:		printf ("Unknown Chip Type\n"); +				break; +	} + +	printf ("  Size: %ld KB in %d Sectors\n", +		info->size >> 10, info->sector_count); + +	printf ("  Sector Start Addresses:"); +	for (i=0; i<info->sector_count; ++i) { +  	/* +     * Check if whole sector is erased +     */ +		if (i != (info->sector_count-1)) +    	size = info->start[i+1] - info->start[i]; +		else +      size = info->start[0] + info->size - info->start[i]; +    erased = 1; +    flash = (volatile unsigned long *)info->start[i]; +    size = size >> 2;        /* divide by 4 for longword access */ +    for (k=0; k<size; k++) +    { +    	if (*flash++ != 0xffffffff) +			{ + 				erased = 0; +				break; +			} + 		} +		if ((i % 5) == 0) +			printf ("\n   "); +#if 0 /* test-only */ +		printf (" %08lX%s", +			info->start[i], +			info->protect[i] ? " (RO)" : "     " +#else +		printf (" %08lX%s%s", +			info->start[i], +			erased ? " E" : "  ", +			info->protect[i] ? "RO " : "   " +#endif +		); +	} +	printf ("\n"); + +} + +/*----------------------------------------------------------------------- + */ + + +/*----------------------------------------------------------------------- + */ + +/* + * The following code cannot be run from FLASH! + */ +static ulong flash_get_size (vu_long *addr, flash_info_t *info) +{ +	short i; +	FLASH_WORD_SIZE value; +	ulong base = (ulong)addr; +	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; + +	/* Write auto select command: read Manufacturer ID */ +	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; +	addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; +	addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090; + +	value = addr2[0]; +	/*	printf("flash_get_size value: %x\n",value); */ +	switch (value) { +	case (FLASH_WORD_SIZE)AMD_MANUFACT: +		info->flash_id = FLASH_MAN_AMD; +		break; +	case (FLASH_WORD_SIZE)FUJ_MANUFACT: +		info->flash_id = FLASH_MAN_FUJ; +		break; +	case (FLASH_WORD_SIZE)INTEL_MANUFACT: +		info->flash_id = FLASH_MAN_INTEL; +		break; +	case (FLASH_WORD_SIZE)SST_MANUFACT: +		info->flash_id = FLASH_MAN_SST; +		break; +	default: +		info->flash_id = FLASH_UNKNOWN; +		info->sector_count = 0; +		info->size = 0; +		return (0);			/* no or unknown flash	*/ +	} +	value = addr2[1];			/* device ID		*/ +	/*	printf("Device value %x\n",value); */ +	switch (value) { +	case (FLASH_WORD_SIZE)AMD_ID_F040B: +	        info->flash_id += FLASH_AM040; +		info->sector_count = 8; +		info->size = 0x0080000; /* => 512 ko */ +		break; +	case (FLASH_WORD_SIZE)AMD_ID_LV400T: +		info->flash_id += FLASH_AM400T; +		info->sector_count = 11; +		info->size = 0x00080000; +		break;				/* => 0.5 MB		*/ + +	case (FLASH_WORD_SIZE)AMD_ID_LV400B: +		info->flash_id += FLASH_AM400B; +		info->sector_count = 11; +		info->size = 0x00080000; +		break;				/* => 0.5 MB		*/ + +	case (FLASH_WORD_SIZE)AMD_ID_LV800T: +		info->flash_id += FLASH_AM800T; +		info->sector_count = 19; +		info->size = 0x00100000; +		break;				/* => 1 MB		*/ + +	case (FLASH_WORD_SIZE)AMD_ID_LV800B: +		info->flash_id += FLASH_AM800B; +		info->sector_count = 19; +		info->size = 0x00100000; +		break;				/* => 1 MB		*/ + +	case (FLASH_WORD_SIZE)AMD_ID_LV160T: +		info->flash_id += FLASH_AM160T; +		info->sector_count = 35; +		info->size = 0x00200000; +		break;				/* => 2 MB		*/ + +	case (FLASH_WORD_SIZE)AMD_ID_LV160B: +		info->flash_id += FLASH_AM160B; +		info->sector_count = 35; +		info->size = 0x00200000; +		break;				/* => 2 MB		*/ +#if 0	/* enable when device IDs are available */ +	case (FLASH_WORD_SIZE)AMD_ID_LV320T: +		info->flash_id += FLASH_AM320T; +		info->sector_count = 67; +		info->size = 0x00400000; +		break;				/* => 4 MB		*/ + +	case (FLASH_WORD_SIZE)AMD_ID_LV320B: +		info->flash_id += FLASH_AM320B; +		info->sector_count = 67; +		info->size = 0x00400000; +		break;				/* => 4 MB		*/ +#endif +	case (FLASH_WORD_SIZE)SST_ID_xF800A: +		info->flash_id += FLASH_SST800A; +		info->sector_count = 16; +		info->size = 0x00100000; +		break;				/* => 1 MB		*/ +	case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T: +		info->flash_id += FLASH_INTEL320T; +		info->sector_count = 71; +		info->size = 0x00400000; +		break;				/* => 4 MB		*/ + + +	case (FLASH_WORD_SIZE)SST_ID_xF160A: +		info->flash_id += FLASH_SST160A; +		info->sector_count = 32; +		info->size = 0x00200000; +		break;				/* => 2 MB		*/ + +	default: +		info->flash_id = FLASH_UNKNOWN; +		return (0);			/* => no or unknown flash */ + +	} + +	/* set up sector start address table */ +  if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || +	    (info->flash_id  == FLASH_AM040)){ +		for (i = 0; i < info->sector_count; i++) +			info->start[i] = base + (i * 0x00010000); +  } else { +		if (info->flash_id & FLASH_BTYPE) { +		/* set sector offsets for bottom boot block type	*/ +		info->start[0] = base + 0x00000000; +		info->start[1] = base + 0x00004000; +		info->start[2] = base + 0x00006000; +		info->start[3] = base + 0x00008000; +		for (i = 4; i < info->sector_count; i++) +			info->start[i] = base + (i * 0x00010000) - 0x00030000; +	  } +	  else { +			/* set sector offsets for top boot block type		*/ +			i = info->sector_count - 1; +			if(info->sector_count==71) { + +				info->start[i--] = base + info->size - 0x00002000; +				info->start[i--] = base + info->size - 0x00004000; +				info->start[i--] = base + info->size - 0x00006000; +				info->start[i--] = base + info->size - 0x00008000; +				info->start[i--] = base + info->size - 0x0000A000; +				info->start[i--] = base + info->size - 0x0000C000; +				info->start[i--] = base + info->size - 0x0000E000; +				for (; i >= 0; i--) +					info->start[i] = base + i * 0x000010000; +			} +			else { +				info->start[i--] = base + info->size - 0x00004000; +				info->start[i--] = base + info->size - 0x00006000; +				info->start[i--] = base + info->size - 0x00008000; +				for (; i >= 0; i--) +					info->start[i] = base + i * 0x00010000; +			} +		} +	} + +	/* check for protected sectors */ +	for (i = 0; i < info->sector_count; i++) { +		/* read sector protection at sector address, (A7 .. A0) = 0x02 */ +		/* D0 = 1 if protected */ +		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); +    	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) +      	info->protect[i] = 0; +      else +        info->protect[i] = addr2[2] & 1; +	} + +	/* +	 * Prevent writes to uninitialized FLASH. +	 */ +	if (info->flash_id != FLASH_UNKNOWN) { +#if 0 /* test-only */ +#ifdef CONFIG_ADCIOP +		addr2 = (volatile unsigned char *)info->start[0]; +                addr2[ADDR0] = 0xAA; +                addr2[ADDR1] = 0x55; +                addr2[ADDR0] = 0xF0;  /* reset bank */ +#else +		addr2 = (FLASH_WORD_SIZE *)info->start[0]; +		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */ +#endif +#else /* test-only */ +		addr2 = (FLASH_WORD_SIZE *)info->start[0]; +		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */ +#endif /* test-only */ +	} +	return (info->size); +} + +int wait_for_DQ7(flash_info_t *info, int sect) +{ +	ulong start, now, last; +	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]); + +	start = get_timer (0); +    last  = start; +    while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { +        if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { +            printf ("Timeout\n"); +            return -1; +        } +        /* show that we're waiting */ +        if ((now - last) > 1000) {  /* every second */ +	    			putc ('.'); +            last = now; +        } +    } +	return 0; +} + +int intel_wait_for_DQ7(flash_info_t *info, int sect) +{ +	ulong start, now, last; +	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]); + +		start = get_timer (0); +    last  = start; +    while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { +        if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { +            printf ("Timeout\n"); +            return -1; +        } +        /* show that we're waiting */ +        if ((now - last) > 1000) {  /* every second */ +	    			putc ('.'); +            last = now; +        } +    } +    addr[0]=(FLASH_WORD_SIZE)0x00500050; +	return 0; +} + +/*----------------------------------------------------------------------- + */ + +int	flash_erase (flash_info_t *info, int s_first, int s_last) +{ +	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); +	volatile FLASH_WORD_SIZE *addr2; +	int flag, prot, sect, l_sect; +	int i; + + +	if ((s_first < 0) || (s_first > s_last)) { +		if (info->flash_id == FLASH_UNKNOWN) { +			printf ("- missing\n"); +		} else { +			printf ("- no sectors to erase\n"); +		} +		return 1; +	} + +	if (info->flash_id == FLASH_UNKNOWN) { +		printf ("Can't erase unknown flash type - aborted\n"); +		return 1; +	} + +	prot = 0; +	for (sect=s_first; sect<=s_last; ++sect) { +		if (info->protect[sect]) { +			prot++; +		} +	} + +	if (prot) { +		printf ("- Warning: %d protected sectors will not be erased!\n", +			prot); +	} else { +		printf ("\n"); +	} + +	l_sect = -1; + +	/* Disable interrupts which might cause a timeout here */ +	flag = disable_interrupts(); + +	/* Start erase on unprotected sectors */ +	for (sect = s_first; sect<=s_last; sect++) { +		if (info->protect[sect] == 0) {	/* not protected */ +			addr2 = (FLASH_WORD_SIZE *)(info->start[sect]); +			/*  printf("Erasing sector %p\n", addr2); */ /* CLH */ +	    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { +				addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; +				addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; +				addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; +				addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; +				addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; +				addr2[0] = (FLASH_WORD_SIZE)0x00500050;  /* block erase */ +				for (i=0; i<50; i++) +					udelay(1000);  /* wait 1 ms */ +		    wait_for_DQ7(info, sect); +		  } +		  else { +		  	if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){ +					addr2[0] = (FLASH_WORD_SIZE)0x00600060;  /* unlock sector */ +					addr2[0] = (FLASH_WORD_SIZE)0x00D000D0;  /* sector erase */ +			    intel_wait_for_DQ7(info, sect); +					addr2[0] = (FLASH_WORD_SIZE)0x00200020;  /* sector erase */ +					addr2[0] = (FLASH_WORD_SIZE)0x00D000D0;  /* sector erase */ +			    intel_wait_for_DQ7(info, sect); +				} +				else { +					addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; +					addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; +					addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; +					addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; +					addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; +					addr2[0] = (FLASH_WORD_SIZE)0x00300030;  /* sector erase */ +			    wait_for_DQ7(info, sect); +		 		} +		 } +		 l_sect = sect; +		    /* +		     * Wait for each sector to complete, it's more +		     * reliable.  According to AMD Spec, you must +		     * issue all erase commands within a specified +		     * timeout.  This has been seen to fail, especially +		     * if printf()s are included (for debug)!! +		     */ +		 /*   wait_for_DQ7(info, sect); */ +		} +	} + +	/* re-enable interrupts if necessary */ +	if (flag) +		enable_interrupts(); + +	/* wait at least 80us - let's wait 1 ms */ +	udelay (1000); + +#if 0 +	/* +	 * We wait for the last triggered sector +	 */ +	if (l_sect < 0) +		goto DONE; +	wait_for_DQ7(info, l_sect); + +DONE: +#endif +	/* reset to read mode */ +	addr = (FLASH_WORD_SIZE *)info->start[0]; +	addr[0] = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */ + +	printf (" done\n"); +	return 0; +} + +void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt) +{ +	int i; +	volatile FLASH_WORD_SIZE *addr2; +	long c; +	c= (long)cnt; +	for(i=info->sector_count-1;i>0;i--) +	{ +		if(addr>=info->start[i]) +			break; +	} +	do { +		addr2 = (FLASH_WORD_SIZE *)(info->start[i]); +		addr2[0] = (FLASH_WORD_SIZE)0x00600060;  /* unlock sector setup */ +		addr2[0] = (FLASH_WORD_SIZE)0x00D000D0;  /* unlock sector */ +		intel_wait_for_DQ7(info, i); +		i++; +		c-=(info->start[i]-info->start[i-1]); +	}while(c>0); + + +} + + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ + +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ +	ulong cp, wp, data; +	int i, l, rc; + +	if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){ +		unlock_intel_sectors(info,addr,cnt); +	} +	wp = (addr & ~3);	/* get lower word aligned address */ +	/* +	 * handle unaligned start bytes +	 */ +	if ((l = addr - wp) != 0) { +		data = 0; +		for (i=0, cp=wp; i<l; ++i, ++cp) { +			data = (data << 8) | (*(uchar *)cp); +		} +		for (; i<4 && cnt>0; ++i) { +			data = (data << 8) | *src++; +			--cnt; +			++cp; +		} +		for (; cnt==0 && i<4; ++i, ++cp) { +			data = (data << 8) | (*(uchar *)cp); +		} + +		if ((rc = write_word(info, wp, data)) != 0) { +			return (rc); +		} +		wp += 4; +	} + +	/* +	 * handle word aligned part +	 */ +	while (cnt >= 4) { +		data = 0; +		for (i=0; i<4; ++i) { +			data = (data << 8) | *src++; +		} +		if ((rc = write_word(info, wp, data)) != 0) { +			return (rc); +		} +		wp  += 4; +		if((wp % 0x10000)==0) +			printf("."); /* show Progress */ +		cnt -= 4; +	} + +	if (cnt == 0) { +		return (0); +	} + +	/* +	 * handle unaligned tail bytes +	 */ +	data = 0; +	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { +		data = (data << 8) | *src++; +		--cnt; +	} +	for (; i<4; ++i, ++cp) { +		data = (data << 8) | (*(uchar *)cp); +	} +	rc=write_word(info, wp, data); +	return rc; +} + +/*----------------------------------------------------------------------- + * Write a word to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000; + +static int write_word (flash_info_t *info, ulong dest, ulong data) +{ +	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); +	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; + 	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; +	ulong start; +	int flag; +	int i; + +	/* Check if Flash is (sufficiently) erased */ +	if ((*((volatile FLASH_WORD_SIZE *)dest) & +		(FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { +		return (2); +	} +	/* Disable interrupts which might cause a timeout here */ +	flag = disable_interrupts(); +	for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) +	{ +		if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){ +			/* intel style writting */ +			dest2[i] = (FLASH_WORD_SIZE)0x00500050; +			dest2[i] = (FLASH_WORD_SIZE)0x00400040; +			*read_val++ = data2[i]; +			dest2[i] = data2[i]; +			if (flag) +				enable_interrupts(); +			/* data polling for D7 */ +			start = get_timer (0); +			udelay(10); +			while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) +			{ +				if (get_timer(start) > CFG_FLASH_WRITE_TOUT) +					return (1); +			} +			dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */ +			udelay(10); +			dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */ +			if(dest2[i]!=data2[i]) +				printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]); +		} +		else { +			addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; +			addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; +			addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; +			dest2[i] = data2[i]; +			/* re-enable interrupts if necessary */ +			if (flag) +				enable_interrupts(); +			/* data polling for D7 */ +			start = get_timer (0); +			while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != +				(data2[i] & (FLASH_WORD_SIZE)0x00800080)) { +				if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { +        				return (1); +				} +			} +		} +	} +	return (0); +} + +/*----------------------------------------------------------------------- + */ diff --git a/board/mpl/common/isa.c b/board/mpl/common/isa.c new file mode 100644 index 000000000..40731fc79 --- /dev/null +++ b/board/mpl/common/isa.c @@ -0,0 +1,469 @@ +/* + * (C) Copyright 2001 + * Denis Peter, MPL AG Switzerland + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * + * TODO: clean-up + */ + +#include <common.h> +#include <asm/processor.h> +#include <devices.h> +#include "isa.h" +#include "piix4_pci.h" +#include "kbd.h" +#include "video.h" + +extern int drv_isa_kbd_init (void); + +#undef	ISA_DEBUG + +#ifdef	ISA_DEBUG +#define	PRINTF(fmt,args...)	printf (fmt ,##args) +#else +#define PRINTF(fmt,args...) +#endif + +#ifndef	TRUE +#define TRUE            1 +#endif +#ifndef FALSE +#define FALSE           0 +#endif + + + +/* fdc (logical device 0) */ +const SIO_LOGDEV_TABLE sio_fdc[] = { +	{0x60, 3},			/* set IO to FDPort (3F0) */ +	{0x61, 0xF0},		/* set IO to FDPort (3F0) */ +	{0x70, 06},			/* set IRQ 6 for FDPort */ +	{0x74, 02},			/* set DMA 2 for FDPort */ +	{0xF0, 0x05},		/* set to PS2 type */ +	{0xF1, 0x00},	  /* default value */ +	{0x30, 1},			/* and activate the device */ +	{0xFF, 0}				/* end of device table */ +}; +/* paralell port (logical device 3) */ +const SIO_LOGDEV_TABLE sio_pport[] = { +	{0x60, 3},			/* set IO to PPort (378) */ +	{0x61, 0x78},		/* set IO to PPort (378) */ +	{0x70, 07},			/* set IRQ 7 for PPort */ +	{0xF1, 00},			/* set PPort to normal */ +	{0x30, 1},			/* and activate the device */ +	{0xFF, 0}				/* end of device table */ +}; +/* paralell port (logical device 3) Floppy assigned to lpt */ +const SIO_LOGDEV_TABLE sio_pport_fdc[] = { +	{0x60, 3},			/* set IO to PPort (378) */ +	{0x61, 0x78},		/* set IO to PPort (378) */ +	{0x70, 07},			/* set IRQ 7 for PPort */ +	{0xF1, 02},			/* set PPort to Floppy */ +	{0x30, 1},			/* and activate the device */ +	{0xFF, 0}				/* end of device table */ +}; +/* uart 1 (logical device 4) */ +const SIO_LOGDEV_TABLE sio_com1[] = { +	{0x60, 3},			/* set IO to COM1 (3F8) */ +	{0x61, 0xF8},		/* set IO to COM1 (3F8) */ +	{0x70, 04},			/* set IRQ 4 for COM1 */ +	{0x30, 1},			/* and activate the device */ +	{0xFF, 0}				/* end of device table */ +}; +/* uart 2 (logical device 5) */ +const SIO_LOGDEV_TABLE sio_com2[] = { +	{0x60, 2},			/* set IO to COM2 (2F8) */ +	{0x61, 0xF8},		/* set IO to COM2 (2F8) */ +	{0x70, 03},			/* set IRQ 3 for COM2 */ +	{0x30, 1},			/* and activate the device */ +	{0xFF, 0}				/* end of device table */ +}; + +/* keyboard controller (logical device 7) */ +const SIO_LOGDEV_TABLE sio_keyboard[] = { +	{0x70, 1},			/* set IRQ 1 for keyboard */ +	{0x72, 12},			/* set IRQ 12 for mouse */ +	{0xF0, 0},			/* disable Port92 (this is a PowerPC!!) */ +	{0x30, 1},			/* and activate the device */ +	{0xFF, 0}				/* end of device table */ +}; + + +/******************************************************************************* +* Config SuperIO FDC37C672 +********************************************************************************/ +unsigned char open_cfg_super_IO(int address) +{ +	out8(CFG_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */ +	if(in8(CFG_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */ +		return TRUE; +	else +		return FALSE; +} + +void close_cfg_super_IO(int address) +{ +	out8(CFG_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */ +} + + +unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr) +{ +	/* assuming config reg is open */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */ +	return in8(CFG_ISA_IO_BASE_ADDRESS | address | 1); +} + +void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data) +{ +	/* assuming config reg is open */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */ +	out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */ +} + +void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev) +{ +	while (ldt->index != 0xFF) { +		write_cfg_super_IO(SIO_CFG_PORT, ldev, ldt->index, ldt->val); +		ldt++; +	} /* endwhile */ +} + +void isa_sio_loadtable(void) +{ +	unsigned char *s = getenv("floppy"); +	/* setup Floppy device 0*/ +	isa_write_table((SIO_LOGDEV_TABLE *)&sio_fdc,0); +	/* setup parallel port device 3 */ +	if(s && !strncmp(s, "lpt", 3)) { +		printf("SIO:   Floppy assigned to LPT\n"); +		/* floppy is assigned to the LPT */ +		isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport_fdc,3); +	} +	else { +		/*printf("Floppy assigned to internal port\n");*/ +		isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport,3); +	} +	/* setup Com1 port device 4 */ +	isa_write_table((SIO_LOGDEV_TABLE *)&sio_com1,4); +	/* setup Com2 port device 5 */ +	isa_write_table((SIO_LOGDEV_TABLE *)&sio_com2,5); +	/* setup keyboards device 7 */ +	isa_write_table((SIO_LOGDEV_TABLE *)&sio_keyboard,7); +} + + +void isa_sio_setup(void) +{ +	if(open_cfg_super_IO(SIO_CFG_PORT)==TRUE) +	{ +		isa_sio_loadtable(); +		close_cfg_super_IO(0x3F0); +	} +} + + + +/****************************************************************************** + * IRQ Controller + * we use the Vector mode + */ + +struct	isa_irq_action { +	 interrupt_handler_t *handler; +	 void *arg; +	 int count; +}; + +static struct isa_irq_action isa_irqs[16]; + + +/* + * This contains the irq mask for both 8259A irq controllers, + */ +static unsigned int cached_irq_mask = 0xffff; + +#define cached_imr1	(unsigned char)cached_irq_mask +#define cached_imr2	(unsigned char)(cached_irq_mask>>8) +#define IMR_1		CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1 +#define IMR_2		CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1 +#define ICW1_1	CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1 +#define ICW1_2	CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1 +#define ICW2_1	CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2 +#define ICW2_2	CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2 +#define ICW3_1	ICW2_1 +#define ICW3_2	ICW2_2 +#define ICW4_1	ICW2_1 +#define ICW4_2	ICW2_2 +#define ISR_1		ICW1_1 +#define ISR_2		ICW1_2 + + +void disable_8259A_irq(unsigned int irq) +{ +	unsigned int mask = 1 << irq; + +	cached_irq_mask |= mask; +	if (irq & 8) +		out8(IMR_2,cached_imr2); +	else +		out8(IMR_1,cached_imr1); +} + +void enable_8259A_irq(unsigned int irq) +{ +	unsigned int mask = ~(1 << irq); + +	cached_irq_mask &= mask; +	if (irq & 8) +		out8(IMR_2,cached_imr2); +	else +		out8(IMR_1,cached_imr1); +} +/* +int i8259A_irq_pending(unsigned int irq) +{ +	unsigned int mask = 1<<irq; +	int ret; + +	if (irq < 8) +		ret = inb(0x20) & mask; +	else +		ret = inb(0xA0) & (mask >> 8); +	spin_unlock_irqrestore(&i8259A_lock, flags); + +	return ret; +} +*/ + +/* + * This function assumes to be called rarely. Switching between + * 8259A registers is slow. + */ +int i8259A_irq_real(unsigned int irq) +{ +	int value; +	int irqmask = 1<<irq; + +	if (irq < 8) { +		out8(ISR_1,0x0B);		/* ISR register */ +		value = in8(ISR_1) & irqmask; +		out8(ISR_1,0x0A);		/* back to the IRR register */ +		return value; +	} +	out8(ISR_2,0x0B);		/* ISR register */ +	value = in8(ISR_2) & (irqmask >> 8); +	out8(ISR_2,0x0A);		/* back to the IRR register */ +	return value; +} + +/* + * Careful! The 8259A is a fragile beast, it pretty + * much _has_ to be done exactly like this (mask it + * first, _then_ send the EOI, and the order of EOI + * to the two 8259s is important! + */ +void mask_and_ack_8259A(unsigned int irq) +{ +	unsigned int irqmask = 1 << irq; +	unsigned int temp_irqmask = cached_irq_mask; +	/* +	 * Lightweight spurious IRQ detection. We do not want +	 * to overdo spurious IRQ handling - it's usually a sign +	 * of hardware problems, so we only do the checks we can +	 * do without slowing down good hardware unnecesserily. +	 * +	 * Note that IRQ7 and IRQ15 (the two spurious IRQs +	 * usually resulting from the 8259A-1|2 PICs) occur +	 * even if the IRQ is masked in the 8259A. Thus we +	 * can check spurious 8259A IRQs without doing the +	 * quite slow i8259A_irq_real() call for every IRQ. +	 * This does not cover 100% of spurious interrupts, +	 * but should be enough to warn the user that there +	 * is something bad going on ... +	 */ +	if (temp_irqmask & irqmask) +		goto spurious_8259A_irq; +	temp_irqmask |= irqmask; + +handle_real_irq: +	if (irq & 8) { +		in8(IMR_2);		/* DUMMY - (do we need this?) */ +		out8(IMR_2,(unsigned char)(temp_irqmask>>8)); +		out8(ISR_2,0x60+(irq&7));/* 'Specific EOI' to slave */ +		out8(ISR_1,0x62);	/* 'Specific EOI' to master-IRQ2 */ +		out8(IMR_2,cached_imr2); /* turn it on again */ +	} else { +		in8(IMR_1);		/* DUMMY - (do we need this?) */ +		out8(IMR_1,(unsigned char)temp_irqmask); +		out8(ISR_1,0x60+irq);	/* 'Specific EOI' to master */ +		out8(IMR_1,cached_imr1); /* turn it on again */ +	} + +	return; + +spurious_8259A_irq: +	/* +	 * this is the slow path - should happen rarely. +	 */ +	if (i8259A_irq_real(irq)) +		/* +		 * oops, the IRQ _is_ in service according to the +		 * 8259A - not spurious, go handle it. +		 */ +		goto handle_real_irq; + +	{ +		static int spurious_irq_mask; +		/* +		 * At this point we can be sure the IRQ is spurious, +		 * lets ACK and report it. [once per IRQ] +		 */ +		if (!(spurious_irq_mask & irqmask)) { +			PRINTF("spurious 8259A interrupt: IRQ%d.\n", irq); +			spurious_irq_mask |= irqmask; +		} +		/* irq_err_count++; */ +		/* +		 * Theoretically we do not have to handle this IRQ, +		 * but in Linux this does not cause problems and is +		 * simpler for us. +		 */ +		goto handle_real_irq; +	} +} + +void init_8259A(void) +{ +	out8(IMR_1,0xff);	/* mask all of 8259A-1 */ +	out8(IMR_2,0xff);	/* mask all of 8259A-2 */ + +	out8(ICW1_1,0x11);	/* ICW1: select 8259A-1 init */ +	out8(ICW2_1,0x20 + 0);	/* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */ +	out8(ICW3_1,0x04);	/* 8259A-1 (the master) has a slave on IR2 */ +	out8(ICW4_1,0x01);	/* master expects normal EOI */ +	out8(ICW1_2,0x11);	/* ICW2: select 8259A-2 init */ +	out8(ICW2_2,0x20 + 8);	/* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */ +	out8(ICW3_2,0x02);	/* 8259A-2 is a slave on master's IR2 */ +	out8(ICW4_2,0x01);	/* (slave's support for AEOI in flat mode +				    is to be investigated) */ +	udelay(10000);		/* wait for 8259A to initialize */ +	out8(IMR_1,cached_imr1);	/* restore master IRQ mask */ +	udelay(10000);		/* wait for 8259A to initialize */ +	out8(IMR_2,cached_imr2);	/* restore slave IRQ mask */ +} + + +#define PCI_INT_ACK_ADDR 0xEED00000 + +int handle_isa_int(void) +{ +	unsigned long irqack; +	unsigned char isr1,isr2,irq; +	/* first we acknokledge the int via the PCI bus */ +	irqack=in32(PCI_INT_ACK_ADDR); +	/* now we get the ISRs */ +	isr2=in8(ISR_2); +	isr1=in8(ISR_1); +	irq=(unsigned char)irqack; +	if((irq==7)&&((isr1&0x80)==0)) { +		PRINTF("IRQ7 detected but not in ISR\n"); +	} +	else { +		/* we should handle cascaded interrupts here also */ +		/* printf("ISA Irq %d\n",irq); */ +		isa_irqs[irq].count++; +  	if (isa_irqs[irq].handler != NULL) +  		(*isa_irqs[irq].handler)(isa_irqs[irq].arg);      /* call isr */ +  	else +  	{ +     	PRINTF ("bogus interrupt vector 0x%x\n", irq); +  	} +	} +	/* issue EOI instruction to clear the IRQ */ +	mask_and_ack_8259A(irq); +	return 0; +} + + + +/****************************************************************** + * Install and free an ISA interrupt handler. + */ + +void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg) +{ +  if (isa_irqs[vec].handler != NULL) { +   printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n", +           vec, (uint)handler, (uint)isa_irqs[vec].handler); +  } +  isa_irqs[vec].handler = handler; +  isa_irqs[vec].arg     = arg; +  enable_8259A_irq(vec); + 	PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask); + +} + +void isa_irq_free_handler(int vec) +{ +	disable_8259A_irq(vec); +  isa_irqs[vec].handler = NULL; +  isa_irqs[vec].arg     = NULL; + 	printf ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask); + +} + +/****************************************************************************/ +void isa_init_irq_contr(void) +{ +	int i; +	/* disable all Interrupts */ +	/* first write icws controller 1 */ +	for(i=0;i<16;i++) +	{ +		isa_irqs[i].handler=NULL; +		isa_irqs[i].arg=NULL; +		isa_irqs[i].count=0; +	} +	init_8259A(); +	out8(IMR_2,0xFF); +} + + +/****************************************************************** + * Init the ISA bus and devices. + */ + + +int isa_init(void) +{ +	isa_sio_setup(); +	drv_isa_kbd_init(); +	return 0; +} + + + diff --git a/board/mpl/common/kbd.c b/board/mpl/common/kbd.c new file mode 100644 index 000000000..5b87cdb53 --- /dev/null +++ b/board/mpl/common/kbd.c @@ -0,0 +1,655 @@ +/* + * (C) Copyright 2001 + * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * + * Source partly derived from: + * linux/drivers/char/pc_keyb.c + * + * + */ +#include <common.h> +#include <asm/processor.h> +#include <devices.h> +#include "isa.h" +#include "kbd.h" + + +unsigned char kbd_read_status(void); +unsigned char kbd_read_input(void); +void kbd_send_data(unsigned char data); +void disable_8259A_irq(unsigned int irq); +void enable_8259A_irq(unsigned int irq); + +/* used only by send_data - set by keyboard_interrupt */ + + +#undef KBG_DEBUG + +#ifdef KBG_DEBUG +#define	PRINTF(fmt,args...)	printf (fmt ,##args) +#else +#define PRINTF(fmt,args...) +#endif + +#define KBD_STAT_KOBF		0x01 +#define KBD_STAT_IBF		0x02 +#define KBD_STAT_SYS		0x04 +#define KBD_STAT_CD			0x08 +#define KBD_STAT_LOCK		0x10 +#define KBD_STAT_MOBF		0x20 +#define KBD_STAT_TI_OUT	0x40 +#define KBD_STAT_PARERR	0x80 + +#define KBD_INIT_TIMEOUT 1000		/* Timeout in ms for initializing the keyboard */ +#define KBC_TIMEOUT 250			/* Timeout in ms for sending to keyboard controller */ +#define KBD_TIMEOUT 2000		/* Timeout in ms for keyboard command acknowledge */ +/* + *	Keyboard Controller Commands + */ + +#define KBD_CCMD_READ_MODE			0x20	/* Read mode bits */ +#define KBD_CCMD_WRITE_MODE			0x60	/* Write mode bits */ +#define KBD_CCMD_GET_VERSION		0xA1	/* Get controller version */ +#define KBD_CCMD_MOUSE_DISABLE	0xA7	/* Disable mouse interface */ +#define KBD_CCMD_MOUSE_ENABLE		0xA8	/* Enable mouse interface */ +#define KBD_CCMD_TEST_MOUSE			0xA9	/* Mouse interface test */ +#define KBD_CCMD_SELF_TEST			0xAA	/* Controller self test */ +#define KBD_CCMD_KBD_TEST				0xAB	/* Keyboard interface test */ +#define KBD_CCMD_KBD_DISABLE		0xAD	/* Keyboard interface disable */ +#define KBD_CCMD_KBD_ENABLE			0xAE	/* Keyboard interface enable */ +#define KBD_CCMD_WRITE_AUX_OBUF	0xD3    /* Write to output buffer as if +					   initiated by the auxiliary device */ +#define KBD_CCMD_WRITE_MOUSE		0xD4	/* Write the following byte to the mouse */ + +/* + *	Keyboard Commands + */ + +#define KBD_CMD_SET_LEDS				0xED	/* Set keyboard leds */ +#define KBD_CMD_SET_RATE				0xF3	/* Set typematic rate */ +#define KBD_CMD_ENABLE					0xF4	/* Enable scanning */ +#define KBD_CMD_DISABLE					0xF5	/* Disable scanning */ +#define KBD_CMD_RESET						0xFF	/* Reset */ + +/* + *	Keyboard Replies + */ + +#define KBD_REPLY_POR						0xAA	/* Power on reset */ +#define KBD_REPLY_ACK						0xFA	/* Command ACK */ +#define KBD_REPLY_RESEND				0xFE	/* Command NACK, send the cmd again */ + +/* + *	Status Register Bits + */ + +#define KBD_STAT_OBF 						0x01	/* Keyboard output buffer full */ +#define KBD_STAT_IBF 						0x02	/* Keyboard input buffer full */ +#define KBD_STAT_SELFTEST				0x04	/* Self test successful */ +#define KBD_STAT_CMD						0x08	/* Last write was a command write (0=data) */ +#define KBD_STAT_UNLOCKED				0x10	/* Zero if keyboard locked */ +#define KBD_STAT_MOUSE_OBF			0x20	/* Mouse output buffer full */ +#define KBD_STAT_GTO 						0x40	/* General receive/xmit timeout */ +#define KBD_STAT_PERR 					0x80	/* Parity error */ + +#define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF) + +/* + *	Controller Mode Register Bits + */ + +#define KBD_MODE_KBD_INT				0x01	/* Keyboard data generate IRQ1 */ +#define KBD_MODE_MOUSE_INT			0x02	/* Mouse data generate IRQ12 */ +#define KBD_MODE_SYS 						0x04	/* The system flag (?) */ +#define KBD_MODE_NO_KEYLOCK			0x08	/* The keylock doesn't affect the keyboard if set */ +#define KBD_MODE_DISABLE_KBD		0x10	/* Disable keyboard interface */ +#define KBD_MODE_DISABLE_MOUSE	0x20	/* Disable mouse interface */ +#define KBD_MODE_KCC 						0x40	/* Scan code conversion to PC format */ +#define KBD_MODE_RFU						0x80 + + +#define KDB_DATA_PORT			0x60 +#define KDB_COMMAND_PORT	0x64 + +#define 	LED_SCR		0x01	/* scroll lock led */ +#define 	LED_CAP		0x04	/* caps lock led */ +#define 	LED_NUM		0x02	/* num lock led */ + +#define 	KBD_BUFFER_LEN 0x20  /* size of the keyboardbuffer */ + + + + +static volatile char kbd_buffer[KBD_BUFFER_LEN]; +static volatile int in_pointer = 0; +static volatile int out_pointer = 0; + + +static unsigned char num_lock = 0; +static unsigned char caps_lock = 0; +static unsigned char scroll_lock = 0; +static unsigned char shift = 0; +static unsigned char ctrl = 0; +static unsigned char alt = 0; +static unsigned char e0 = 0; +static unsigned char leds = 0; + +#define DEVNAME "kbd" + +/* Simple translation table for the keys */ + +static unsigned char kbd_plain_xlate[] = { +	0xff,0x1b, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=','\b','\t',	/* 0x00 - 0x0f */ +	 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']','\r',0xff, 'a', 's',	/* 0x10 - 0x1f */ +	 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';','\'', '`',0xff,'\\', 'z', 'x', 'c', 'v',	/* 0x20 - 0x2f */ +	 'b', 'n', 'm', ',', '.', '/',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff,	/* 0x30 - 0x3f */ +	0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1',	/* 0x40 - 0x4f */ +	 '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,  /* 0x50 - 0x5F */ +	'\r',0xff,0xff +	}; + +static unsigned char kbd_shift_xlate[] = { +	0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t',	/* 0x00 - 0x0f */ +	 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S',	/* 0x10 - 0x1f */ +	 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', '~',0xff, '|', 'Z', 'X', 'C', 'V',	/* 0x20 - 0x2f */ +	 'B', 'N', 'M', '<', '>', '?',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff,	/* 0x30 - 0x3f */ +	0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1',	/* 0x40 - 0x4f */ +	 '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,  /* 0x50 - 0x5F */ +	'\r',0xff,0xff +	}; + +static unsigned char kbd_ctrl_xlate[] = { +	0xff,0x1b, '1',0x00, '3', '4', '5',0x1E, '7', '8', '9', '0',0x1F, '=','\b','\t',	/* 0x00 - 0x0f */ +	0x11,0x17,0x05,0x12,0x14,0x18,0x15,0x09,0x0f,0x10,0x1b,0x1d,'\n',0xff,0x01,0x13,	/* 0x10 - 0x1f */ +	0x04,0x06,0x08,0x09,0x0a,0x0b,0x0c, ';','\'', '~',0x00,0x1c,0x1a,0x18,0x03,0x16,	/* 0x20 - 0x2f */ +	0x02,0x0e,0x0d, '<', '>', '?',0xff,0xff,0xff,0x00,0xff,0xff,0xff,0xff,0xff,0xff,	/* 0x30 - 0x3f */ +	0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1',	/* 0x40 - 0x4f */ +	 '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,  /* 0x50 - 0x5F */ +	'\r',0xff,0xff +	}; + +/****************************************************************** + * Init + ******************************************************************/ +int isa_kbd_init(void) +{ +	char* result; +	result=kbd_initialize(); +	if(result==NULL) { +		PRINTF("AT Keyboard initialized\n"); +		irq_install_handler(25, (interrupt_handler_t *)handle_isa_int, NULL); +		isa_irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL); +		return (1); +	} +	else { +		printf("%s\n",result); +		return (-1); +	} +} + +#ifdef CFG_CONSOLE_OVERWRITE_ROUTINE +extern int overwrite_console (void); +#else +int overwrite_console (void) +{ +	return (0); +} +#endif + +int drv_isa_kbd_init (void) +{ +	int error; +  	device_t kbddev ; +	char *stdinname  = getenv ("stdin"); + +	if(isa_kbd_init()==-1) +		return -1; +  	memset (&kbddev, 0, sizeof(kbddev)); +  	strcpy(kbddev.name, DEVNAME); +  	kbddev.flags =  DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; +  	kbddev.putc = NULL ; +	kbddev.puts = NULL ; +	kbddev.getc = kbd_getc ; +	kbddev.tstc = kbd_testc ; + + 	error = device_register (&kbddev); +	if(error==0) { +		/* check if this is the standard input device */ +		if(strcmp(stdinname,DEVNAME)==0) { +			/* reassign the console */ +			if(overwrite_console()) { +				return 1; +			} +			error=console_assign(stdin,DEVNAME); +			if(error==0) +				return 1; +			else +				return error; +		} +		return 1; +	} +	return error; +} + +/****************************************************************** + * Queue handling + ******************************************************************/ +/* puts character in the queue and sets up the in and out pointer */ +void kbd_put_queue(char data) +{ +	if((in_pointer+1)==KBD_BUFFER_LEN) { +		if(out_pointer==0) { +			return; /* buffer full */ +		} else{ +			in_pointer=0; +		} +	} else { +		if((in_pointer+1)==out_pointer) +			return; /* buffer full */ +		in_pointer++; +	} +	kbd_buffer[in_pointer]=data; +	return; +} + +/* test if a character is in the queue */ +int kbd_testc(void) +{ +	if(in_pointer==out_pointer) +		return(0); /* no data */ +	else +		return(1); +} +/* gets the character from the queue */ +int kbd_getc(void) +{ +	char c; +	while(in_pointer==out_pointer); +	if((out_pointer+1)==KBD_BUFFER_LEN) +		out_pointer=0; +	else +		out_pointer++; +	c=kbd_buffer[out_pointer]; +	return (int)c; + +} + + +/* set LEDs */ + +void kbd_set_leds(void) +{ +	if(caps_lock==0) +		leds&=~LED_CAP; /* switch caps_lock off */ +	else +		leds|=LED_CAP; /* switch on LED */ +	if(num_lock==0) +		leds&=~LED_NUM; /* switch LED off */ +	else +		leds|=LED_NUM;  /* switch on LED */ +	if(scroll_lock==0) +		leds&=~LED_SCR; /* switch LED off */ +	else +		leds|=LED_SCR; /* switch on LED */ +	kbd_send_data(KBD_CMD_SET_LEDS); +	kbd_send_data(leds); +} + + +void handle_keyboard_event(unsigned char scancode) +{ +	unsigned char keycode; + +	/*  Convert scancode to keycode */ +	PRINTF("scancode %x\n",scancode); +	if(scancode==0xe0) { +		e0=1; /* special charakters */ +		return; +	} +	if(e0==1) { +		e0=0; /* delete flag */ +		if(!(	((scancode&0x7F)==0x38)|| /* the right ctrl key */ +					((scancode&0x7F)==0x1D)|| /* the right alt key */ +					((scancode&0x7F)==0x35)||	/* the right '/' key */ +					((scancode&0x7F)==0x1C) ))  /* the right enter key */ +			/* we swallow unknown e0 codes */ +			return; +	} +	/* special cntrl keys */ +	switch(scancode) +	{ +		case 0x2A: +		case 0x36: /* shift pressed */ +			shift=1; +			return; /* do nothing else */ +		case 0xAA: +		case 0xB6: /* shift released */ +			shift=0; +			return; /* do nothing else */ +		case 0x38: /* alt pressed */ +			alt=1; +			return; /* do nothing else */ +		case 0xB8: /* alt released */ +			alt=0; +			return; /* do nothing else */ +		case 0x1d: /* ctrl pressed */ +			ctrl=1; +			return; /* do nothing else */ +		case 0x9d: /* ctrl released */ +			ctrl=0; +			return; /* do nothing else */ +		case 0x46: /* scrollock pressed */ +			scroll_lock=~scroll_lock; +			kbd_set_leds(); +			return; /* do nothing else */ +		case 0x3A: /* capslock pressed */ +			caps_lock=~caps_lock; +			kbd_set_leds(); +			return; +		case 0x45: /* numlock pressed */ +			num_lock=~num_lock; +			kbd_set_leds(); +			return; +		case 0xC6: /* scroll lock released */ +		case 0xC5: /* num lock released */ +		case 0xBA: /* caps lock released */ +			return; /* just swallow */ +	} +	if((scancode&0x80)==0x80) /* key released */ +		return; +	/* now, decide which table we need */ +	if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */ +		PRINTF("unkown scancode %X\n",scancode); +		return; /* swallow it */ +	} +	/* setup plain code first */ +	keycode=kbd_plain_xlate[scancode]; +	if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */ +		if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */ +			PRINTF("unkown caps-locked scancode %X\n",scancode); +			return; /* swallow it */ +		} +		keycode=kbd_shift_xlate[scancode]; +		if(keycode<'A') { /* we only want the alphas capital */ +			keycode=kbd_plain_xlate[scancode]; +		} +	} +	if(shift==1) { /* shift overwrites caps_lock */ +		if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */ +			PRINTF("unkown shifted scancode %X\n",scancode); +			return; /* swallow it */ +		} +		keycode=kbd_shift_xlate[scancode]; +	} +	if(ctrl==1) { /* ctrl overwrites caps_lock and shift */ +		if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */ +			PRINTF("unkown ctrl scancode %X\n",scancode); +			return; /* swallow it */ +		} +		keycode=kbd_ctrl_xlate[scancode]; +	} +	/* check if valid keycode */ +	if(keycode==0xff) { +		PRINTF("unkown scancode %X\n",scancode); +		return; /* swallow unknown codes */ +	} + +	kbd_put_queue(keycode); +	PRINTF("%x\n",keycode); +} + +/* + * This reads the keyboard status port, and does the + * appropriate action. + * + */ +unsigned char handle_kbd_event(void) +{ +	unsigned char status = kbd_read_status(); +	unsigned int work = 10000; + +	while ((--work > 0) && (status & KBD_STAT_OBF)) { +		unsigned char scancode; + +		scancode = kbd_read_input(); + +		/* Error bytes must be ignored to make the +		   Synaptics touchpads compaq use work */ +		/* Ignore error bytes */ +		if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR))) +		{ +			if (status & KBD_STAT_MOUSE_OBF) +				; /* not supported: handle_mouse_event(scancode); */ +			else +				handle_keyboard_event(scancode); +		} +		status = kbd_read_status(); +	} +	if (!work) +		PRINTF("pc_keyb: controller jammed (0x%02X).\n", status); +	return status; +} + + + +/****************************************************************************** + * Lowlevel Part of keyboard section + */ +unsigned char kbd_read_status(void) +{ +	return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT)); +} + +unsigned char kbd_read_input(void) +{ +	return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT)); +} + +void kbd_write_command(unsigned char cmd) +{ +	out8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd); +} + +void kbd_write_output(unsigned char data) +{ +	out8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data); +} + +int kbd_read_data(void) +{ +	int val; +	unsigned char status; + +	val=-1; +	status = kbd_read_status(); +	if (status & KBD_STAT_OBF) { +		val = kbd_read_input(); +		if (status & (KBD_STAT_GTO | KBD_STAT_PERR)) +			val = -2; +	} +	return val; +} + +int kbd_wait_for_input(void) +{ +	unsigned long timeout; +	int val; + +	timeout = KBD_TIMEOUT; +	val=kbd_read_data(); +	while(val < 0) +	{ +		if(timeout--==0) +			return -1; +		udelay(1000); +		val=kbd_read_data(); +	} +	return val; +} + + +int kb_wait(void) +{ +	unsigned long timeout = KBC_TIMEOUT * 10; + +	do { +		unsigned char status = handle_kbd_event(); +		if (!(status & KBD_STAT_IBF)) +			return 0; /* ok */ +		udelay(1000); +		timeout--; +	} while (timeout); +	return 1; +} + +void kbd_write_command_w(int data) +{ +	if(kb_wait()) +		PRINTF("timeout in kbd_write_command_w\n"); +	kbd_write_command(data); +} + +void kbd_write_output_w(int data) +{ +	if(kb_wait()) +		PRINTF("timeout in kbd_write_output_w\n"); +	kbd_write_output(data); +} + +void kbd_send_data(unsigned char data) +{ +	unsigned char status; +	disable_8259A_irq(1); /* disable interrupt */ +	kbd_write_output_w(data); +	status = kbd_wait_for_input(); +	if (status == KBD_REPLY_ACK) +		enable_8259A_irq(1); /* enable interrupt */ +} + + +char * kbd_initialize(void) +{ +	int status; + +	in_pointer = 0; /* delete in Buffer */ +	out_pointer = 0; +	/* +	 * Test the keyboard interface. +	 * This seems to be the only way to get it going. +	 * If the test is successful a x55 is placed in the input buffer. +	 */ +	kbd_write_command_w(KBD_CCMD_SELF_TEST); +	if (kbd_wait_for_input() != 0x55) +		return "Kbd:   failed self test"; +	/* +	 * Perform a keyboard interface test.  This causes the controller +	 * to test the keyboard clock and data lines.  The results of the +	 * test are placed in the input buffer. +	 */ +	kbd_write_command_w(KBD_CCMD_KBD_TEST); +	if (kbd_wait_for_input() != 0x00) +		return "Kbd:   interface failed self test"; +	/* +	 * Enable the keyboard by allowing the keyboard clock to run. +	 */ +	kbd_write_command_w(KBD_CCMD_KBD_ENABLE); +	status = kbd_wait_for_input(); +	/* +	 * Reset keyboard. If the read times out +	 * then the assumption is that no keyboard is +	 * plugged into the machine. +	 * This defaults the keyboard to scan-code set 2. +	 * +	 * Set up to try again if the keyboard asks for RESEND. +	 */ +	do { +		kbd_write_output_w(KBD_CMD_RESET); +		status = kbd_wait_for_input(); +		if (status == KBD_REPLY_ACK) +			break; +		if (status != KBD_REPLY_RESEND) +		{ +			PRINTF("status: %X\n",status); +			return "Kbd:   reset failed, no ACK"; +		} +	} while (1); +	if (kbd_wait_for_input() != KBD_REPLY_POR) +		return "Kbd:   reset failed, no POR"; + +	/* +	 * Set keyboard controller mode. During this, the keyboard should be +	 * in the disabled state. +	 * +	 * Set up to try again if the keyboard asks for RESEND. +	 */ +	do { +		kbd_write_output_w(KBD_CMD_DISABLE); +		status = kbd_wait_for_input(); +		if (status == KBD_REPLY_ACK) +			break; +		if (status != KBD_REPLY_RESEND) +			return "Kbd:   disable keyboard: no ACK"; +	} while (1); + +	kbd_write_command_w(KBD_CCMD_WRITE_MODE); +	kbd_write_output_w(KBD_MODE_KBD_INT +			      | KBD_MODE_SYS +			      | KBD_MODE_DISABLE_MOUSE +			      | KBD_MODE_KCC); + +	/* ibm powerpc portables need this to use scan-code set 1 -- Cort */ +	kbd_write_command_w(KBD_CCMD_READ_MODE); +	if (!(kbd_wait_for_input() & KBD_MODE_KCC)) { +		/* +		 * If the controller does not support conversion, +		 * Set the keyboard to scan-code set 1. +		 */ +		kbd_write_output_w(0xF0); +		kbd_wait_for_input(); +		kbd_write_output_w(0x01); +		kbd_wait_for_input(); +	} +	kbd_write_output_w(KBD_CMD_ENABLE); +	if (kbd_wait_for_input() != KBD_REPLY_ACK) +		return "Kbd:   enable keyboard: no ACK"; + +	/* +	 * Finally, set the typematic rate to maximum. +	 */ +	kbd_write_output_w(KBD_CMD_SET_RATE); +	if (kbd_wait_for_input() != KBD_REPLY_ACK) +		return "Kbd:   Set rate: no ACK"; +	kbd_write_output_w(0x00); +	if (kbd_wait_for_input() != KBD_REPLY_ACK) +		return "Kbd:   Set rate: no ACK"; +	return NULL; +} + +void kbd_interrupt(void) +{ +	handle_kbd_event(); +} + + + +/* eof */ + diff --git a/board/mpl/common/usb_uhci.c b/board/mpl/common/usb_uhci.c new file mode 100644 index 000000000..83624a9da --- /dev/null +++ b/board/mpl/common/usb_uhci.c @@ -0,0 +1,1152 @@ +/* + * (C) Copyright 2001 + * Denis Peter, MPL AG Switzerland + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Note: Part of this code has been derived from linux + * + */ + +/********************************************************************** + * How it works: + * ------------- + * The framelist / Transfer descriptor / Queue Heads are similar like + * in the linux usb_uhci.c. + * + * During initialization, the following skeleton is allocated in init_skel: + * + *         framespecific           |           common chain + * + * framelist[] + * [  0 ]-----> TD ---------\ + * [  1 ]-----> TD ----------> TD ------> QH -------> QH -------> QH ---> NULL + *   ...        TD ---------/ + * [1023]-----> TD --------/ + * + *              ^^             ^^         ^^          ^^          ^^ + *              7 TDs for      1 TD for   Start of    Start of    End Chain + *              INT (2-128ms)  1ms-INT    CTRL Chain  BULK Chain + * + * + * Since this is a bootloader, the isochronous transfer descriptor have been removed. + * + * Interrupt Transfers. + * -------------------- + * For Interupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They + * will be inserted after the appropriate (depending the interval setting) skeleton TD. + * If an interrupt has been detected the dev->irqhandler is called. The status and number + * of transfered bytes is stored in dev->irq_status resp. dev->irq_act_len. If the + * dev->irqhandler returns 0, the interrupt TD is removed and disabled. If an 1 is returned, + * the interrupt TD will be reactivated. + * + * Control Transfers + * ----------------- + * Control Transfers are issued by filling the tmp_td with the appropriate data and connect + * them to the qh_cntrl queue header. Before other control/bulk transfers can be issued, + * the programm has to wait for completion. This does not allows asynchronous data transfer. + * + * Bulk Transfers + * -------------- + * Bulk Transfers are issued by filling the tmp_td with the appropriate data and connect + * them to the qh_bulk queue header. Before other control/bulk transfers can be issued, + * the programm has to wait for completion. This does not allows asynchronous data transfer. + * + * + */ + +#include <common.h> +#include <pci.h> + +#ifdef CONFIG_USB_UHCI + +#include <usb.h> +#include "usb_uhci.h" + +#define USB_MAX_TEMP_TD      128  /* number of temporary TDs for bulk and control transfers */ +#define USB_MAX_TEMP_INT_TD  32   /* number of temporary TDs for Interrupt transfers */ + + +#undef USB_UHCI_DEBUG + +#ifdef	USB_UHCI_DEBUG +#define	USB_UHCI_PRINTF(fmt,args...)	printf (fmt ,##args) +#else +#define USB_UHCI_PRINTF(fmt,args...) +#endif + + +static int irqvec = -1;            /* irq vector, if -1 uhci is stopped / reseted */ +unsigned int usb_base_addr;       /* base address */ + +static uhci_td_t td_int[8];        /* Interrupt Transfer descriptors */ +static uhci_qh_t qh_cntrl;         /* control Queue Head */ +static uhci_qh_t qh_bulk;          /*  bulk Queue Head */ +static uhci_qh_t qh_end;           /* end Queue Head */ +static uhci_td_t td_last;          /* last TD (linked with end chain) */ + +/* temporary tds */ +static uhci_td_t tmp_td[USB_MAX_TEMP_TD];          /* temporary bulk/control td's  */ +static uhci_td_t tmp_int_td[USB_MAX_TEMP_INT_TD];  /* temporary interrupt td's  */ + +static unsigned long framelist[1024] __attribute__ ((aligned (0x1000))); /* frame list */ + +static struct virt_root_hub rh;   /* struct for root hub */ + +/********************************************************************** + * some forward decleration + */ +int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, +						void *buffer, int transfer_len,struct devrequest *setup); + +/* fill a td with the approproiate data. Link, status, info and buffer + * are used by the USB controller itselfes, dev is used to identify the + * "connected" device + */ +void usb_fill_td(uhci_td_t* td,unsigned long link,unsigned long status, +					unsigned long info, unsigned long buffer, unsigned long dev) +{ +	td->link=swap_32(link); +	td->status=swap_32(status); +	td->info=swap_32(info); +	td->buffer=swap_32(buffer); +	td->dev_ptr=dev; +} + +/* fill a qh with the approproiate data. Head and element are used by the USB controller + * itselfes. As soon as a valid dev_ptr is filled, a td chain is connected to the qh. + * Please note, that after completion of the td chain, the entry element is removed / + * marked invalid by the USB controller. + */ +void usb_fill_qh(uhci_qh_t* qh,unsigned long head,unsigned long element) +{ +	qh->head=swap_32(head); +	qh->element=swap_32(element); +	qh->dev_ptr=0L; +} + +/* get the status of a td->status + */ +unsigned long usb_uhci_td_stat(unsigned long status) +{ +	unsigned long result=0; +	result |= (status & TD_CTRL_NAK)      ? USB_ST_NAK_REC : 0; +	result |= (status & TD_CTRL_STALLED)  ? USB_ST_STALLED : 0; +	result |= (status & TD_CTRL_DBUFERR)  ? USB_ST_BUF_ERR : 0; +	result |= (status & TD_CTRL_BABBLE)   ? USB_ST_BABBLE_DET : 0; +	result |= (status & TD_CTRL_CRCTIMEO) ? USB_ST_CRC_ERR : 0; +	result |= (status & TD_CTRL_BITSTUFF) ? USB_ST_BIT_ERR : 0; +	result |= (status & TD_CTRL_ACTIVE)   ? USB_ST_NOT_PROC : 0; +	return result; +} + +/* get the status and the transfered len of a td chain. + * called from the completion handler + */ +int usb_get_td_status(uhci_td_t *td,struct usb_device *dev) +{ +	unsigned long temp,info; +	unsigned long stat; +	uhci_td_t *mytd=td; + +	if(dev->devnum==rh.devnum) +		return 0; +	dev->act_len=0; +	stat=0; +	do { +		temp=swap_32((unsigned long)mytd->status); +		stat=usb_uhci_td_stat(temp); +		info=swap_32((unsigned long)mytd->info); +		if(((info & 0xff)!= USB_PID_SETUP) && +				(((info >> 21) & 0x7ff)!= 0x7ff) && +				(temp & 0x7FF)!=0x7ff) +		{  /* if not setup and not null data pack */ +			dev->act_len+=(temp & 0x7FF) + 1; /* the transfered len is act_len + 1 */ +		} +		if(stat) {           /* status no ok */ +			dev->status=stat; +			return -1; +		} +		temp=swap_32((unsigned long)mytd->link); +		mytd=(uhci_td_t *)(temp & 0xfffffff0); +	}while((temp & 0x1)==0); /* process all TDs */ +	dev->status=stat; +	return 0; /* Ok */ +} + + +/*------------------------------------------------------------------- + *                         LOW LEVEL STUFF + *          assembles QHs und TDs for control, bulk and iso + *-------------------------------------------------------------------*/ + +/* Submits a control message. That is a Setup, Data and Status transfer. + * Routine does not wait for completion. + */ +int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, +										int transfer_len,struct devrequest *setup) +{ +	unsigned long destination, status; +	int maxsze = usb_maxpacket(dev, pipe); +	unsigned long dataptr; +	int len; +	int pktsze; +	int i=0; + +	if (!maxsze) { +		USB_UHCI_PRINTF("uhci_submit_control_urb: pipesize for pipe %lx is zero\n", pipe); +		return -1; +	} +	if(((pipe>>8)&0x7f)==rh.devnum) { +		/* this is the root hub -> redirect it */ +		return uhci_submit_rh_msg(dev,pipe,buffer,transfer_len,setup); +	} +	USB_UHCI_PRINTF("uhci_submit_control start len %x, maxsize %x\n",transfer_len,maxsze); +	/* The "pipe" thing contains the destination in bits 8--18 */ +	destination = (pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; /* Setup stage */ +	/* 3 errors */ +	status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27); +	/* (urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD); */ +	/*  Build the TD for the control request, try forever, 8 bytes of data */ +	usb_fill_td(&tmp_td[i],UHCI_PTR_TERM ,status, destination | (7 << 21),(unsigned long)setup,(unsigned long)dev); +#if 0 +	{ +		char *sp=(char *)setup; +		printf("SETUP to pipe %lx: %x %x %x %x %x %x %x %x\n", pipe, +		    sp[0],sp[1],sp[2],sp[3],sp[4],sp[5],sp[6],sp[7]); +	} +#endif +	dataptr = (unsigned long)buffer; +	len=transfer_len; + +	/* If direction is "send", change the frame from SETUP (0x2D) +	   to OUT (0xE1). Else change it from SETUP to IN (0x69). */ +	destination = (pipe & PIPE_DEVEP_MASK) | ((pipe & USB_DIR_IN)==0 ? USB_PID_OUT : USB_PID_IN); +	while (len > 0) { +		/* data stage */ +		pktsze = len; +		i++; +		if (pktsze > maxsze) +			pktsze = maxsze; +		destination ^= 1 << TD_TOKEN_TOGGLE;	/* toggle DATA0/1 */ +		usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, destination | ((pktsze - 1) << 21),dataptr,(unsigned long)dev);	/* Status, pktsze bytes of data */ +		tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]); + +		dataptr += pktsze; +		len -= pktsze; +	} + +	/*  Build the final TD for control status */ +	/* It's only IN if the pipe is out AND we aren't expecting data */ + +	destination &= ~UHCI_PID; +	if (((pipe & USB_DIR_IN)==0) || (transfer_len == 0)) +		destination |= USB_PID_IN; +	else +		destination |= USB_PID_OUT; +	destination |= 1 << TD_TOKEN_TOGGLE;	/* End in Data1 */ +	i++; +	status &=~TD_CTRL_SPD; +	/* no limit on errors on final packet , 0 bytes of data */ +	usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status | TD_CTRL_IOC, destination | (UHCI_NULL_DATA_SIZE << 21),0,(unsigned long)dev); +	tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]);	/* queue status td */ +	/*	usb_show_td(i+1);*/ +	USB_UHCI_PRINTF("uhci_submit_control end (%d tmp_tds used)\n",i); +	/* first mark the control QH element terminated */ +	qh_cntrl.element=0xffffffffL; +	/* set qh active */ +	qh_cntrl.dev_ptr=(unsigned long)dev; +	/* fill in tmp_td_chain */ +	qh_cntrl.element=swap_32((unsigned long)&tmp_td[0]); +	return 0; +} + +/*------------------------------------------------------------------- + * Prepare TDs for bulk transfers. + */ +int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len) +{ +	unsigned long destination, status,info; +	unsigned long dataptr; +	int maxsze = usb_maxpacket(dev, pipe); +	int len; +	int i=0; + +	if(transfer_len < 0) { +		printf("Negative transfer length in submit_bulk\n"); +		return -1; +	} +	if (!maxsze) +		return -1; +	/* The "pipe" thing contains the destination in bits 8--18. */ +	destination = (pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe); +	/* 3 errors */ +	status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27); +	/*	((urb->transfer_flags & USB_DISABLE_SPD) ? 0 : TD_CTRL_SPD) | (3 << 27); */ +	/* Build the TDs for the bulk request */ +	len = transfer_len; +	dataptr = (unsigned long)buffer; +	do { +		int pktsze = len; +		if (pktsze > maxsze) +			pktsze = maxsze; +		/* pktsze bytes of data  */ +		info = destination | (((pktsze - 1)&UHCI_NULL_DATA_SIZE) << 21) | +			(usb_gettoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)) << TD_TOKEN_TOGGLE); + +		if((len-pktsze)==0) +			status |= TD_CTRL_IOC;	/* last one generates INT */ + +		usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, info,dataptr,(unsigned long)dev);	/* Status, pktsze bytes of data */ +		if(i>0) +			tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]); +		i++; +		dataptr += pktsze; +		len -= pktsze; +		usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)); +	} while (len > 0); +	/* first mark the bulk QH element terminated */ +	qh_bulk.element=0xffffffffL; +	/* set qh active */ +	qh_bulk.dev_ptr=(unsigned long)dev; +	/* fill in tmp_td_chain */ +	qh_bulk.element=swap_32((unsigned long)&tmp_td[0]); +	return 0; +} + + +/* search a free interrupt td + */ +uhci_td_t *uhci_alloc_int_td(void) +{ +	int i; +	for(i=0;i<USB_MAX_TEMP_INT_TD;i++) { +		if(tmp_int_td[i].dev_ptr==0) /* no device assigned -> free TD */ +			return &tmp_int_td[i]; +	} +	return NULL; +} + +#if 0 +void uhci_show_temp_int_td(void) +{ +	int i; +	for(i=0;i<USB_MAX_TEMP_INT_TD;i++) { +		if((tmp_int_td[i].dev_ptr&0x01)!=0x1L) /* no device assigned -> free TD */ +			printf("temp_td %d is assigned to dev %lx\n",i,tmp_int_td[i].dev_ptr); +	} +	printf("all others temp_tds are free\n"); +} +#endif +/*------------------------------------------------------------------- + * submits USB interrupt (ie. polling ;-) + */ +int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len, int interval) +{ +	int nint, n; +	unsigned long status, destination; +	unsigned long info,tmp; +	uhci_td_t *mytd; +	if (interval < 0 || interval >= 256) +		return -1; + +	if (interval == 0) +		nint = 0; +	else { +		for (nint = 0, n = 1; nint <= 8; nint++, n += n)	/* round interval down to 2^n */ +		 { +			if(interval < n) { +				interval = n / 2; +				break; +			} +		} +		nint--; +	} + +	USB_UHCI_PRINTF("Rounded interval to %i, chain  %i\n", interval, nint); +	mytd=uhci_alloc_int_td(); +	if(mytd==NULL) { +		printf("No free INT TDs found\n"); +		return -1; +	} +	status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | TD_CTRL_IOC | (3 << 27); +/*		(urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD) | (3 << 27); +*/ + +	destination =(pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe) | (((transfer_len - 1) & 0x7ff) << 21); + +	info = destination | (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)) << TD_TOKEN_TOGGLE); +	tmp = swap_32(td_int[nint].link); +	usb_fill_td(mytd,tmp,status, info,(unsigned long)buffer,(unsigned long)dev); +	/* Link it */ +	tmp = swap_32((unsigned long)mytd); +	td_int[nint].link=tmp; + +	usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)); + +	return 0; +} + +/********************************************************************** + * Low Level functions + */ + + +void reset_hc(void) +{ + +	/* Global reset for 100ms */ +	out16r( usb_base_addr + USBPORTSC1,0x0204); +	out16r( usb_base_addr + USBPORTSC2,0x0204); +	out16r( usb_base_addr + USBCMD,USBCMD_GRESET | USBCMD_RS); +	/* Turn off all interrupts */ +	out16r(usb_base_addr + USBINTR,0); +	wait_ms(50); +	out16r( usb_base_addr + USBCMD,0); +	wait_ms(10); +} + +void start_hc(void) +{ +	int timeout = 1000; + +	while(in16r(usb_base_addr + USBCMD) & USBCMD_HCRESET) { +		if (!--timeout) { +			printf("USBCMD_HCRESET timed out!\n"); +			break; +		} +	} +	/* Turn on all interrupts */ +	out16r(usb_base_addr + USBINTR,USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP); +	/* Start at frame 0 */ +	out16r(usb_base_addr + USBFRNUM,0); +	/* set Framebuffer base address */ +	out32r(usb_base_addr+USBFLBASEADD,(unsigned long)&framelist); +	/* Run and mark it configured with a 64-byte max packet */ +	out16r(usb_base_addr + USBCMD,USBCMD_RS | USBCMD_CF | USBCMD_MAXP); +} + +/* Initialize the skeleton + */ +void usb_init_skel(void) +{ +	unsigned long temp; +	int n; + +	for(n=0;n<USB_MAX_TEMP_INT_TD;n++) +		tmp_int_td[n].dev_ptr=0L; /* no devices connected */ +	/* last td */ +	usb_fill_td(&td_last,UHCI_PTR_TERM,TD_CTRL_IOC ,0,0,0L); +  /* usb_fill_td(&td_last,UHCI_PTR_TERM,0,0,0); */ +	/* End Queue Header */ +	usb_fill_qh(&qh_end,UHCI_PTR_TERM,(unsigned long)&td_last); +	/* Bulk Queue Header */ +	temp=(unsigned long)&qh_end; +	usb_fill_qh(&qh_bulk,temp | UHCI_PTR_QH,UHCI_PTR_TERM); +	/* Control Queue Header */ +	temp=(unsigned long)&qh_bulk; +	usb_fill_qh(&qh_cntrl, temp | UHCI_PTR_QH,UHCI_PTR_TERM); +	/* 1ms Interrupt td */ +	temp=(unsigned long)&qh_cntrl; +	usb_fill_td(&td_int[0],temp | UHCI_PTR_QH,0,0,0,0L); +	temp=(unsigned long)&td_int[0]; +	for(n=1; n<8; n++) +		usb_fill_td(&td_int[n],temp,0,0,0,0L); +	for (n = 0; n < 1024; n++) { +	/* link all framelist pointers to one of the interrupts */ +		int m, o; +		if ((n&127)==127) +			framelist[n]= swap_32((unsigned long)&td_int[0]); +		else +			for (o = 1, m = 2; m <= 128; o++, m += m) +				if ((n & (m - 1)) == ((m - 1) / 2)) +						framelist[n]= swap_32((unsigned long)&td_int[o]); +	} +} + +/* check the common skeleton for completed transfers, and update the status + * of the "connected" device. Called from the IRQ routine. + */ +void usb_check_skel(void) +{ +	struct usb_device *dev; +	/* start with the control qh */ +	if(qh_cntrl.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */ +	{ +		dev=(struct usb_device *)qh_cntrl.dev_ptr; +		usb_get_td_status(&tmp_td[0],dev); /* update status */ +		if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */ +			qh_cntrl.dev_ptr=0; +		} +	} +	/* now process the bulk */ +	if(qh_bulk.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */ +	{ +		dev=(struct usb_device *)qh_bulk.dev_ptr; +		usb_get_td_status(&tmp_td[0],dev); /* update status */ +		if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */ +			qh_bulk.dev_ptr=0; +		} +	} +} + +/* check the interrupt chain, ubdate the status of the appropriate device, + * call the appropriate irqhandler and reactivate the TD if the irqhandler + * returns with 1 + */ +void usb_check_int_chain(void) +{ +	int i,res; +	unsigned long link,status; +	struct usb_device *dev; +	uhci_td_t *td,*prevtd; + +	for(i=0;i<8;i++) { +		prevtd=&td_int[i]; /* the first previous td is the skeleton td */ +		link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */ +		td=(uhci_td_t *)link; /* assign it */ +		/* all interrupt TDs are finally linked to the td_int[0]. + 		 * so we process all until we find the td_int[0]. +		 * if int0 chain points to a QH, we're also done +	   */ +		while(((i>0) && (link != (unsigned long)&td_int[0])) || +					((i==0) && !(swap_32(td->link) &  UHCI_PTR_QH))) +		{ +			/* check if a device is assigned with this td */ +			status=swap_32(td->status); +			if((td->dev_ptr!=0L) && !(status & TD_CTRL_ACTIVE)) { +				/* td is not active and a device is assigned -> call irqhandler */ +				dev=(struct usb_device *)td->dev_ptr; +				dev->irq_act_len=((status & 0x7FF)==0x7FF) ? 0 : (status & 0x7FF) + 1; /* transfered length */ +				dev->irq_status=usb_uhci_td_stat(status); /* get status */ +				res=dev->irq_handle(dev); /* call irqhandler */ +				if(res==1) { +					/* reactivate */ +					status|=TD_CTRL_ACTIVE; +					td->status=swap_32(status); +					prevtd=td; /* previous td = this td */ +				} +				else { +					prevtd->link=td->link; /* link previous td directly to the nex td -> unlinked */ +					/* remove device pointer */ +					td->dev_ptr=0L; +				} +			} /* if we call the irq handler */ +			link=swap_32(td->link) & 0xfffffff0; /* next in chain */ +			td=(uhci_td_t *)link; /* assign it */ +		} /* process all td in this int chain */ +	} /* next interrupt chain */ +} + + +/* usb interrupt service routine. + */ +void handle_usb_interrupt(void) +{ +	unsigned short status; + +	/* +	 * Read the interrupt status, and write it back to clear the +	 * interrupt cause +	 */ + +	status = in16r(usb_base_addr + USBSTS); + +	if (!status)		/* shared interrupt, not mine */ +		return; +	if (status != 1) { +		/* remove host controller halted state */ +		if ((status&0x20) && ((in16r(usb_base_addr+USBCMD) && USBCMD_RS)==0)) { +			out16r(usb_base_addr + USBCMD, USBCMD_RS | in16r(usb_base_addr + USBCMD)); +		} +	} +	usb_check_int_chain(); /* call interrupt handlers for int tds */ +	usb_check_skel(); /* call completion handler for common transfer routines */ +	out16r(usb_base_addr+USBSTS,status); +} + + +/* init uhci + */ +int usb_lowlevel_init(void) +{ +	unsigned char temp; +	int	busdevfunc; + +	busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */ +	if(busdevfunc==-1) { +		printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID); +		return -1; +	} +	pci_read_config_byte(busdevfunc,PCI_INTERRUPT_LINE,&temp); +	irqvec = temp; +	irq_free_handler(irqvec); +	USB_UHCI_PRINTF("Interrupt Line = %d, is %d\n",irqvec); +	pci_read_config_byte(busdevfunc,PCI_INTERRUPT_PIN,&temp); +	USB_UHCI_PRINTF("Interrupt Pin = %ld\n",temp); +	pci_read_config_dword(busdevfunc,PCI_BASE_ADDRESS_4,&usb_base_addr); +	USB_UHCI_PRINTF("IO Base Address = 0x%lx\n",usb_base_addr); +	usb_base_addr&=0xFFFFFFF0; +	usb_base_addr+=CFG_ISA_IO_BASE_ADDRESS; +	rh.devnum = 0; +	usb_init_skel(); +	reset_hc(); +	start_hc(); +	irq_install_handler(irqvec, (interrupt_handler_t *)handle_usb_interrupt, NULL); +	return 0; +} + +/* stop uhci + */ +int usb_lowlevel_stop(void) +{ +	if(irqvec==-1) +		return 1; +	irq_free_handler(irqvec); +	reset_hc(); +	irqvec=-1; +	return 0; +} + +/******************************************************************************************* + * Virtual Root Hub + * Since the uhci does not have a real HUB, we simulate one ;-) + */ +#undef	USB_RH_DEBUG + +#ifdef	USB_RH_DEBUG +#define	USB_RH_PRINTF(fmt,args...)	printf (fmt ,##args) +static void usb_display_wValue(unsigned short wValue,unsigned short wIndex); +static void usb_display_Req(unsigned short req); +#else +#define USB_RH_PRINTF(fmt,args...) +static void usb_display_wValue(unsigned short wValue,unsigned short wIndex) {} +static void usb_display_Req(unsigned short req) {} +#endif + +static unsigned char root_hub_dev_des[] = +{ +	0x12,			/*  __u8  bLength; */ +	0x01,			/*  __u8  bDescriptorType; Device */ +	0x00,			/*  __u16 bcdUSB; v1.0 */ +	0x01, +	0x09,			/*  __u8  bDeviceClass; HUB_CLASSCODE */ +	0x00,			/*  __u8  bDeviceSubClass; */ +	0x00,			/*  __u8  bDeviceProtocol; */ +	0x08,			/*  __u8  bMaxPacketSize0; 8 Bytes */ +	0x00,			/*  __u16 idVendor; */ +	0x00, +	0x00,			/*  __u16 idProduct; */ +	0x00, +	0x00,			/*  __u16 bcdDevice; */ +	0x00, +	0x01,			/*  __u8  iManufacturer; */ +	0x00,			/*  __u8  iProduct; */ +	0x00,			/*  __u8  iSerialNumber; */ +	0x01			/*  __u8  bNumConfigurations; */ +}; + + +/* Configuration descriptor */ +static unsigned char root_hub_config_des[] = +{ +	0x09,			/*  __u8  bLength; */ +	0x02,			/*  __u8  bDescriptorType; Configuration */ +	0x19,			/*  __u16 wTotalLength; */ +	0x00, +	0x01,			/*  __u8  bNumInterfaces; */ +	0x01,			/*  __u8  bConfigurationValue; */ +	0x00,			/*  __u8  iConfiguration; */ +	0x40,			/*  __u8  bmAttributes; +				   Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */ +	0x00,			/*  __u8  MaxPower; */ + +     /* interface */ +	0x09,			/*  __u8  if_bLength; */ +	0x04,			/*  __u8  if_bDescriptorType; Interface */ +	0x00,			/*  __u8  if_bInterfaceNumber; */ +	0x00,			/*  __u8  if_bAlternateSetting; */ +	0x01,			/*  __u8  if_bNumEndpoints; */ +	0x09,			/*  __u8  if_bInterfaceClass; HUB_CLASSCODE */ +	0x00,			/*  __u8  if_bInterfaceSubClass; */ +	0x00,			/*  __u8  if_bInterfaceProtocol; */ +	0x00,			/*  __u8  if_iInterface; */ + +     /* endpoint */ +	0x07,			/*  __u8  ep_bLength; */ +	0x05,			/*  __u8  ep_bDescriptorType; Endpoint */ +	0x81,			/*  __u8  ep_bEndpointAddress; IN Endpoint 1 */ +	0x03,			/*  __u8  ep_bmAttributes; Interrupt */ +	0x08,			/*  __u16 ep_wMaxPacketSize; 8 Bytes */ +	0x00, +	0xff			/*  __u8  ep_bInterval; 255 ms */ +}; + + +static unsigned char root_hub_hub_des[] = +{ +	0x09,			/*  __u8  bLength; */ +	0x29,			/*  __u8  bDescriptorType; Hub-descriptor */ +	0x02,			/*  __u8  bNbrPorts; */ +	0x00,			/* __u16  wHubCharacteristics; */ +	0x00, +	0x01,			/*  __u8  bPwrOn2pwrGood; 2ms */ +	0x00,			/*  __u8  bHubContrCurrent; 0 mA */ +	0x00,			/*  __u8  DeviceRemovable; *** 7 Ports max *** */ +	0xff			/*  __u8  PortPwrCtrlMask; *** 7 ports max *** */ +}; + +static unsigned char root_hub_str_index0[] = +{ +	0x04,			/*  __u8  bLength; */ +	0x03,			/*  __u8  bDescriptorType; String-descriptor */ +	0x09,			/*  __u8  lang ID */ +	0x04,			/*  __u8  lang ID */ +}; + +static unsigned char root_hub_str_index1[] = +{ +	28,			/*  __u8  bLength; */ +	0x03,			/*  __u8  bDescriptorType; String-descriptor */ +	'U',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'H',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'C',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'I',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	' ',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'R',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'o',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'o',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	't',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	' ',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'H',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'u',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +	'b',			/*  __u8  Unicode */ +	0,				/*  __u8  Unicode */ +}; + + +/* + * Root Hub Control Pipe (interrupt Pipes are not supported) + */ + + +int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len,struct devrequest *cmd) +{ +	void *data = buffer; +	int leni = transfer_len; +	int len = 0; +	int status = 0; +	int stat = 0; +	int i; + +	unsigned short cstatus; + +	unsigned short bmRType_bReq; +	unsigned short wValue; +	unsigned short wIndex; +	unsigned short wLength; + +	if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) { +		printf("Root-Hub submit IRQ: NOT implemented\n"); +#if 0 +		uhci->rh.urb = urb; +		uhci->rh.send = 1; +		uhci->rh.interval = urb->interval; +		rh_init_int_timer (urb); +#endif +		return 0; +	} +	bmRType_bReq = cmd->requesttype | cmd->request << 8; +	wValue = swap_16(cmd->value); +	wIndex = swap_16(cmd->index); +	wLength = swap_16(cmd->length); +	usb_display_Req(bmRType_bReq); +	for (i = 0; i < 8; i++) +		rh.c_p_r[i] = 0; +	USB_RH_PRINTF("Root-Hub: adr: %2x cmd(%1x): %02x%02x %04x %04x %04x\n", +	     dev->devnum, 8, cmd->requesttype,cmd->request, wValue, wIndex, wLength); + +	switch (bmRType_bReq) { +		/* Request Destination: +		   without flags: Device, +		   RH_INTERFACE: interface, +		   RH_ENDPOINT: endpoint, +		   RH_CLASS means HUB here, +		   RH_OTHER | RH_CLASS  almost ever means HUB_PORT here +		 */ + +	case RH_GET_STATUS: +		*(unsigned short *) data = swap_16(1); +		len=2; +		break; +	case RH_GET_STATUS | RH_INTERFACE: +		*(unsigned short *) data = swap_16(0); +		len=2; +		break; +	case RH_GET_STATUS | RH_ENDPOINT: +		*(unsigned short *) data = swap_16(0); +		len=2; +		break; +	case RH_GET_STATUS | RH_CLASS: +		*(unsigned long *) data = swap_32(0); +		len=4; +		break;	/* hub power ** */ +	case RH_GET_STATUS | RH_OTHER | RH_CLASS: + +		status = in16r(usb_base_addr + USBPORTSC1 + 2 * (wIndex - 1)); +		cstatus = ((status & USBPORTSC_CSC) >> (1 - 0)) | +			((status & USBPORTSC_PEC) >> (3 - 1)) | +			(rh.c_p_r[wIndex - 1] << (0 + 4)); +		status = (status & USBPORTSC_CCS) | +			((status & USBPORTSC_PE) >> (2 - 1)) | +			((status & USBPORTSC_SUSP) >> (12 - 2)) | +			((status & USBPORTSC_PR) >> (9 - 4)) | +			(1 << 8) |	/* power on ** */ +			((status & USBPORTSC_LSDA) << (-8 + 9)); + +		*(unsigned short *) data = swap_16(status); +		*(unsigned short *) (data + 2) = swap_16(cstatus); +		len=4; +		break; +	case RH_CLEAR_FEATURE | RH_ENDPOINT: +		switch (wValue) { +		case (RH_ENDPOINT_STALL): +			len=0; +			break; +		} +		break; + +	case RH_CLEAR_FEATURE | RH_CLASS: +		switch (wValue) { +		case (RH_C_HUB_OVER_CURRENT): +			len=0;	/* hub power over current ** */ +			break; +		} +		break; + +	case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS: +		usb_display_wValue(wValue,wIndex); +		switch (wValue) { +		case (RH_PORT_ENABLE): +			status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1)); +			status = (status & 0xfff5) & ~USBPORTSC_PE; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			len=0; +			break; +		case (RH_PORT_SUSPEND): +			status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1)); +			status = (status & 0xfff5) & ~USBPORTSC_SUSP; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			len=0; +			break; +		case (RH_PORT_POWER): +			len=0;	/* port power ** */ +			break; +		case (RH_C_PORT_CONNECTION): +			status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1)); +			status = (status & 0xfff5) | USBPORTSC_CSC; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			len=0; +			break; +		case (RH_C_PORT_ENABLE): +			status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1)); +			status = (status & 0xfff5) | USBPORTSC_PEC; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			len=0; +			break; +		case (RH_C_PORT_SUSPEND): +/*** WR_RH_PORTSTAT(RH_PS_PSSC); */ +			len=0; +			break; +		case (RH_C_PORT_OVER_CURRENT): +			len=0; +			break; +		case (RH_C_PORT_RESET): +			rh.c_p_r[wIndex - 1] = 0; +			len=0; +			break; +		} +		break; +	case RH_SET_FEATURE | RH_OTHER | RH_CLASS: +		usb_display_wValue(wValue,wIndex); +		switch (wValue) { +		case (RH_PORT_SUSPEND): +			status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1)); +			status = (status & 0xfff5) | USBPORTSC_SUSP; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			len=0; +			break; +		case (RH_PORT_RESET): +			status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1)); +			status = (status & 0xfff5) | USBPORTSC_PR; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			wait_ms(10); +			status = (status & 0xfff5) & ~USBPORTSC_PR; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			udelay(10); +			status = (status & 0xfff5) | USBPORTSC_PE; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			wait_ms(10); +			status = (status & 0xfff5) | 0xa; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			len=0; +			break; +		case (RH_PORT_POWER): +			len=0;	/* port power ** */ +			break; +		case (RH_PORT_ENABLE): +			status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1)); +			status = (status & 0xfff5) | USBPORTSC_PE; +			out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status); +			len=0; +			break; +		} +		break; + +	case RH_SET_ADDRESS: +		rh.devnum = wValue; +		len=0; +		break; +	case RH_GET_DESCRIPTOR: +		switch ((wValue & 0xff00) >> 8) { +		case (0x01):	/* device descriptor */ +			i=sizeof(root_hub_config_des); +			status=i > wLength ? wLength : i; +			len = leni > status ? status : leni; +			memcpy (data, root_hub_dev_des, len); +			break; +		case (0x02):	/* configuration descriptor */ +			i=sizeof(root_hub_config_des); +			status=i > wLength ? wLength : i; +			len = leni > status ? status : leni; +			memcpy (data, root_hub_config_des, len); +			break; +		case (0x03):	/*string descriptors */ +			if(wValue==0x0300) { +				i=sizeof(root_hub_str_index0); +				status = i > wLength ? wLength : i; +				len = leni > status ? status : leni; +				memcpy (data, root_hub_str_index0, len); +				break; +			} +			if(wValue==0x0301) { +				i=sizeof(root_hub_str_index1); +				status = i > wLength ? wLength : i; +				len = leni > status ? status : leni; +				memcpy (data, root_hub_str_index1, len); +				break; +			} +			stat = USB_ST_STALLED; +		} +		break; + +	case RH_GET_DESCRIPTOR | RH_CLASS: +		root_hub_hub_des[2] = 2; +		i=sizeof(root_hub_hub_des); +		status= i > wLength ? wLength : i; +		len = leni > status ? status : leni; +		memcpy (data, root_hub_hub_des, len); +		break; +	case RH_GET_CONFIGURATION: +		*(unsigned char *) data = 0x01; +		len = 1; +		break; +	case RH_SET_CONFIGURATION: +		len=0; +		break; +	default: +		stat = USB_ST_STALLED; +	} +	USB_RH_PRINTF("Root-Hub stat %lx port1: %x port2: %x\n\n",stat, +	     in16r(usb_base_addr + USBPORTSC1), in16r(usb_base_addr + USBPORTSC2)); +	dev->act_len=len; +	dev->status=stat; +	return stat; + +} + +/******************************************************************************** + * Some Debug Routines + */ + +#ifdef	USB_RH_DEBUG + +static void usb_display_Req(unsigned short req) +{ +	USB_RH_PRINTF("- Root-Hub Request: "); +	switch (req) { +	case RH_GET_STATUS: +		USB_RH_PRINTF("Get Status "); +		break; +	case RH_GET_STATUS | RH_INTERFACE: +		USB_RH_PRINTF("Get Status Interface "); +		break; +	case RH_GET_STATUS | RH_ENDPOINT: +		USB_RH_PRINTF("Get Status Endpoint "); +		break; +	case RH_GET_STATUS | RH_CLASS: +		USB_RH_PRINTF("Get Status Class"); +		break;	/* hub power ** */ +	case RH_GET_STATUS | RH_OTHER | RH_CLASS: +		USB_RH_PRINTF("Get Status Class Others"); +		break; +	case RH_CLEAR_FEATURE | RH_ENDPOINT: +		USB_RH_PRINTF("Clear Feature Endpoint "); +		break; +	case RH_CLEAR_FEATURE | RH_CLASS: +		USB_RH_PRINTF("Clear Feature Class "); +		break; +	case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS: +		USB_RH_PRINTF("Clear Feature Other Class "); +		break; +	case RH_SET_FEATURE | RH_OTHER | RH_CLASS: +		USB_RH_PRINTF("Set Feature Other Class "); +		break; +	case RH_SET_ADDRESS: +		USB_RH_PRINTF("Set Address "); +		break; +	case RH_GET_DESCRIPTOR: +		USB_RH_PRINTF("Get Descriptor "); +		break; +	case RH_GET_DESCRIPTOR | RH_CLASS: +		USB_RH_PRINTF("Get Descriptor Class "); +		break; +	case RH_GET_CONFIGURATION: +		USB_RH_PRINTF("Get Configuration "); +		break; +	case RH_SET_CONFIGURATION: +		USB_RH_PRINTF("Get Configuration "); +		break; +	default: +		USB_RH_PRINTF("****UNKNOWN**** 0x%04X ",req); +	} +	USB_RH_PRINTF("\n"); + +} + +static void usb_display_wValue(unsigned short wValue,unsigned short wIndex) +{ +	switch (wValue) { +		case (RH_PORT_ENABLE): +			USB_RH_PRINTF("Root-Hub: Enable Port %d\n",wIndex); +			break; +		case (RH_PORT_SUSPEND): +			USB_RH_PRINTF("Root-Hub: Suspend Port %d\n",wIndex); +			break; +		case (RH_PORT_POWER): +			USB_RH_PRINTF("Root-Hub: Port Power %d\n",wIndex); +			break; +		case (RH_C_PORT_CONNECTION): +			USB_RH_PRINTF("Root-Hub: C Port Connection Port %d\n",wIndex); +			break; +		case (RH_C_PORT_ENABLE): +			USB_RH_PRINTF("Root-Hub: C Port Enable Port %d\n",wIndex); +			break; +		case (RH_C_PORT_SUSPEND): +			USB_RH_PRINTF("Root-Hub: C Port Suspend Port %d\n",wIndex); +			break; +		case (RH_C_PORT_OVER_CURRENT): +			USB_RH_PRINTF("Root-Hub: C Port Over Current Port %d\n",wIndex); +			break; +		case (RH_C_PORT_RESET): +			USB_RH_PRINTF("Root-Hub: C Port reset Port %d\n",wIndex); +			break; +		default: +			USB_RH_PRINTF("Root-Hub: unknown %x %x\n",wValue,wIndex); +			break; +	} +} + +#endif + + + +#ifdef	USB_UHCI_DEBUG + +static int usb_display_td(uhci_td_t *td) +{ +	unsigned long tmp; +	int valid; + +	printf("TD at %p:\n",td); + +	tmp=swap_32(td->link); +	printf("Link points to 0x%08lX, %s first, %s, %s\n",tmp&0xfffffff0, +		((tmp & 0x4)==0x4) ? "Depth" : "Breath", +		((tmp & 0x2)==0x2) ? "QH" : "TD", +		((tmp & 0x1)==0x1) ? "invalid" : "valid"); +	valid=((tmp & 0x1)==0x0); +	tmp=swap_32(td->status); +	printf("     %s %ld Errors %s %s %s \n     %s %s %s %s %s %s\n     Len 0x%lX\n", +		(((tmp>>29)&0x1)==0x1) ? "SPD Enable" : "SPD Disable", +		((tmp>>28)&0x3), +		(((tmp>>26)&0x1)==0x1) ? "Low Speed" : "Full Speed", +		(((tmp>>25)&0x1)==0x1) ? "ISO " : "", +		(((tmp>>24)&0x1)==0x1) ? "IOC " : "", +		(((tmp>>23)&0x1)==0x1) ? "Active " : "Inactive ", +		(((tmp>>22)&0x1)==0x1) ? "Stalled" : "", +		(((tmp>>21)&0x1)==0x1) ? "Data Buffer Error" : "", +		(((tmp>>20)&0x1)==0x1) ? "Babble" : "", +		(((tmp>>19)&0x1)==0x1) ? "NAK" : "", +		(((tmp>>18)&0x1)==0x1) ? "Bitstuff Error" : "", +		(tmp&0x7ff)); +	tmp=swap_32(td->info); +	printf("     MaxLen 0x%lX\n",((tmp>>21)&0x7FF)); +	printf("     %s Endpoint 0x%lX Dev Addr 0x%lX PID 0x%lX\n",((tmp>>19)&0x1)==0x1 ? "TOGGLE" : "", +		((tmp>>15)&0xF),((tmp>>8)&0x7F),tmp&0xFF); +	tmp=swap_32(td->buffer); +	printf("     Buffer 0x%08lX\n",tmp); +	printf("     DEV %08lX\n",td->dev_ptr); +	return valid; +} + + +void usb_show_td(int max) +{ +	int i; +	if(max>0) { +		for(i=0;i<max;i++) { +			usb_display_td(&tmp_td[i]); +		} +	} +	else { +		i=0; +		do { +			printf("tmp_td[%d]\n",i); +		}while(usb_display_td(&tmp_td[i++])); +	} +} + + +#endif +#endif /* CONFIG_USB_UHCI */ + +/* EOF */ |