diff options
Diffstat (limited to 'board/gdsys/common/osd.c')
| -rw-r--r-- | board/gdsys/common/osd.c | 291 |
1 files changed, 219 insertions, 72 deletions
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c index 239c870ef..4d8c046a8 100644 --- a/board/gdsys/common/osd.c +++ b/board/gdsys/common/osd.c @@ -25,10 +25,16 @@ #include <i2c.h> #include <asm/io.h> -#include "fpga.h" +#include <gdsys_fpga.h> #define CH7301_I2C_ADDR 0x75 +#define ICS8N3QV01_I2C_ADDR 0x6E +#define ICS8N3QV01_FREF 114285 + +#define SIL1178_MASTER_I2C_ADDRESS 0x38 +#define SIL1178_SLAVE_I2C_ADDRESS 0x39 + #define PIXCLK_640_480_60 25180000 #define BASE_WIDTH 32 @@ -36,17 +42,6 @@ #define BUFSIZE (BASE_WIDTH * BASE_HEIGHT) enum { - REG_CONTROL = 0x0010, - REG_MPC3W_CONTROL = 0x001a, - REG_VIDEOCONTROL = 0x0042, - REG_OSDVERSION = 0x0100, - REG_OSDFEATURES = 0x0102, - REG_OSDCONTROL = 0x0104, - REG_XY_SIZE = 0x0106, - REG_VIDEOMEM = 0x0800, -}; - -enum { CH7301_CM = 0x1c, /* Clock Mode Register */ CH7301_IC = 0x1d, /* Input Clock Register */ CH7301_GPIO = 0x1e, /* GPIO Control Register */ @@ -67,6 +62,41 @@ enum { CH7301_DSP = 0x56, /* DVI Sync polarity Register */ }; +#if defined(CONFIG_SYS_ICS8N3QV01) || defined(CONFIG_SYS_SIL1178) +static void fpga_iic_write(unsigned screen, u8 slave, u8 reg, u8 data) +{ + ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); + ihs_i2c_t *i2c = &fpga->i2c; + + while (in_le16(&fpga->extended_interrupt) & (1 << 12)) + ; + out_le16(&i2c->write_mailbox_ext, reg | (data << 8)); + out_le16(&i2c->write_mailbox, 0xc400 | (slave << 1)); +} + +static u8 fpga_iic_read(unsigned screen, u8 slave, u8 reg) +{ + ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); + ihs_i2c_t *i2c = &fpga->i2c; + unsigned int ctr = 0; + + while (in_le16(&fpga->extended_interrupt) & (1 << 12)) + ; + out_le16(&fpga->extended_interrupt, 1 << 14); + out_le16(&i2c->write_mailbox_ext, reg); + out_le16(&i2c->write_mailbox, 0xc000 | (slave << 1)); + while (!(in_le16(&fpga->extended_interrupt) & (1 << 14))) { + udelay(100000); + if (ctr++ > 5) { + printf("iic receive timeout\n"); + break; + } + } + return in_le16(&i2c->read_mailbox_ext) >> 8; +} +#endif + +#ifdef CONFIG_SYS_MPC92469AC static void mpc92469ac_calc_parameters(unsigned int fout, unsigned int *post_div, unsigned int *feedback_div) { @@ -92,8 +122,9 @@ static void mpc92469ac_calc_parameters(unsigned int fout, *feedback_div = m; } -static void mpc92469ac_set(unsigned int fout) +static void mpc92469ac_set(unsigned screen, unsigned int fout) { + ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); unsigned int n; unsigned int m; unsigned int bitval = 0; @@ -114,17 +145,85 @@ static void mpc92469ac_set(unsigned int fout) break; } - fpga_set_reg(REG_MPC3W_CONTROL, (bitval << 9) | m); + out_le16(&fpga->mpc3w_control, (bitval << 9) | m); +} +#endif + +#ifdef CONFIG_SYS_ICS8N3QV01 +static void ics8n3qv01_calc_parameters(unsigned int fout, + unsigned int *_mint, unsigned int *_mfrac, + unsigned int *_n) +{ + unsigned int n; + unsigned int foutiic; + unsigned int fvcoiic; + unsigned int mint; + unsigned long long mfrac; + + n = 2550000000U / fout; + if ((n & 1) && (n > 5)) + n -= 1; + + foutiic = fout - (fout / 10000); + fvcoiic = foutiic * n; + + mint = fvcoiic / 114285000; + if ((mint < 17) || (mint > 63)) + printf("ics8n3qv01_calc_parameters: cannot determine mint\n"); + + mfrac = ((unsigned long long)fvcoiic % 114285000LL) * 262144LL + / 114285000LL; + + *_mint = mint; + *_mfrac = mfrac; + *_n = n; +} + +static void ics8n3qv01_set(unsigned screen, unsigned int fout) +{ + unsigned int n; + unsigned int mint; + unsigned int mfrac; + u8 reg0, reg4, reg8, reg12, reg18, reg20; + + ics8n3qv01_calc_parameters(fout, &mint, &mfrac, &n); + + reg0 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 0) & 0xc0; + reg0 |= (mint & 0x1f) << 1; + reg0 |= (mfrac >> 17) & 0x01; + fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 0, reg0); + + reg4 = mfrac >> 9; + fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 4, reg4); + + reg8 = mfrac >> 1; + fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 8, reg8); + + reg12 = mfrac << 7; + reg12 |= n & 0x7f; + fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 12, reg12); + + reg18 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 18) & 0x03; + reg18 |= 0x20; + fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 18, reg18); + + reg20 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 20) & 0x1f; + reg20 |= mint & (1 << 5); + fpga_iic_write(screen, ICS8N3QV01_I2C_ADDR, 20, reg20); } +#endif -static int osd_write_videomem(unsigned offset, u16 *data, size_t charcount) +static int osd_write_videomem(unsigned screen, unsigned offset, + u16 *data, size_t charcount) { + ihs_fpga_t *fpga = + (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); unsigned int k; for (k = 0; k < charcount; ++k) { if (offset + k >= BUFSIZE) return -1; - fpga_set_reg(REG_VIDEOMEM + 2 * (offset + k), data[k]); + out_le16(&fpga->videomem + offset + k, data[k]); } return charcount; @@ -132,46 +231,59 @@ static int osd_write_videomem(unsigned offset, u16 *data, size_t charcount) static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - unsigned x; - unsigned y; - unsigned charcount; - unsigned len; - u8 color; - unsigned int k; - u16 buf[BUFSIZE]; - char *text; + unsigned screen; - if (argc < 5) { - return cmd_usage(cmdtp); - } + for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) { + unsigned x; + unsigned y; + unsigned charcount; + unsigned len; + u8 color; + unsigned int k; + u16 buf[BUFSIZE]; + char *text; + int res; + + if (argc < 5) { + cmd_usage(cmdtp); + return 1; + } + + x = simple_strtoul(argv[1], NULL, 16); + y = simple_strtoul(argv[2], NULL, 16); + color = simple_strtoul(argv[3], NULL, 16); + text = argv[4]; + charcount = strlen(text); + len = (charcount > BUFSIZE) ? BUFSIZE : charcount; - x = simple_strtoul(argv[1], NULL, 16); - y = simple_strtoul(argv[2], NULL, 16); - color = simple_strtoul(argv[3], NULL, 16); - text = argv[4]; - charcount = strlen(text); - len = (charcount > BUFSIZE) ? BUFSIZE : charcount; + for (k = 0; k < len; ++k) + buf[k] = (text[k] << 8) | color; - for (k = 0; k < len; ++k) - buf[k] = (text[k] << 8) | color; + res = osd_write_videomem(screen, y * BASE_WIDTH + x, buf, len); + if (res < 0) + return res; + } - return osd_write_videomem(y * BASE_WIDTH + x, buf, len); + return 0; } -int osd_probe(void) +int osd_probe(unsigned screen) { - u8 value; - u16 version = fpga_get_reg(REG_OSDVERSION); - u16 features = fpga_get_reg(REG_OSDFEATURES); + ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(screen); + ihs_osd_t *osd = &fpga->osd; + u16 version = in_le16(&osd->version); + u16 features = in_le16(&osd->features); unsigned width; unsigned height; + u8 value; width = ((features & 0x3f00) >> 8) + 1; height = (features & 0x001f) + 1; - printf("OSD: Digital-OSD version %01d.%02d, %d" "x%d characters\n", - version/100, version%100, width, height); + printf("OSD%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n", + screen, version/100, version%100, width, height); +#ifdef CONFIG_SYS_CH7301 value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID); if (value != 0x17) { printf(" Probing CH7301 failed, DID %02x\n", value); @@ -182,51 +294,86 @@ int osd_probe(void) i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60); i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09); i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0); +#endif - mpc92469ac_set(PIXCLK_640_480_60); - fpga_set_reg(REG_VIDEOCONTROL, 0x0002); - fpga_set_reg(REG_OSDCONTROL, 0x0049); +#ifdef CONFIG_SYS_MPC92469AC + mpc92469ac_set(screen, PIXCLK_640_480_60); +#endif - fpga_set_reg(REG_XY_SIZE, ((32 - 1) << 8) | (16 - 1)); +#ifdef CONFIG_SYS_ICS8N3QV01 + ics8n3qv01_set(screen, PIXCLK_640_480_60); +#endif + +#ifdef CONFIG_SYS_SIL1178 + value = fpga_iic_read(screen, SIL1178_SLAVE_I2C_ADDRESS, 0x02); + if (value != 0x06) { + printf(" Probing CH7301 SIL1178, DEV_IDL %02x\n", value); + return -1; + } + /* magic initialization sequence adapted from datasheet */ + fpga_iic_write(screen, SIL1178_SLAVE_I2C_ADDRESS, 0x08, 0x36); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x44); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x4c); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0e, 0x10); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0a, 0x80); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x09, 0x30); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0c, 0x89); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x0d, 0x60); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x36); + fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37); +#endif + + out_le16(&fpga->videocontrol, 0x0002); + out_le16(&osd->control, 0x0049); + + out_le16(&osd->xy_size, ((32 - 1) << 8) | (16 - 1)); return 0; } int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - unsigned x; - unsigned y; - unsigned k; - u16 buffer[BASE_WIDTH]; - char *rp; - u16 *wp = buffer; - unsigned count = (argc > 4) ? simple_strtoul(argv[4], NULL, 16) : 1; + unsigned screen; - if ((argc < 4) || (strlen(argv[3]) % 4)) { - return cmd_usage(cmdtp); - } + for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) { + unsigned x; + unsigned y; + unsigned k; + u16 buffer[BASE_WIDTH]; + char *rp; + u16 *wp = buffer; + unsigned count = (argc > 4) ? + simple_strtoul(argv[4], NULL, 16) : 1; - x = simple_strtoul(argv[1], NULL, 16); - y = simple_strtoul(argv[2], NULL, 16); - rp = argv[3]; + if ((argc < 4) || (strlen(argv[3]) % 4)) { + cmd_usage(cmdtp); + return 1; + } + x = simple_strtoul(argv[1], NULL, 16); + y = simple_strtoul(argv[2], NULL, 16); + rp = argv[3]; - while (*rp) { - char substr[5]; - memcpy(substr, rp, 4); - substr[4] = 0; - *wp = simple_strtoul(substr, NULL, 16); + while (*rp) { + char substr[5]; - rp += 4; - wp++; - if (wp - buffer > BASE_WIDTH) - break; - } + memcpy(substr, rp, 4); + substr[4] = 0; + *wp = simple_strtoul(substr, NULL, 16); + + rp += 4; + wp++; + if (wp - buffer > BASE_WIDTH) + break; + } - for (k = 0; k < count; ++k) { - unsigned offset = y * BASE_WIDTH + x + k * (wp - buffer); - osd_write_videomem(offset, buffer, wp - buffer); + for (k = 0; k < count; ++k) { + unsigned offset = + y * BASE_WIDTH + x + k * (wp - buffer); + osd_write_videomem(screen, offset, buffer, + wp - buffer); + } } return 0; |