diff options
Diffstat (limited to 'board/gdsys/405ex')
| -rw-r--r-- | board/gdsys/405ex/405ex.c | 22 | ||||
| -rw-r--r-- | board/gdsys/405ex/io64.c | 34 |
2 files changed, 29 insertions, 27 deletions
diff --git a/board/gdsys/405ex/405ex.c b/board/gdsys/405ex/405ex.c index 32e24c08c..c1a583ffb 100644 --- a/board/gdsys/405ex/405ex.c +++ b/board/gdsys/405ex/405ex.c @@ -11,6 +11,12 @@ #define REFLECTION_TESTPATTERN 0xdede #define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN & 0xffff) +#ifdef CONFIG_SYS_FPGA_NO_RFL_HI +#define REFLECTION_TESTREG reflection_low +#else +#define REFLECTION_TESTREG reflection_high +#endif + DECLARE_GLOBAL_DATA_PTR; int get_fpga_state(unsigned dev) @@ -220,23 +226,17 @@ int board_early_init_r(void) gd405ex_set_fpga_reset(0); for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { - struct ihs_fpga *fpga = - (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k); -#ifdef CONFIG_SYS_FPGA_NO_RFL_HI - u16 *reflection_target = &fpga->reflection_low; -#else - u16 *reflection_target = &fpga->reflection_high; -#endif /* * wait for fpga out of reset */ ctr = 0; while (1) { - out_le16(&fpga->reflection_low, - REFLECTION_TESTPATTERN); + u16 val; + + FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN); - if (in_le16(reflection_target) == - REFLECTION_TESTPATTERN_INV) + FPGA_GET_REG(k, REFLECTION_TESTREG, &val); + if (val == REFLECTION_TESTPATTERN_INV) break; udelay(100000); diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c index fa8961a35..2f8e30626 100644 --- a/board/gdsys/405ex/io64.c +++ b/board/gdsys/405ex/io64.c @@ -51,6 +51,8 @@ enum { HWVER_110 = 1, }; +struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR; + static inline void blank_string(int size) { int i; @@ -84,10 +86,9 @@ int misc_init_r(void) static void print_fpga_info(unsigned dev) { - struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev); - u16 versions = in_le16(&fpga->versions); - u16 fpga_version = in_le16(&fpga->fpga_version); - u16 fpga_features = in_le16(&fpga->fpga_features); + u16 versions; + u16 fpga_version; + u16 fpga_features; int fpga_state = get_fpga_state(dev); unsigned unit_type; @@ -95,6 +96,10 @@ static void print_fpga_info(unsigned dev) unsigned feature_channels; unsigned feature_expansion; + FPGA_GET_REG(dev, versions, &versions); + FPGA_GET_REG(dev, fpga_version, &fpga_version); + FPGA_GET_REG(dev, fpga_features, &fpga_features); + printf("FPGA%d: ", dev); if (fpga_state & FPGA_STATE_PLATFORM) printf("(legacy) "); @@ -226,8 +231,6 @@ int last_stage_init(void) { unsigned int k; unsigned int fpga; - struct ihs_fpga *fpga0 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0); - struct ihs_fpga *fpga1 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(1); int failed = 0; char str_phys[] = "Setup PHYs -"; char str_serdes[] = "Start SERDES blocks"; @@ -265,17 +268,16 @@ int last_stage_init(void) /* take fpga serdes blocks out of reset */ puts(str_serdes); udelay(500000); - out_le16(&fpga0->quad_serdes_reset, 0); - out_le16(&fpga1->quad_serdes_reset, 0); + FPGA_SET_REG(0, quad_serdes_reset, 0); + FPGA_SET_REG(1, quad_serdes_reset, 0); blank_string(strlen(str_serdes)); /* take channels out of reset */ puts(str_channels); udelay(500000); for (fpga = 0; fpga < 2; ++fpga) { - u16 *ch0_config_int = &(fpga ? fpga1 : fpga0)->ch0_config_int; for (k = 0; k < 32; ++k) - out_le16(ch0_config_int + 4 * k, 0); + FPGA_SET_REG(fpga, ch[k].config_int, 0); } blank_string(strlen(str_channels)); @@ -283,16 +285,16 @@ int last_stage_init(void) puts(str_locks); udelay(500000); for (fpga = 0; fpga < 2; ++fpga) { - u16 *ch0_status_int = &(fpga ? fpga1 : fpga0)->ch0_status_int; for (k = 0; k < 32; ++k) { - u16 status = in_le16(ch0_status_int + 4*k); + u16 status; + FPGA_GET_REG(k, ch[k].status_int, &status); if (!(status & (1 << 4))) { failed = 1; printf("fpga %d channel %d: no serdes lock\n", fpga, k); } /* reset events */ - out_le16(ch0_status_int + 4*k, status); + FPGA_SET_REG(fpga, ch[k].status_int, 0); } } blank_string(strlen(str_locks)); @@ -300,14 +302,14 @@ int last_stage_init(void) /* verify hicb_status */ puts(str_hicb); for (fpga = 0; fpga < 2; ++fpga) { - u16 *ch0_hicb_status_int = &(fpga ? fpga1 : fpga0)->ch0_hicb_status_int; for (k = 0; k < 32; ++k) { - u16 status = in_le16(ch0_hicb_status_int + 4*k); + u16 status; + FPGA_GET_REG(k, hicb_ch[k].status_int, &status); if (status) printf("fpga %d hicb %d: hicb status %04x\n", fpga, k, status); /* reset events */ - out_le16(ch0_hicb_status_int + 4*k, status); + FPGA_SET_REG(fpga, hicb_ch[k].status_int, 0); } } blank_string(strlen(str_hicb)); |