diff options
Diffstat (limited to 'board/freescale/p2020ds/p2020ds.c')
| -rw-r--r-- | board/freescale/p2020ds/p2020ds.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 608ff916d..f9882722c 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -218,9 +218,9 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); @@ -245,7 +245,7 @@ void pci_init_board(void) } #endif } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); #else @@ -258,13 +258,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf(" PCIE3 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE3: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); #else @@ -277,13 +277,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); #else |