diff options
Diffstat (limited to 'board/esd/cpci405/cpci405.c')
| -rw-r--r-- | board/esd/cpci405/cpci405.c | 18 | 
1 files changed, 9 insertions, 9 deletions
| diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 4c9ed2fa5..c29c876d6 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -179,22 +179,22 @@ int board_early_init_f(void)  	 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive  	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive  	 */ -	mtdcr(uicsr, 0xFFFFFFFF);	/* clear all ints */ -	mtdcr(uicer, 0x00000000);	/* disable all ints */ -	mtdcr(uiccr, 0x00000000);	/* set all to be non-critical*/ +	mtdcr(UIC0SR, 0xFFFFFFFF);	/* clear all ints */ +	mtdcr(UIC0ER, 0x00000000);	/* disable all ints */ +	mtdcr(UIC0CR, 0x00000000);	/* set all to be non-critical*/  #if defined(CONFIG_CPCI405_6U)  	if (cpci405_version() == 3) { -		mtdcr(uicpr, 0xFFFFFF99);	/* set int polarities */ +		mtdcr(UIC0PR, 0xFFFFFF99);	/* set int polarities */  	} else { -		mtdcr(uicpr, 0xFFFFFF81);	/* set int polarities */ +		mtdcr(UIC0PR, 0xFFFFFF81);	/* set int polarities */  	}  #else -	mtdcr(uicpr, 0xFFFFFF81);	/* set int polarities */ +	mtdcr(UIC0PR, 0xFFFFFF81);	/* set int polarities */  #endif -	mtdcr(uictr, 0x10000000);	/* set int trigger levels */ -	mtdcr(uicvcr, 0x00000001);	/* set vect base=0, +	mtdcr(UIC0TR, 0x10000000);	/* set int trigger levels */ +	mtdcr(UIC0VCR, 0x00000001);	/* set vect base=0,  					 * INT0 highest priority */ -	mtdcr(uicsr, 0xFFFFFFFF);	/* clear all ints */ +	mtdcr(UIC0SR, 0xFFFFFFFF);	/* clear all ints */  	return 0;  } |