diff options
Diffstat (limited to 'arch')
30 files changed, 64 insertions, 261 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 792cb4345..f4c2d8104 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -41,7 +41,17 @@ endif # Only test once ifneq ($(CONFIG_SPL_BUILD),y) -ALL-$(CONFIG_SYS_THUMB_BUILD) += checkthumb +ifeq ($(CONFIG_SYS_THUMB_BUILD),y) +archprepare: checkthumb + +checkthumb: + @if test "$(call cc-version)" -lt "0404"; then \ + echo -n '*** Your GCC does not produce working '; \ + echo 'binaries in THUMB mode.'; \ + echo '*** Your board is configured for THUMB mode.'; \ + false; \ + fi +endif endif # Try if EABI is supported, else fall back to old API, diff --git a/arch/arm/cpu/arm720t/tegra114/config.mk b/arch/arm/cpu/arm720t/tegra114/config.mk deleted file mode 100644 index 7947b50fd..000000000 --- a/arch/arm/cpu/arm720t/tegra114/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -# more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see <http://www.gnu.org/licenses/>. -# -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra124/config.mk b/arch/arm/cpu/arm720t/tegra124/config.mk deleted file mode 100644 index 5e10701f0..000000000 --- a/arch/arm/cpu/arm720t/tegra124/config.mk +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2010-2013 -# NVIDIA Corporation <www.nvidia.com> -# -# SPDX-License-Identifier: GPL-2.0+ -#/ -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra20/config.mk b/arch/arm/cpu/arm720t/tegra20/config.mk deleted file mode 100644 index e07334522..000000000 --- a/arch/arm/cpu/arm720t/tegra20/config.mk +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2010,2011 -# NVIDIA Corporation <www.nvidia.com> -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra30/config.mk b/arch/arm/cpu/arm720t/tegra30/config.mk deleted file mode 100644 index 2388c56db..000000000 --- a/arch/arm/cpu/arm720t/tegra30/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -# more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see <http://www.gnu.org/licenses/>. -# -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 45febcfd9..9fc81cd01 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -5,17 +5,8 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Build private libgcc only when asked for -ifdef USE_PRIVATE_LIBGCC -lib-y += _ashldi3.o -lib-y += _ashrdi3.o -lib-y += _divsi3.o -lib-y += _lshrdi3.o -lib-y += _modsi3.o -lib-y += _udivsi3.o -lib-y += _umodsi3.o -lib-y += div0.o -endif +lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _ashldi3.o _ashrdi3.o _divsi3.o \ + _lshrdi3.o _modsi3.o _udivsi3.o _umodsi3.o div0.o ifdef CONFIG_ARM64 obj-y += crt0_64.o diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk index adc97125b..fcaa44f1d 100644 --- a/arch/blackfin/config.mk +++ b/arch/blackfin/config.mk @@ -43,6 +43,7 @@ CREATE_LDR_ENV = endif SYM_PREFIX = _ +export SYM_PREFIX LDR_FLAGS-y := LDR_FLAGS-$(CONFIG_BFIN_BOOTROM_USES_EVT1) += -J diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index 7ee7faae8..332cd62c7 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -11,9 +11,7 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS := -march=mips32r2 - -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += -DCONFIG_MIPS32 -march=mips32r2 PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT ifdef CONFIG_SYS_BIG_ENDIAN PLATFORM_LDFLAGS += -m elf32btsmip @@ -21,4 +19,5 @@ else PLATFORM_LDFLAGS += -m elf32ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T $(srctree)/$(src)/mips.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 \ + -T $(srctree)/examples/standalone/mips.lds diff --git a/arch/mips/cpu/mips64/config.mk b/arch/mips/cpu/mips64/config.mk index 02113a1f0..c55eb7f2e 100644 --- a/arch/mips/cpu/mips64/config.mk +++ b/arch/mips/cpu/mips64/config.mk @@ -11,9 +11,7 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS = -march=mips64 - -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += -DCONFIG_MIPS64 -march=mips64 PLATFORM_CPPFLAGS += -mabi=64 -DCONFIG_64BIT ifdef CONFIG_SYS_BIG_ENDIAN PLATFORM_LDFLAGS += -m elf64btsmip @@ -21,4 +19,5 @@ else PLATFORM_LDFLAGS += -m elf64ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 -T $(srctree)/$(src)/mips64.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 \ + -T $(srctree)/examples/standalone/mips64.lds diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk index 00b0fd9c9..b8e53e55c 100644 --- a/arch/mips/cpu/xburst/config.mk +++ b/arch/mips/cpu/xburst/config.mk @@ -12,4 +12,5 @@ else PLATFORM_LDFLAGS += -m elf32ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T $(srctree)/$(src)/mips.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 \ + -T $(srctree)/examples/standalone/mips.lds diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 370592668..fabeb83f7 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -8,9 +8,4 @@ obj-y += board.o obj-$(CONFIG_CMD_BOOTM) += bootm.o -# Build private libgcc only when asked for -ifdef USE_PRIVATE_LIBGCC -lib-y += ashldi3.o -lib-y += ashrdi3.o -lib-y += lshrdi3.o -endif +lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o diff --git a/arch/nds32/config.mk b/arch/nds32/config.mk index 0cbc4ad05..10248524d 100644 --- a/arch/nds32/config.mk +++ b/arch/nds32/config.mk @@ -12,7 +12,8 @@ ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := nds32le-linux- endif -CONFIG_STANDALONE_LOAD_ADDR = 0x300000 -T $(srctree)/$(src)/nds32.lds +CONFIG_STANDALONE_LOAD_ADDR = 0x300000 \ + -T $(srctree)/examples/standalone/nds32.lds PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -mrelax PLATFORM_RELFLAGS += -gdwarf-2 diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk index e398f9798..fb7096e7b 100644 --- a/arch/powerpc/config.mk +++ b/arch/powerpc/config.mk @@ -35,5 +35,14 @@ endif # Only test once ifneq ($(CONFIG_SPL_BUILD),y) -ALL-y += checkgcc4 +archprepare: checkgcc4 + +# GCC 3.x is reported to have problems generating the type of relocation +# that U-Boot wants. +# See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html +checkgcc4: + @if test $(call cc-version) -lt 0400; then \ + echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \ + false; \ + fi endif diff --git a/arch/powerpc/cpu/mpc8260/config.mk b/arch/powerpc/cpu/mpc8260/config.mk index dfac710e6..59f152df7 100644 --- a/arch/powerpc/cpu/mpc8260/config.mk +++ b/arch/powerpc/cpu/mpc8260/config.mk @@ -5,5 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 \ +PLATFORM_CPPFLAGS += -DCONFIG_MPC8260 -DCONFIG_CPM2 \ -mstring -mcpu=603e -mmultiple diff --git a/arch/powerpc/cpu/mpc8260/kgdb.S b/arch/powerpc/cpu/mpc8260/kgdb.S index dd04d6bd6..1432344bc 100644 --- a/arch/powerpc/cpu/mpc8260/kgdb.S +++ b/arch/powerpc/cpu/mpc8260/kgdb.S @@ -9,8 +9,6 @@ #include <mpc8260.h> #include <version.h> -#define CONFIG_8260 1 /* needed for Linux kernel header files */ - #include <ppc_asm.tmpl> #include <ppc_defs.h> diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S index 65510fa76..324f132ba 100644 --- a/arch/powerpc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -14,8 +14,6 @@ #include <mpc8260.h> #include <version.h> -#define CONFIG_8260 1 /* needed for Linux kernel header files */ - #include <ppc_asm.tmpl> #include <ppc_defs.h> diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index fe928db03..f8d03cba2 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -49,7 +49,6 @@ "SDRAM_" #mnemonic, SDRAM_##mnemonic, data); \ } while (0) -#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) static void update_rdcc(void) { u32 val; @@ -72,7 +71,6 @@ static void update_rdcc(void) } } } -#endif #if defined(CONFIG_440) /* @@ -101,7 +99,6 @@ void dcbz_area(u32 start_address, u32 num_bytes); #define MULDIV64(m1, m2, d) (u32)(((u64)(m1) * (u64)(m2)) / (u64)(d)) -#if !defined(CONFIG_NAND_SPL) /*-----------------------------------------------------------------------------+ * sdram_memsize *-----------------------------------------------------------------------------*/ @@ -217,7 +214,6 @@ void board_add_ram_info(int use_default) val = (val & SDRAM_MMODE_DCL_MASK) >> 4; printf(", CL%d)", val); } -#endif /* !CONFIG_NAND_SPL */ #if defined(CONFIG_SPD_EEPROM) @@ -2843,16 +2839,6 @@ static void test(void) *---------------------------------------------------------------------------*/ phys_size_t initdram(int board_type) { - /* - * Only run this SDRAM init code once. For NAND booting - * targets like Kilauea, we call initdram() early from the - * 4k NAND booting image (CONFIG_NAND_SPL) from nand_boot(). - * Later on the NAND U-Boot image runs (CONFIG_NAND_U_BOOT) - * which calls initdram() again. This time the controller - * mustn't be reconfigured again since we're already running - * from SDRAM. - */ -#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) unsigned long val; #if defined(CONFIG_440) @@ -2969,12 +2955,10 @@ phys_size_t initdram(int board_type) #endif #if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) -#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) /*------------------------------------------------------------------ | DQS calibration. +-----------------------------------------------------------------*/ DQS_autocalibration(); -#endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */ #endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ /* @@ -3009,13 +2993,10 @@ phys_size_t initdram(int board_type) set_mcsr(get_mcsr()); #endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ -#endif /* !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) */ - return (CONFIG_SYS_MBYTES_SDRAM << 20); } #endif /* CONFIG_SPD_EEPROM */ -#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #if defined(CONFIG_440) u32 mfdcr_any(u32 dcr) { @@ -3062,7 +3043,6 @@ void mtdcr_any(u32 dcr, u32 val) } } #endif /* defined(CONFIG_440) */ -#endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */ inline void ppc4xx_ibm_ddr2_register_dump(void) { diff --git a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c index 82823147f..67f149dee 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c @@ -27,12 +27,6 @@ #include "ecc.h" -/* - * Only compile the DDR auto-calibration code for NOR boot and - * not for NAND boot (NAND SPL and NAND U-Boot - NUB) - */ -#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) - #define MAXBXCF 4 #define SDRAM_RXBAS_SHIFT_1M 20 @@ -1231,9 +1225,3 @@ u32 DQS_autocalibration(void) return 0; } -#else /* defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) */ -u32 DQS_autocalibration(void) -{ - return 0; -} -#endif /* !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) */ diff --git a/arch/powerpc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile index 14b520ff9..4b792ae2d 100644 --- a/arch/powerpc/cpu/ppc4xx/Makefile +++ b/arch/powerpc/cpu/ppc4xx/Makefile @@ -14,11 +14,7 @@ obj-y += kgdb.o obj-y += 40x_spd_sdram.o -ifndef CONFIG_NAND_SPL -ifndef CONFIG_NAND_U_BOOT obj-y += 44x_spd_ddr.o -endif -endif obj-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o obj-$(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) += 4xx_ibm_ddr2_autocalib.o obj-y += 4xx_pci.o diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index e72c37c75..11b55d5a5 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -182,16 +182,13 @@ .extern ext_bus_cntlr_init -#ifdef CONFIG_NAND_U_BOOT - .extern reconfig_tlb0 -#endif /* * Set up GOT: Global Offset Table * * Use r12 to access the GOT */ -#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_SPL_BUILD) START_GOT GOT_ENTRY(_GOT2_TABLE_) GOT_ENTRY(_FIXUP_TABLE_) @@ -205,22 +202,7 @@ GOT_ENTRY(__bss_end) GOT_ENTRY(__bss_start) END_GOT -#endif /* CONFIG_NAND_SPL */ - -#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \ - !defined(CONFIG_SPL_BUILD) - /* - * NAND U-Boot image is started from offset 0 - */ - .text -#if defined(CONFIG_440) - bl reconfig_tlb0 -#endif - GET_GOT - bl cpu_init_f /* run low-level CPU init code (from Flash) */ - bl board_init_f - /* NOTREACHED - board_init_f() does not return */ -#endif +#endif /* CONFIG_SPL_BUILD */ #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_BOOT_FROM_XMD) /* @@ -255,9 +237,7 @@ */ #if defined(CONFIG_440) -#if !defined(CONFIG_NAND_SPL) .section .bootpg,"ax" -#endif .globl _start_440 /**************************************************************************/ @@ -511,7 +491,7 @@ tlbnx2: addi r4,r4,1 /* Next TLB */ * r3 - 1st arg to board_init(): IMMP pointer * r4 - 2nd arg to board_init(): boot flag */ -#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_SPL_BUILD) .text .long 0x27051956 /* U-Boot Magic Number */ .globl version_string @@ -777,9 +757,6 @@ _start: stwu r1,-8(r1) /* Save back chain and move SP */ stw r0,+12(r1) /* Save return addr (underflow vect) */ -#ifdef CONFIG_NAND_SPL - bl nand_boot_common /* will not return */ -#else #ifndef CONFIG_SPL_BUILD GET_GOT #endif @@ -787,7 +764,6 @@ _start: bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f /* NOTREACHED - board_init_f() does not return */ -#endif #endif /* CONFIG_440 */ @@ -1050,9 +1026,6 @@ _start: stw r0, +12(r1) /* Save return addr (underflow vect) */ #endif /* CONFIG_SYS_INIT_DCACHE_CS */ -#ifdef CONFIG_NAND_SPL - bl nand_boot_common /* will not return */ -#else GET_GOT /* initialize GOT access */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ @@ -1060,13 +1033,11 @@ _start: bl board_init_f /* run first part of init code (from Flash) */ /* NOTREACHED - board_init_f() does not return */ -#endif /* CONFIG_NAND_SPL */ - #endif /* CONFIG_405GP || CONFIG_405 || CONFIG_405EP */ /*----------------------------------------------------------------------- */ -#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_SPL_BUILD) /* * This code finishes saving the registers to the exception frame * and jumps to the appropriate handler for the exception. @@ -1632,7 +1603,7 @@ __440_msr_continue: blr function_epilog(dcbz_area) #endif /* CONFIG_440 */ -#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_SPL_BUILD */ /*------------------------------------------------------------------------------- */ /* Function: in8 */ @@ -1981,75 +1952,3 @@ pll_wait: blr function_epilog(mftlb1) #endif /* CONFIG_440 */ - -#if defined(CONFIG_NAND_SPL) -/* - * void nand_boot_relocate(dst, src, bytes) - * - * r3 = Destination address to copy code to (in SDRAM) - * r4 = Source address to copy code from - * r5 = size to copy in bytes - */ -nand_boot_relocate: - mr r6,r3 - mr r7,r4 - mflr r8 - - /* - * Copy SPL from icache into SDRAM - */ - subi r3,r3,4 - subi r4,r4,4 - srwi r5,r5,2 - mtctr r5 -..spl_loop: - lwzu r0,4(r4) - stwu r0,4(r3) - bdnz ..spl_loop - - /* - * Calculate "corrected" link register, so that we "continue" - * in execution in destination range - */ - sub r3,r7,r6 /* r3 = src - dst */ - sub r8,r8,r3 /* r8 = link-reg - (src - dst) */ - mtlr r8 - blr - -nand_boot_common: - /* - * First initialize SDRAM. It has to be available *before* calling - * nand_boot(). - */ - lis r3,CONFIG_SYS_SDRAM_BASE@h - ori r3,r3,CONFIG_SYS_SDRAM_BASE@l - bl initdram - - /* - * Now copy the 4k SPL code into SDRAM and continue execution - * from there. - */ - lis r3,CONFIG_SYS_NAND_BOOT_SPL_DST@h - ori r3,r3,CONFIG_SYS_NAND_BOOT_SPL_DST@l - lis r4,CONFIG_SYS_NAND_BOOT_SPL_SRC@h - ori r4,r4,CONFIG_SYS_NAND_BOOT_SPL_SRC@l - lis r5,CONFIG_SYS_NAND_BOOT_SPL_SIZE@h - ori r5,r5,CONFIG_SYS_NAND_BOOT_SPL_SIZE@l - bl nand_boot_relocate - - /* - * We're running from SDRAM now!!! - * - * It is necessary for 4xx systems to relocate from running at - * the original location (0xfffffxxx) to somewhere else (SDRAM - * preferably). This is because CS0 needs to be reconfigured for - * NAND access. And we can't reconfigure this CS when currently - * "running" from it. - */ - - /* - * Finally call nand_boot() to load main NAND U-Boot image from - * NAND and jump to it. - */ - bl nand_boot /* will not return */ -#endif /* CONFIG_NAND_SPL */ diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 831804c5c..72f30feee 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -1356,7 +1356,7 @@ void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); #elif defined(CONFIG_GEMINI) #define _machine _MACH_gemini #define have_of 0 -#elif defined(CONFIG_8260) +#elif defined(CONFIG_MPC8260) #define _machine _MACH_8260 #define have_of 0 #elif defined(CONFIG_SANDPOINT) diff --git a/arch/powerpc/include/asm/status_led.h b/arch/powerpc/include/asm/status_led.h index 037570993..441619042 100644 --- a/arch/powerpc/include/asm/status_led.h +++ b/arch/powerpc/include/asm/status_led.h @@ -11,7 +11,7 @@ #ifndef CONFIG_BOARD_SPECIFIC_LED # if defined(CONFIG_8xx) # include <mpc8xx.h> -# elif defined(CONFIG_8260) +# elif defined(CONFIG_MPC8260) # include <mpc8260.h> # elif defined(CONFIG_5xx) # include <mpc5xx.h> diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h index 5916f7ce9..3c2842057 100644 --- a/arch/powerpc/include/asm/u-boot.h +++ b/arch/powerpc/include/asm/u-boot.h @@ -35,7 +35,7 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ -#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \ +#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \ || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) unsigned long bi_immr_base; /* base of IMMR register */ #endif diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index e6d8be51c..0f6298269 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -7,11 +7,7 @@ ## Build a couple of necessary functions into a private libgcc ## if the user asked for it -ifdef USE_PRIVATE_LIBGCC -lib-y += _ashldi3.o -lib-y += _ashrdi3.o -lib-y += _lshrdi3.o -endif +lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _ashldi3.o _ashrdi3.o _lshrdi3.o MINIMAL= diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 13d761c1f..f86c6f3e8 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -277,10 +277,10 @@ static init_fnc_t *init_sequence[] = { serial_init, console_init_f, display_options, -#if defined(CONFIG_8260) +#if defined(CONFIG_MPC8260) prt_8260_rsr, prt_8260_clks, -#endif /* CONFIG_8260 */ +#endif /* CONFIG_MPC8260 */ #if defined(CONFIG_MPC83xx) prt_83xx_rsr, #endif @@ -504,7 +504,7 @@ void board_init_f(ulong bootflag) bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ #endif -#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ +#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ defined(CONFIG_E500) || defined(CONFIG_MPC86xx) bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ #endif diff --git a/arch/powerpc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c index 19a56dbe2..01a7708ae 100644 --- a/arch/powerpc/lib/kgdb.c +++ b/arch/powerpc/lib/kgdb.c @@ -159,7 +159,7 @@ kgdb_trap(struct pt_regs *regs) #define SPACE_REQUIRED ((32*4)+(32*8)+(6*4)) -#ifdef CONFIG_8260 +#ifdef CONFIG_MPC8260 /* store floating double indexed */ #define STFDI(n,p) __asm__ __volatile__ ("stfd " #n ",%0" : "=o"(p[2*n])) /* store floating double multiple */ @@ -190,7 +190,7 @@ kgdb_getregs(struct pt_regs *regs, char *buf, int max) *ptr++ = regs->gpr[i]; /* Floating Point Regs */ -#ifdef CONFIG_8260 +#ifdef CONFIG_MPC8260 STFDM(ptr); ptr += 32*2; #else @@ -213,7 +213,7 @@ kgdb_getregs(struct pt_regs *regs, char *buf, int max) /* set the value of the CPU registers */ -#ifdef CONFIG_8260 +#ifdef CONFIG_MPC8260 /* load floating double */ #define LFD(n,v) __asm__ __volatile__ ("lfd " #n ",%0" :: "o"(v)) /* load floating double indexed */ @@ -252,7 +252,7 @@ kgdb_putreg(struct pt_regs *regs, int regno, char *buf, int length) regs->gpr[regno] = *ptr; else switch (regno) { -#ifdef CONFIG_8260 +#ifdef CONFIG_MPC8260 #define caseF(n) \ case (n) + 32: LFD(n, *ptr); break; @@ -298,7 +298,7 @@ kgdb_putregs(struct pt_regs *regs, char *buf, int length) regs->gpr[i] = *ptr++; /* Floating Point Regs */ -#ifdef CONFIG_8260 +#ifdef CONFIG_MPC8260 LFDM(ptr); #endif ptr += 32*2; diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 2e2fc58a1..98f565eaa 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -92,6 +92,11 @@ int os_close(int fd) return close(fd); } +int os_unlink(const char *pathname) +{ + return unlink(pathname); +} + void os_exit(int exit_code) { exit(exit_code); diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index 5fc9d9d66..8a84b24af 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -15,15 +15,5 @@ obj-y += time.o endif obj-$(CONFIG_CMD_SH_ZIMAGEBOOT) += zimageboot.o - - -# Build private libgcc only when asked for -ifdef USE_PRIVATE_LIBGCC -lib-y += ashiftrt.o -lib-y += ashiftlt.o -lib-y += lshiftrt.o -lib-y += ashldi3.o -lib-y += ashrsi3.o -lib-y += lshrdi3.o -lib-y += movmem.o -endif +lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashiftrt.o ashiftlt.o lshiftrt.o \ + ashldi3.o ashrsi3.o lshrdi3.o movmem.o diff --git a/arch/sparc/config.mk b/arch/sparc/config.mk index e2327ecfa..be59f5819 100644 --- a/arch/sparc/config.mk +++ b/arch/sparc/config.mk @@ -9,7 +9,9 @@ ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := sparc-elf- endif +gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`) + CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000 -L $(gcclibdir) \ - -T $(srctree)/$(src)/sparc.lds + -T $(srctree)/examples/standalone/sparc.lds PLATFORM_CPPFLAGS += -DCONFIG_SPARC -D__sparc__ diff --git a/arch/x86/config.mk b/arch/x86/config.mk index 58dff1467..1e52a5e9b 100644 --- a/arch/x86/config.mk +++ b/arch/x86/config.mk @@ -31,4 +31,4 @@ LDFLAGS_FINAL += --wrap=__moddi3 --wrap=__umoddi3 export NORMAL_LIBGCC = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) PREFIXED_LIBGCC = $(OBJTREE)/arch/$(ARCH)/lib/$(shell basename $(NORMAL_LIBGCC)) -export USE_PRIVATE_LIBGCC=$(shell dirname $(PREFIXED_LIBGCC)) +CONFIG_USE_PRIVATE_LIBGCC=$(shell dirname $(PREFIXED_LIBGCC)) |