diff options
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/include/asm/clk.h | 5 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7706.h | 5 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7710.h | 5 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7720.h | 10 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7722.h | 11 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7723.h | 11 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7724.h | 11 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7734.h | 4 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7750.h | 21 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7757.h | 14 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7763.h | 5 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7780.h | 24 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7785.h | 24 | ||||
| -rw-r--r-- | arch/sh/lib/time.c | 27 | 
14 files changed, 26 insertions, 151 deletions
diff --git a/arch/sh/include/asm/clk.h b/arch/sh/include/asm/clk.h index 9cac6b09f..2164bfb3a 100644 --- a/arch/sh/include/asm/clk.h +++ b/arch/sh/include/asm/clk.h @@ -27,9 +27,4 @@ static inline unsigned long get_peripheral_clk_rate(void)  	return CONFIG_SYS_CLK_FREQ;  } -static inline unsigned long get_tmu0_clk_rate(void) -{ -	return CONFIG_SYS_CLK_FREQ; -} -  #endif /* __ASM_SH_CLK_H__ */ diff --git a/arch/sh/include/asm/cpu_sh7706.h b/arch/sh/include/asm/cpu_sh7706.h index d093f88d4..8066ff719 100644 --- a/arch/sh/include/asm/cpu_sh7706.h +++ b/arch/sh/include/asm/cpu_sh7706.h @@ -41,10 +41,7 @@  #define SCIF0_BASE	SCSMR_2  /* Timer */ -#define TSTR0		0xFFFFFE92 -#define TSTR		TSTR0 -#define TCNT0		0xFFFFFE98 -#define TCR0		0xFFFFFE9C +#define TMU_BASE	0xFFFFFE90  /* On chip oscillator circuits */  #define	WTCNT	0xFFFFFF84 diff --git a/arch/sh/include/asm/cpu_sh7710.h b/arch/sh/include/asm/cpu_sh7710.h index e223f1ca1..e4ecef7f7 100644 --- a/arch/sh/include/asm/cpu_sh7710.h +++ b/arch/sh/include/asm/cpu_sh7710.h @@ -51,10 +51,7 @@  #define SCIF1_BASE	SCSMR_1  /* Timer */ -#define TSTR0		0xA412FE92 -#define TSTR		TSTR0 -#define TCNT0		0xa412FE98 -#define TCR0		0xa412FE9C +#define TMU_BASE	0xA412FE90  /* On chip oscillator circuits */  #define FRQCR		0xA415FF80 diff --git a/arch/sh/include/asm/cpu_sh7720.h b/arch/sh/include/asm/cpu_sh7720.h index 1b393b88a..a8013cc96 100644 --- a/arch/sh/include/asm/cpu_sh7720.h +++ b/arch/sh/include/asm/cpu_sh7720.h @@ -105,16 +105,6 @@  /*	TMU	*/  #define TMU_BASE	0xA412FE90 -#define TSTR		(TMU_BASE + 0x02) -#define TCOR0		(TMU_BASE + 0x04) -#define TCNT0		(TMU_BASE + 0x08) -#define TCR0		(TMU_BASE + 0x0C) -#define TCOR1		(TMU_BASE + 0x10) -#define TCNT1		(TMU_BASE + 0x14) -#define TCR1		(TMU_BASE + 0x18) -#define TCOR2		(TMU_BASE + 0x1C) -#define TCNT2		(TMU_BASE + 0x20) -#define TCR2		(TMU_BASE + 0x24)  /*	TPU	*/  #define TPU_BASE	0xA4480000 diff --git a/arch/sh/include/asm/cpu_sh7722.h b/arch/sh/include/asm/cpu_sh7722.h index 3157dcbf1..92dfe27cc 100644 --- a/arch/sh/include/asm/cpu_sh7722.h +++ b/arch/sh/include/asm/cpu_sh7722.h @@ -226,16 +226,7 @@  /*	TMU	*/ -#define TSTR        0xFFD80004 -#define TCOR0       0xFFD80008 -#define TCNT0       0xFFD8000C -#define TCR0        0xFFD80010 -#define TCOR1       0xFFD80014 -#define TCNT1       0xFFD80018 -#define TCR1        0xFFD8001C -#define TCOR2       0xFFD80020 -#define TCNT2       0xFFD80024 -#define TCR2        0xFFD80028 +#define TMU_BASE	0xFFD80000  /*	TPU	*/  #define TPU_TSTR    0xA4C90000 diff --git a/arch/sh/include/asm/cpu_sh7723.h b/arch/sh/include/asm/cpu_sh7723.h index 6dac6e9a0..2595f298d 100644 --- a/arch/sh/include/asm/cpu_sh7723.h +++ b/arch/sh/include/asm/cpu_sh7723.h @@ -95,16 +95,7 @@  #define WTCNT		RWTCNT  /* TMU */ -#define TSTR        0xFFD80004 -#define TCOR0       0xFFD80008 -#define TCNT0       0xFFD8000C -#define TCR0        0xFFD80010 -#define TCOR1       0xFFD80014 -#define TCNT1       0xFFD80018 -#define TCR1        0xFFD8001C -#define TCOR2       0xFFD80020 -#define TCNT2       0xFFD80024 -#define TCR2        0xFFD80028 +#define TMU_BASE	0xFFD80000  /* TPU */ diff --git a/arch/sh/include/asm/cpu_sh7724.h b/arch/sh/include/asm/cpu_sh7724.h index 3bb51d3f1..cd40b6d22 100644 --- a/arch/sh/include/asm/cpu_sh7724.h +++ b/arch/sh/include/asm/cpu_sh7724.h @@ -116,16 +116,7 @@  #define WTCNT		RWTCNT  /* TMU */ -#define TSTR        0xFFD80004 -#define TCOR0       0xFFD80008 -#define TCNT0       0xFFD8000C -#define TCR0        0xFFD80010 -#define TCOR1       0xFFD80014 -#define TCNT1       0xFFD80018 -#define TCR1        0xFFD8001C -#define TCOR2       0xFFD80020 -#define TCNT2       0xFFD80024 -#define TCR2        0xFFD80028 +#define TMU_BASE	0xFFD80000  /* TPU */ diff --git a/arch/sh/include/asm/cpu_sh7734.h b/arch/sh/include/asm/cpu_sh7734.h index 0f84b4f57..179a35751 100644 --- a/arch/sh/include/asm/cpu_sh7734.h +++ b/arch/sh/include/asm/cpu_sh7734.h @@ -36,9 +36,7 @@  #define SCIF5_BASE  0xFFE45000  /* Timer */ -#define TSTR	0xFFD80004 -#define TCNT0	0xFFD8000C -#define TCR0	0xFFD80010 +#define TMU_BASE 0xFFD80000  /* PFC */  #define PMMR    (0xFFFC0000) diff --git a/arch/sh/include/asm/cpu_sh7750.h b/arch/sh/include/asm/cpu_sh7750.h index b3e84244f..88c4c8d58 100644 --- a/arch/sh/include/asm/cpu_sh7750.h +++ b/arch/sh/include/asm/cpu_sh7750.h @@ -143,26 +143,7 @@  #define CLKSTPCLR	0xFE0A0008  /*      TMU     */ -#define TSTR2	0xFE100004 -#define TCOR3	0xFE100008 -#define TCNT3	0xFE10000C -#define TCR3	0xFE100010 -#define TCOR4	0xFE100014 -#define TCNT4	0xFE100018 -#define TCR4	0xFE10001C -#define TOCR	0xFFD80000 -#define TSTR0	0xFFD80004 -#define TCOR0	0xFFD80008 -#define TCNT0	0xFFD8000C -#define TCR0	0xFFD80010 -#define TCOR1	0xFFD80014 -#define TCNT1	0xFFD80018 -#define TCR1	0xFFD8001C -#define TCOR2	0xFFD80020 -#define TCNT2	0xFFD80024 -#define TCR2	0xFFD80028 -#define TCPR2	0xFFD8002C -#define TSTR	TSTR0 +#define TMU_BASE	0xFFD80000  /*      SCI     */  #define SCSMR1	0xFFE00000 diff --git a/arch/sh/include/asm/cpu_sh7757.h b/arch/sh/include/asm/cpu_sh7757.h index 17a6537bc..43c1f07b9 100644 --- a/arch/sh/include/asm/cpu_sh7757.h +++ b/arch/sh/include/asm/cpu_sh7757.h @@ -51,19 +51,7 @@ struct mmu_regs {  #define SMR0		0xfe470000  /* TMU0 */ -#define TSTR		0xFE430004 -#define TOCR		0xFE430000 -#define TSTR0		0xFE430004 -#define TCOR0		0xFE430008 -#define TCNT0		0xFE43000C -#define TCR0		0xFE430010 -#define TCOR1		0xFE430014 -#define TCNT1		0xFE430018 -#define TCR1		0xFE43001C -#define TCOR2		0xFE430020 -#define TCNT2		0xFE430024 -#define TCR2		0xFE430028 -#define TCPR2		0xFE43002C +#define TMU_BASE    0xFE430000  /* ETHER, GETHER MAC address */  struct ether_mac_regs { diff --git a/arch/sh/include/asm/cpu_sh7763.h b/arch/sh/include/asm/cpu_sh7763.h index 78b456b4b..36d70655c 100644 --- a/arch/sh/include/asm/cpu_sh7763.h +++ b/arch/sh/include/asm/cpu_sh7763.h @@ -43,9 +43,6 @@  #define WDTST		0xFFCC0000  /* TMU */ -#define TSTR		0xFFD80004 -#define TCOR0		0xFFD80008 -#define TCNT0		0xFFD8000C -#define TCR0		0xFFD80010 +#define TMU_BASE	0xFFD80000  #endif /* _ASM_CPU_SH7763_H_ */ diff --git a/arch/sh/include/asm/cpu_sh7780.h b/arch/sh/include/asm/cpu_sh7780.h index e9c59fe24..162aa688f 100644 --- a/arch/sh/include/asm/cpu_sh7780.h +++ b/arch/sh/include/asm/cpu_sh7780.h @@ -272,29 +272,7 @@  #define	MSTPCR	0xFFC80030  /* Timer Unit */ -#define	TSTR	TSTR0 -#define	TOCR	0xFFD80000 -#define	TSTR0	0xFFD80004 -#define	TCOR0	0xFFD80008 -#define	TCNT0	0xFFD8000C -#define	TCR0	0xFFD80010 -#define	TCOR1	0xFFD80014 -#define	TCNT1	0xFFD80018 -#define	TCR1	0xFFD8001C -#define	TCOR2	0xFFD80020 -#define	TCNT2	0xFFD80024 -#define	TCR2	0xFFD80028 -#define	TCPR2	0xFFD8002C -#define	TSTR1	0xFFDC0004 -#define	TCOR3	0xFFDC0008 -#define	TCNT3	0xFFDC000C -#define	TCR3	0xFFDC0010 -#define	TCOR4	0xFFDC0014 -#define	TCNT4	0xFFDC0018 -#define	TCR4	0xFFDC001C -#define	TCOR5	0xFFDC0020 -#define	TCNT5	0xFFDC0024 -#define	TCR5	0xFFDC0028 +#define TMU_BASE    0xFFD80000  /* Timer/Counter */  #define	CMTCFG	0xFFE30000 diff --git a/arch/sh/include/asm/cpu_sh7785.h b/arch/sh/include/asm/cpu_sh7785.h index 4a4dfc904..8e3839d1a 100644 --- a/arch/sh/include/asm/cpu_sh7785.h +++ b/arch/sh/include/asm/cpu_sh7785.h @@ -46,29 +46,7 @@  #define	WDTBCNT	0xFFCC0018  /* Timer Unit */ -#define	TSTR	TSTR0 -#define	TOCR	0xFFD80000 -#define	TSTR0	0xFFD80004 -#define	TCOR0	0xFFD80008 -#define	TCNT0	0xFFD8000C -#define	TCR0	0xFFD80010 -#define	TCOR1	0xFFD80014 -#define	TCNT1	0xFFD80018 -#define	TCR1	0xFFD8001C -#define	TCOR2	0xFFD80020 -#define	TCNT2	0xFFD80024 -#define	TCR2	0xFFD80028 -#define	TCPR2	0xFFD8002C -#define	TSTR1	0xFFDC0004 -#define	TCOR3	0xFFDC0008 -#define	TCNT3	0xFFDC000C -#define	TCR3	0xFFDC0010 -#define	TCOR4	0xFFDC0014 -#define	TCNT4	0xFFDC0018 -#define	TCR4	0xFFDC001C -#define	TCOR5	0xFFDC0020 -#define	TCNT5	0xFFDC0024 -#define	TCR5	0xFFDC0028 +#define TMU_BASE	0xFFD80000  /* Serial Communication	Interface with FIFO */  #define	SCIF1_BASE	0xffeb0000 diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index a01596cac..48404727c 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -2,7 +2,7 @@   * (C) Copyright 2009   * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>   * - * (C) Copyright 2007-2010 + * (C) Copyright 2007-2012   * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>   *   * (C) Copyright 2003 @@ -32,6 +32,9 @@  #include <asm/processor.h>  #include <asm/clk.h>  #include <asm/io.h> +#include <sh_tmu.h> + +static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;  #define TMU_MAX_COUNTER (~0UL) @@ -55,21 +58,21 @@ static inline unsigned long long usec_to_tick(unsigned long long usec)  	return usec;  } -static void tmu_timer_start (unsigned int timer) +static void tmu_timer_start(unsigned int timer)  {  	if (timer > 2)  		return; -	writeb(readb(TSTR) | (1 << timer), TSTR); +	writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr);  } -static void tmu_timer_stop (unsigned int timer) +static void tmu_timer_stop(unsigned int timer)  {  	if (timer > 2)  		return; -	writeb(readb(TSTR) & ~(1 << timer), TSTR); +	writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr);  } -int timer_init (void) +int timer_init(void)  {  	/* Divide clock by CONFIG_SYS_TMU_CLK_DIV */  	u16 bit = 0; @@ -91,7 +94,7 @@ int timer_init (void)  	default:  		break;  	} -	writew(readw(TCR0) | bit, TCR0); +	writew(readw(&tmu->tcr0) | bit, &tmu->tcr0);  	/* Calc clock rate */  	timer_freq = get_tmu0_clk_rate() >> ((bit + 1) * 2); @@ -105,9 +108,9 @@ int timer_init (void)  	return 0;  } -unsigned long long get_ticks (void) +unsigned long long get_ticks(void)  { -	unsigned long tcnt = 0 - readl(TCNT0); +	unsigned long tcnt = 0 - readl(&tmu->tcnt0);  	if (last_tcnt > tcnt) /* overflow */  		overflow_ticks++; @@ -116,7 +119,7 @@ unsigned long long get_ticks (void)  	return (overflow_ticks << 32) | tcnt;  } -void __udelay (unsigned long usec) +void __udelay(unsigned long usec)  {  	unsigned long long tmp;  	ulong tmo; @@ -128,13 +131,13 @@ void __udelay (unsigned long usec)  		 /*NOP*/;  } -unsigned long get_timer (unsigned long base) +unsigned long get_timer(unsigned long base)  {  	/* return msec */  	return tick_to_time(get_ticks()) - base;  } -unsigned long get_tbclk (void) +unsigned long get_tbclk(void)  {  	return timer_freq;  }  |