diff options
Diffstat (limited to 'arch/powerpc')
36 files changed, 214 insertions, 83 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 2318064a4..4669883a3 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -73,6 +73,7 @@ COBJS-$(CONFIG_P1014) += ddr-gen3.o COBJS-$(CONFIG_P1020) += ddr-gen3.o COBJS-$(CONFIG_P1021) += ddr-gen3.o COBJS-$(CONFIG_P1022) += ddr-gen3.o +COBJS-$(CONFIG_P1023) += ddr-gen3.o COBJS-$(CONFIG_P1024) += ddr-gen3.o COBJS-$(CONFIG_P1025) += ddr-gen3.o COBJS-$(CONFIG_P2010) += ddr-gen3.o diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 422782ca8..a7ed87769 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -258,6 +258,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_USB14 puts("Work-around for Erratum USB14 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A006593 + puts("Work-around for Erratum A006593 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 6ce483e17..fbee75390 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -121,16 +121,16 @@ int checkcpu (void) switch(ver) { case PVR_VER_E500_V1: case PVR_VER_E500_V2: - puts("E500"); + puts("e500"); break; case PVR_VER_E500MC: - puts("E500MC"); + puts("e500mc"); break; case PVR_VER_E5500: - puts("E5500"); + puts("e5500"); break; case PVR_VER_E6500: - puts("E6500"); + puts("e6500"); break; default: puts("Unknown"); @@ -341,7 +341,7 @@ phys_size_t initdram(int board_type) #if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD) return fsl_ddr_sdram_size(); #else - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + return (phys_size_t)CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; #endif } #else /* CONFIG_SYS_RAMBOOT */ diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 4067f0537..3c8f59cdb 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -172,6 +172,9 @@ static void enable_cpc(void) #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003 setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_DATA_ECC_SCRUB_DIS); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A006593 + setbits_be32(&cpc->cpchdbcr0, 1 << (31 - 21)); +#endif out_be32(&cpc->cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE); /* Read back to sync write */ @@ -564,7 +567,7 @@ skip_l2: #ifdef CONFIG_SYS_SRIO srio_init(); -#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER +#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER char *s = getenv("bootmaster"); if (s) { if (!strcmp(s, "SRIO1")) { diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 234fde484..837c034be 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) && !defined(CONFIG_SYS_RAMBOOT) +#ifdef CONFIG_A003399_NOR_WORKAROUND void setup_ifc(void) { struct fsl_ifc *ifc_regs = (void *)CONFIG_SYS_IFC_ADDR; @@ -99,7 +99,7 @@ void cpu_init_early_f(void) #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif -#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) && !defined(CONFIG_SYS_RAMBOOT) +#ifdef CONFIG_A003399_NOR_WORKAROUND ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; u32 *dst, *src; void (*setup_ifc_sram)(void); @@ -138,7 +138,7 @@ void cpu_init_early_f(void) * Work Around for IFC Erratum A003399, issue will hit only when execution * from NOR Flash */ -#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) && !defined(CONFIG_SYS_RAMBOOT) +#ifdef CONFIG_A003399_NOR_WORKAROUND #define SRAM_BASE_ADDR (0x00000000) /* TLB for SRAM */ mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(9); @@ -180,5 +180,9 @@ void cpu_init_early_f(void) invalidate_tlb(1); +#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NAND_SPL) + disable_tlb(CONFIG_SYS_PPC_E500_DEBUG_TLB); +#endif + init_tlbs(); } diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 288f7b286..bb95f3d50 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -663,7 +663,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); - do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2", + do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); do_fixup_by_compat_u32(blob, "fsl,mpic", "clock-frequency", get_bus_freq(0)/2, 1); diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c index 6dadeb8ca..ec96e81ed 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c @@ -228,7 +228,7 @@ void fsl_serdes_init(void) break; } - if (srds1_io_sel > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds1_io_sel >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[SRDS1_IO_SEL] = %d\n", srds1_io_sel); return; } @@ -237,7 +237,7 @@ void fsl_serdes_init(void) serdes1_prtcl_map |= (1 << lane_prtcl); } - if (srds2_io_sel > ARRAY_SIZE(serdes2_cfg_tbl)) { + if (srds2_io_sel >= ARRAY_SIZE(serdes2_cfg_tbl)) { printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_io_sel); return; } diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c index 7c490972a..3483366e6 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c @@ -68,7 +68,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } @@ -77,7 +77,7 @@ void fsl_serdes_init(void) serdes1_prtcl_map |= (1 << lane_prtcl); } - if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c index 76288cd56..c9eea15d3 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c @@ -53,7 +53,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg); - if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds1_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg); return ; } diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c index 258263739..49a029062 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c @@ -53,7 +53,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c index f480c2609..7af6aff25 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c @@ -62,7 +62,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c index 2ff5d9a06..fcccb52b6 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c @@ -57,7 +57,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c index e8a0387ca..1f7dba0d6 100644 --- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c @@ -54,7 +54,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } @@ -63,7 +63,7 @@ void fsl_serdes_init(void) serdes1_prtcl_map |= (1 << lane_prtcl); } - if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c index 1849c1642..d6d2696e0 100644 --- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c @@ -73,7 +73,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c index e4c9c2210..ed4992053 100644 --- a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c @@ -93,7 +93,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } @@ -102,7 +102,7 @@ void fsl_serdes_init(void) serdes1_prtcl_map |= (1 << lane_prtcl); } - if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c index c8ab5d6f3..0b4ae90c2 100644 --- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c @@ -41,7 +41,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c index 389ff6bd2..01af33370 100644 --- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c @@ -61,7 +61,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c index eec4ffe51..87335c944 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c @@ -90,7 +90,7 @@ int is_serdes_prtcl_valid(u32 prtcl) u32 svr = get_svr(); u32 ver = SVR_SOC_VER(svr); - if (prtcl > ARRAY_SIZE(serdes_cfg_tbl)) + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl)) return 0; /* P2040[e] does not support XAUI */ diff --git a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c index fba9ff245..a36dcd542 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c @@ -139,7 +139,7 @@ enum srds_prtcl serdes_get_prtcl(int cfg, int lane) int is_serdes_prtcl_valid(u32 prtcl) { int i; - if (prtcl > ARRAY_SIZE(serdes_cfg_tbl)) + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl)) return 0; for (i = 0; i < SRDS_MAX_LANES; i++) { diff --git a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c index 87bd79529..94ec44503 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c @@ -86,7 +86,7 @@ enum srds_prtcl serdes_get_prtcl(int cfg, int lane) int is_serdes_prtcl_valid(u32 prtcl) { int i; - if (prtcl > ARRAY_SIZE(serdes_cfg_tbl)) + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl)) return 0; for (i = 0; i < SRDS_MAX_LANES; i++) { diff --git a/arch/powerpc/cpu/mpc85xx/p5020_serdes.c b/arch/powerpc/cpu/mpc85xx/p5020_serdes.c index fba9ff245..a36dcd542 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_serdes.c @@ -139,7 +139,7 @@ enum srds_prtcl serdes_get_prtcl(int cfg, int lane) int is_serdes_prtcl_valid(u32 prtcl) { int i; - if (prtcl > ARRAY_SIZE(serdes_cfg_tbl)) + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl)) return 0; for (i = 0; i < SRDS_MAX_LANES; i++) { diff --git a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c index 890b88e4e..d646e8561 100644 --- a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c @@ -105,7 +105,7 @@ int is_serdes_prtcl_valid(u32 prtcl) { int i; - if (prtcl > ARRAY_SIZE(serdes_cfg_tbl)) + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl)) return 0; for (i = 0; i < SRDS_MAX_LANES; i++) { diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 4f0480b76..2657982a4 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1795,7 +1795,7 @@ clear_bss: stw r0,0(r3) addi r3,r3,4 cmplw 0,r3,r4 - bne 5b + blt 5b 6: mr r3,r9 /* Init Data pointer */ diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c index 8261e0347..19add9f96 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c @@ -81,7 +81,7 @@ int is_serdes_prtcl_valid(int serdes, u32 prtcl) { int i; - if (prtcl > (ARRAY_SIZE(serdes_cfg_tbl[serdes]))) + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl[serdes])) return 0; for (i = 0; i < SRDS_MAX_LANES; i++) { diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index f2b7bffda..20284ed5a 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -26,6 +26,13 @@ #include "config.h" /* CONFIG_BOARDDIR */ OUTPUT_ARCH(powerpc) +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC +PHDRS +{ + text PT_LOAD; + bss PT_LOAD; +} +#endif SECTIONS { . = CONFIG_SPL_TEXT_BASE; @@ -60,7 +67,7 @@ SECTIONS #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ .bootpg ADDR(.text) + 0x1000 : { - start.o (.bootpg) + arch/powerpc/cpu/mpc85xx/start.o (.bootpg) } #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ #elif defined(CONFIG_FSL_ELBC) @@ -68,9 +75,16 @@ SECTIONS #else #error unknown NAND controller #endif +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC + .bootpg ADDR(.text) - 0x1000 : + { + KEEP(*(.bootpg)) + } :text = 0xffff +#else .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { KEEP(*(.resetvec)) } = 0xffff +#endif /* * Make sure that the bss segment isn't linked at 0x0, otherwise its @@ -78,10 +92,12 @@ SECTIONS */ . |= 0x10; + . = ALIGN(4); __bss_start = .; .bss : { *(.sbss*) *(.bss*) } + . = ALIGN(4); __bss_end = .; } diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 0503dce5a..2643563d4 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -95,6 +95,13 @@ SECTIONS . = ALIGN(256); __init_end = .; +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC + .bootpg ADDR(.text) - 0x1000 : + { + KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) + } :text = 0xffff + . = ADDR(.text) + 0x80000; +#else .bootpg RESET_VECTOR_ADDRESS - 0xffc : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) @@ -117,6 +124,7 @@ SECTIONS #if (RESET_VECTOR_ADDRESS == 0xfffffffc) . |= 0x10; #endif +#endif __bss_start = .; .bss (NOLOAD) : diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c index c553415b5..5ed3eb24f 100644 --- a/arch/powerpc/cpu/mpc86xx/cpu.c +++ b/arch/powerpc/cpu/mpc86xx/cpu.c @@ -78,7 +78,7 @@ checkcpu(void) major = PVR_E600_MAJ(pvr); minor = PVR_E600_MIN(pvr); - printf("E600 Core %d", (msscr0 & 0x20) ? 1 : 0 ); + printf("e600 Core %d", (msscr0 & 0x20) ? 1 : 0); if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE) puts("\n Core1Translation Enabled"); debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr); diff --git a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c index 0dc1975bf..0342e3465 100644 --- a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c +++ b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c @@ -64,7 +64,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } @@ -73,7 +73,7 @@ void fsl_serdes_init(void) serdes1_prtcl_map |= (1 << lane_prtcl); } - if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c index 3ae9069f1..21c5ddbfa 100644 --- a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c +++ b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c @@ -73,7 +73,7 @@ void fsl_serdes_init(void) debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } @@ -82,7 +82,7 @@ void fsl_serdes_init(void) serdes1_prtcl_map |= (1 << lane_prtcl); } - if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { + if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); return; } diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c index 56b319f5d..4e8a4415f 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c @@ -26,7 +26,7 @@ void print_ifc_regs(void) int i, j; printf("IFC Controller Registers\n"); - for (i = 0; i < FSL_IFC_BANK_COUNT; i++) { + for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) { printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n", i, get_ifc_cspr(i), i, get_ifc_amask(i), i, get_ifc_csor(i)); @@ -43,7 +43,7 @@ void init_early_memctl_regs(void) set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2); set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3); -#if !defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) || defined(CONFIG_SYS_RAMBOOT) +#ifndef CONFIG_A003399_NOR_WORKAROUND #ifdef CONFIG_SYS_CSPR0_EXT set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT); #endif @@ -94,4 +94,60 @@ void init_early_memctl_regs(void) set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3); set_ifc_csor(IFC_CS3, CONFIG_SYS_CSOR3); #endif + +#ifdef CONFIG_SYS_CSPR4_EXT + set_ifc_cspr_ext(IFC_CS4, CONFIG_SYS_CSPR4_EXT); +#endif +#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4) + set_ifc_ftim(IFC_CS4, IFC_FTIM0, CONFIG_SYS_CS4_FTIM0); + set_ifc_ftim(IFC_CS4, IFC_FTIM1, CONFIG_SYS_CS4_FTIM1); + set_ifc_ftim(IFC_CS4, IFC_FTIM2, CONFIG_SYS_CS4_FTIM2); + set_ifc_ftim(IFC_CS4, IFC_FTIM3, CONFIG_SYS_CS4_FTIM3); + + set_ifc_cspr(IFC_CS4, CONFIG_SYS_CSPR4); + set_ifc_amask(IFC_CS4, CONFIG_SYS_AMASK4); + set_ifc_csor(IFC_CS4, CONFIG_SYS_CSOR4); +#endif + +#ifdef CONFIG_SYS_CSPR5_EXT + set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT); +#endif +#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5) + set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0); + set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1); + set_ifc_ftim(IFC_CS5, IFC_FTIM2, CONFIG_SYS_CS5_FTIM2); + set_ifc_ftim(IFC_CS5, IFC_FTIM3, CONFIG_SYS_CS5_FTIM3); + + set_ifc_cspr(IFC_CS5, CONFIG_SYS_CSPR5); + set_ifc_amask(IFC_CS5, CONFIG_SYS_AMASK5); + set_ifc_csor(IFC_CS5, CONFIG_SYS_CSOR5); +#endif + +#ifdef CONFIG_SYS_CSPR6_EXT + set_ifc_cspr_ext(IFC_CS6, CONFIG_SYS_CSPR6_EXT); +#endif +#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6) + set_ifc_ftim(IFC_CS6, IFC_FTIM0, CONFIG_SYS_CS6_FTIM0); + set_ifc_ftim(IFC_CS6, IFC_FTIM1, CONFIG_SYS_CS6_FTIM1); + set_ifc_ftim(IFC_CS6, IFC_FTIM2, CONFIG_SYS_CS6_FTIM2); + set_ifc_ftim(IFC_CS6, IFC_FTIM3, CONFIG_SYS_CS6_FTIM3); + + set_ifc_cspr(IFC_CS6, CONFIG_SYS_CSPR6); + set_ifc_amask(IFC_CS6, CONFIG_SYS_AMASK6); + set_ifc_csor(IFC_CS6, CONFIG_SYS_CSOR6); +#endif + +#ifdef CONFIG_SYS_CSPR7_EXT + set_ifc_cspr_ext(IFC_CS7, CONFIG_SYS_CSPR7_EXT); +#endif +#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7) + set_ifc_ftim(IFC_CS7, IFC_FTIM0, CONFIG_SYS_CS7_FTIM0); + set_ifc_ftim(IFC_CS7, IFC_FTIM1, CONFIG_SYS_CS7_FTIM1); + set_ifc_ftim(IFC_CS7, IFC_FTIM2, CONFIG_SYS_CS7_FTIM2); + set_ifc_ftim(IFC_CS7, IFC_FTIM3, CONFIG_SYS_CS7_FTIM3); + + set_ifc_cspr(IFC_CS7, CONFIG_SYS_CSPR7); + set_ifc_amask(IFC_CS7, CONFIG_SYS_AMASK7); + set_ifc_csor(IFC_CS7, CONFIG_SYS_CSOR7); +#endif } diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c index 6e6f7dcc3..90d1065de 100644 --- a/arch/powerpc/cpu/mpc8xxx/srio.c +++ b/arch/powerpc/cpu/mpc8xxx/srio.c @@ -24,7 +24,7 @@ #include <asm/fsl_srio.h> #include <asm/errno.h> -#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER +#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER #define SRIO_PORT_ACCEPT_ALL 0x10000001 #define SRIO_IB_ATMU_AR 0x80f55000 #define SRIO_OB_ATMU_AR_MAINT 0x80077000 @@ -299,7 +299,7 @@ void srio_init(void) } } -#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER +#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER void srio_boot_master(int port) { struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR; diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 1009a31b3..1d46b1423 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -139,6 +139,7 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY @@ -337,7 +338,6 @@ #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 -#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 @@ -371,7 +371,6 @@ #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 -#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 @@ -413,7 +412,6 @@ #define CONFIG_SYS_P4080_ERRATUM_SERDES_A005 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 -#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 @@ -449,7 +447,6 @@ #define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 -#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 @@ -494,6 +491,9 @@ #define CONFIG_TSECV2 #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 +#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000 +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 @@ -506,6 +506,7 @@ #define CONFIG_TSECV2 #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 @@ -541,6 +542,7 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_SYS_NUM_FMAN 2 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #define CONFIG_SYS_FSL_TBCLK_DIV 16 @@ -553,6 +555,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 +#define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_PCI_VER_3_X @@ -566,6 +569,7 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #define CONFIG_SYS_FSL_TBCLK_DIV 16 @@ -573,6 +577,7 @@ #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 +#define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #ifdef CONFIG_PPC_B4860 diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h index ba41b73cc..3baf4ccba 100644 --- a/arch/powerpc/include/asm/fsl_ifc.h +++ b/arch/powerpc/include/asm/fsl_ifc.h @@ -21,6 +21,7 @@ #ifndef __ASM_PPC_FSL_IFC_H #define __ASM_PPC_FSL_IFC_H +#ifdef CONFIG_FSL_IFC #include <config.h> #include <common.h> @@ -798,13 +799,15 @@ extern void init_early_memctl_regs(void); #define set_ifc_ftim(i, j, v) \ (out_be32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j], v)) -#define FSL_IFC_BANK_COUNT 4 - enum ifc_chip_sel { IFC_CS0, IFC_CS1, IFC_CS2, IFC_CS3, + IFC_CS4, + IFC_CS5, + IFC_CS6, + IFC_CS7, }; enum ifc_ftims { @@ -907,6 +910,49 @@ struct fsl_ifc_gpcm { u32 res4[0x1F3]; }; +#ifdef CONFIG_SYS_FSL_IFC_BANK_COUNT +#if (CONFIG_SYS_FSL_IFC_BANK_COUNT <= 8) +#define IFC_CSPR_REG_LEN 148 +#define IFC_AMASK_REG_LEN 144 +#define IFC_CSOR_REG_LEN 144 +#define IFC_FTIM_REG_LEN 576 + +#define IFC_CSPR_USED_LEN sizeof(struct fsl_ifc_cspr) * \ + CONFIG_SYS_FSL_IFC_BANK_COUNT +#define IFC_AMASK_USED_LEN sizeof(struct fsl_ifc_amask) * \ + CONFIG_SYS_FSL_IFC_BANK_COUNT +#define IFC_CSOR_USED_LEN sizeof(struct fsl_ifc_csor) * \ + CONFIG_SYS_FSL_IFC_BANK_COUNT +#define IFC_FTIM_USED_LEN sizeof(struct fsl_ifc_ftim) * \ + CONFIG_SYS_FSL_IFC_BANK_COUNT +#else +#error IFC BANK count not vaild +#endif +#else +#error IFC BANK count not defined +#endif + +struct fsl_ifc_cspr { + u32 cspr_ext; + u32 cspr; + u32 res; +}; + +struct fsl_ifc_amask { + u32 amask; + u32 res[0x2]; +}; + +struct fsl_ifc_csor { + u32 csor; + u32 csor_ext; + u32 res; +}; + +struct fsl_ifc_ftim { + u32 ftim[4]; + u32 res[0x8]; +}; /* * IFC Controller Registers @@ -914,44 +960,30 @@ struct fsl_ifc_gpcm { struct fsl_ifc { u32 ifc_rev; u32 res1[0x2]; - struct { - u32 cspr_ext; - u32 cspr; - u32 res2; - } cspr_cs[FSL_IFC_BANK_COUNT]; - u32 res3[0x19]; - struct { - u32 amask; - u32 res4[0x2]; - } amask_cs[FSL_IFC_BANK_COUNT]; - u32 res5[0x17]; - struct { - u32 csor_ext; - u32 csor; - u32 res6; - } csor_cs[FSL_IFC_BANK_COUNT]; - u32 res7[0x19]; - struct { - u32 ftim[4]; - u32 res8[0x8]; - } ftim_cs[FSL_IFC_BANK_COUNT]; - u32 res9[0x60]; + struct fsl_ifc_cspr cspr_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT]; + u8 res2[IFC_CSPR_REG_LEN - IFC_CSPR_USED_LEN]; + struct fsl_ifc_amask amask_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT]; + u8 res3[IFC_AMASK_REG_LEN - IFC_AMASK_USED_LEN]; + struct fsl_ifc_csor csor_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT]; + u8 res4[IFC_CSOR_REG_LEN - IFC_CSOR_USED_LEN]; + struct fsl_ifc_ftim ftim_cs[CONFIG_SYS_FSL_IFC_BANK_COUNT]; + u8 res5[IFC_FTIM_REG_LEN - IFC_FTIM_USED_LEN]; u32 rb_stat; - u32 res10[0x2]; + u32 res6[0x2]; u32 ifc_gcr; - u32 res11[0x2]; + u32 res7[0x2]; u32 cm_evter_stat; - u32 res12[0x2]; + u32 res8[0x2]; u32 cm_evter_en; - u32 res13[0x2]; + u32 res9[0x2]; u32 cm_evter_intr_en; - u32 res14[0x2]; + u32 res10[0x2]; u32 cm_erattr0; u32 cm_erattr1; - u32 res15[0x2]; + u32 res11[0x2]; u32 ifc_ccr; u32 ifc_csr; - u32 res16[0x2EB]; + u32 res12[0x2EB]; struct fsl_ifc_nand ifc_nand; struct fsl_ifc_nor ifc_nor; struct fsl_ifc_gpcm ifc_gpcm; @@ -961,6 +993,7 @@ struct fsl_ifc { #undef CSPR_MSEL_NOR #define CSPR_MSEL_NOR CSPR_MSEL_GPCM #endif +#endif /* CONFIG_FSL_IFC */ #endif /* __ASSEMBLY__ */ #endif /* __ASM_PPC_FSL_IFC_H */ diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index 90b264d35..bea163676 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -82,11 +82,16 @@ enum law_trgt_if { #ifndef CONFIG_MPC8641 LAW_TRGT_IF_PCIE_1 = 0x02, #endif +#if defined(CONFIG_BSC9131) + LAW_TRGT_IF_OCN_DSP = 0x03, +#else #if !defined(CONFIG_MPC8572) && !defined(CONFIG_P2020) LAW_TRGT_IF_PCIE_3 = 0x03, #endif +#endif LAW_TRGT_IF_LBC = 0x04, LAW_TRGT_IF_CCSR = 0x08, + LAW_TRGT_IF_DSP_CCSR = 0x09, LAW_TRGT_IF_DDR_INTRLV = 0x0b, LAW_TRGT_IF_RIO = 0x0c, LAW_TRGT_IF_RIO_2 = 0x0d, diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 4052037f5..db70d048f 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1839,11 +1839,13 @@ typedef struct ccsr_gur { #define FSL_CORENET2_RCWSR4_SRDS3_PRTCL_SHIFT 11 #define FSL_CORENET2_RCWSR4_SRDS4_PRTCL 0x000000f8 #define FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT 3 +#define FSL_CORENET_RCWSR6_BOOT_LOC 0x0f800000 #elif defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_B4420) #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xfe000000 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 25 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00ff0000 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT 16 +#define FSL_CORENET_RCWSR6_BOOT_LOC 0x0f800000 #elif defined(CONFIG_PPC_T1040) #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff000000 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 24 @@ -2160,7 +2162,7 @@ typedef struct ccsr_gur { u32 porbmsr; /* POR boot mode status */ #define MPC85xx_PORBMSR_HA 0x00070000 #define MPC85xx_PORBMSR_HA_SHIFT 16 -#define MPC85XX_PORBMSR_ROMLOC_SHIFT 24 +#define MPC85xx_PORBMSR_ROMLOC_SHIFT 24 #define PORBMSR_ROMLOC_SPI 0x6 #define PORBMSR_ROMLOC_SDHC 0x7 #define PORBMSR_ROMLOC_NAND_2K 0x9 diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index dd6c98cdb..d4ad323fe 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -256,11 +256,6 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima return 0; } - if (flag & BOOTM_STATE_OS_GO) { - boot_jump_linux(images); - return 0; - } - boot_prep_linux(images); ret = boot_body_linux(images); if (ret) |