diff options
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 8 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/4xx_pci.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/4xx_uart.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/miiphy.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/start.S | 2 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 21 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/ppc405.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/ppc440.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/ppc4xx-emac.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/ppc4xx-mal.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/ppc4xx.h | 2 |
12 files changed, 41 insertions, 9 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index eea264b15..c441bd2f5 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -252,6 +252,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A005812 puts("Work-around for Erratum A-005812 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A005125 + puts("Work-around for Erratum A005125 enabled\n"); +#endif #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447 if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) || (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV)) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index ad57a9cfa..be4f4ae87 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -108,6 +108,14 @@ _start_e500: isync 2: #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A005125 + msync + isync + mfspr r3, SPRN_HDBCR0 + oris r3, r3, 0x0080 + mtspr SPRN_HDBCR0, r3 +#endif + #if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) /* ISBC uses L2 as stack. diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c index 5584e0f3e..08781a1fb 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c @@ -1,5 +1,5 @@ /* - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs * * File Name: 405gp_pci.c * diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c index 50c28a0d3..c02058f79 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c @@ -5,7 +5,7 @@ * (C) Copyright 2010 * Stefan Roese, DENX Software Engineering, sr@denx.de. * - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ #include <common.h> diff --git a/arch/powerpc/cpu/ppc4xx/miiphy.c b/arch/powerpc/cpu/ppc4xx/miiphy.c index e4a9db676..10147de08 100644 --- a/arch/powerpc/cpu/ppc4xx/miiphy.c +++ b/arch/powerpc/cpu/ppc4xx/miiphy.c @@ -1,5 +1,5 @@ /* - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ /*-----------------------------------------------------------------------------+ | diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index d9d8cbffa..38bbc5a9b 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -6,7 +6,7 @@ * Copyright (c) 2008 Nuovation System Designs, LLC * Grant Erickson <gerickson@nuovations.com> * - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ /* diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 15e44de41..bec8966fd 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -34,6 +34,7 @@ #define CONFIG_SYS_PPC_E500_DEBUG_TLB 1 #define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_MPC8540) #define CONFIG_MAX_CPUS 1 @@ -52,6 +53,7 @@ #define CONFIG_SYS_PPC_E500_DEBUG_TLB 0 #define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_MPC8548) #define CONFIG_MAX_CPUS 1 @@ -67,6 +69,7 @@ #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_RMU #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x00 @@ -108,6 +111,7 @@ #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_RMU #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_MPC8572) #define CONFIG_MAX_CPUS 2 @@ -117,6 +121,7 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_DDR_115 #define CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_P1010) #define CONFIG_MAX_CPUS 1 @@ -135,6 +140,7 @@ #define CONFIG_SYS_FSL_ERRATUM_P1010_A003549 #define CONFIG_SYS_FSL_ERRATUM_SEC_A003571 #define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 @@ -149,6 +155,7 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_A005125 /* P1012 is single core version of P1021 */ #elif defined(CONFIG_P1012) @@ -164,6 +171,7 @@ #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 +#define CONFIG_SYS_FSL_ERRATUM_A005125 /* P1013 is single core version of P1022 */ #elif defined(CONFIG_P1013) @@ -176,6 +184,7 @@ #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_FSL_SATA_ERRATUM_A001 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_P1014) #define CONFIG_MAX_CPUS 1 @@ -205,6 +214,7 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x10000 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_P1020) #define CONFIG_MAX_CPUS 2 @@ -216,6 +226,7 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_P1021) #define CONFIG_MAX_CPUS 2 @@ -230,6 +241,7 @@ #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_P1022) #define CONFIG_MAX_CPUS 2 @@ -241,6 +253,7 @@ #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_FSL_SATA_ERRATUM_A001 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_P1023) #define CONFIG_MAX_CPUS 2 @@ -254,6 +267,7 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x10000 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 @@ -268,6 +282,7 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_A005125 /* P1025 is lower end variant of P1021 */ #elif defined(CONFIG_P1025) @@ -283,6 +298,7 @@ #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 +#define CONFIG_SYS_FSL_ERRATUM_A005125 /* P2010 is single core version of P2020 */ #elif defined(CONFIG_P2010) @@ -293,6 +309,7 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_P2020) #define CONFIG_MAX_CPUS 2 @@ -307,6 +324,7 @@ #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_RMU #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 @@ -506,6 +524,7 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_BSC9132) #define CONFIG_MAX_CPUS 2 @@ -525,6 +544,7 @@ #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" +#define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 @@ -658,6 +678,7 @@ #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 +#define CONFIG_SYS_FSL_ERRATUM_A005125 #else #error Processor type not defined for this platform diff --git a/arch/powerpc/include/asm/ppc405.h b/arch/powerpc/include/asm/ppc405.h index 8bb342b92..f2ed16a21 100644 --- a/arch/powerpc/include/asm/ppc405.h +++ b/arch/powerpc/include/asm/ppc405.h @@ -1,5 +1,5 @@ /* - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ #ifndef __PPC405_H__ diff --git a/arch/powerpc/include/asm/ppc440.h b/arch/powerpc/include/asm/ppc440.h index 0f5bc8d1c..0cfa88bff 100644 --- a/arch/powerpc/include/asm/ppc440.h +++ b/arch/powerpc/include/asm/ppc440.h @@ -9,7 +9,7 @@ * (C) Copyright 2010 * Stefan Roese, DENX Software Engineering, sr@denx.de. * - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ #ifndef __PPC440_H__ diff --git a/arch/powerpc/include/asm/ppc4xx-emac.h b/arch/powerpc/include/asm/ppc4xx-emac.h index e6eb33222..76fa95ca3 100644 --- a/arch/powerpc/include/asm/ppc4xx-emac.h +++ b/arch/powerpc/include/asm/ppc4xx-emac.h @@ -1,5 +1,5 @@ /* - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ /*----------------------------------------------------------------------------+ | diff --git a/arch/powerpc/include/asm/ppc4xx-mal.h b/arch/powerpc/include/asm/ppc4xx-mal.h index d15290dc1..ef8b17446 100644 --- a/arch/powerpc/include/asm/ppc4xx-mal.h +++ b/arch/powerpc/include/asm/ppc4xx-mal.h @@ -1,6 +1,6 @@ /* include/mal.h, openbios_walnut, walnut_bios 8/6/99 08:48:40 */ /* - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ /*----------------------------------------------------------------------------+ | diff --git a/arch/powerpc/include/asm/ppc4xx.h b/arch/powerpc/include/asm/ppc4xx.h index 8d703c663..e6a3bff07 100644 --- a/arch/powerpc/include/asm/ppc4xx.h +++ b/arch/powerpc/include/asm/ppc4xx.h @@ -1,5 +1,5 @@ /* - * SPDX-License-Identifier: GPL-2.0 ibm-pibs + * SPDX-License-Identifier: GPL-2.0 IBM-pibs */ #ifndef __PPC4XX_H__ |