diff options
Diffstat (limited to 'arch/powerpc/cpu')
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/4xx_pci.c | 36 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/cpu.c | 12 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/cpu_init.c | 8 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/reginfo.c | 6 |
5 files changed, 33 insertions, 31 deletions
diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index 3923fee8a..cf9d66d53 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -469,7 +469,7 @@ phys_size_t initdram(int board_type) /*------------------------------------------------------------------ * Reset the DDR-SDRAM controller. *-----------------------------------------------------------------*/ - mtsdr(SDR0_SRST, (0x80000000 >> 10)); + mtsdr(SDR0_SRST, SDR0_SRST0_DMC); mtsdr(SDR0_SRST, 0x00000000); /* diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c index bfba95257..80b0c1c6f 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c @@ -594,35 +594,35 @@ int __pci_pre_init(struct pci_controller *hose) * Set priority for all PLB3 devices to 0. * Set PLB3 arbiter to fair mode. */ - mfsdr(SD0_AMP1, reg); - mtsdr(SD0_AMP1, (reg & 0x000000FF) | 0x0000FF00); - reg = mfdcr(PLB3_ACR); - mtdcr(PLB3_ACR, reg | 0x80000000); + mfsdr(SDR0_AMP1, reg); + mtsdr(SDR0_AMP1, (reg & 0x000000FF) | 0x0000FF00); + reg = mfdcr(PLB3A0_ACR); + mtdcr(PLB3A0_ACR, reg | 0x80000000); /* * Set priority for all PLB4 devices to 0. */ - mfsdr(SD0_AMP0, reg); - mtsdr(SD0_AMP0, (reg & 0x000000FF) | 0x0000FF00); - reg = mfdcr(PLB4_ACR) | 0xa0000000; - mtdcr(PLB4_ACR, reg); + mfsdr(SDR0_AMP0, reg); + mtsdr(SDR0_AMP0, (reg & 0x000000FF) | 0x0000FF00); + reg = mfdcr(PLB4A0_ACR) | 0xa0000000; + mtdcr(PLB4A0_ACR, reg); /* * Set Nebula PLB4 arbiter to fair mode. */ /* Segment0 */ - reg = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR; - reg = (reg & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED; - reg = (reg & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP; - reg = (reg & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP; - mtdcr(PLB0_ACR, reg); + reg = (mfdcr(PLB4A0_ACR) & ~PLB4Ax_ACR_PPM_MASK) | PLB4Ax_ACR_PPM_FAIR; + reg = (reg & ~PLB4Ax_ACR_HBU_MASK) | PLB4Ax_ACR_HBU_ENABLED; + reg = (reg & ~PLB4Ax_ACR_RDP_MASK) | PLB4Ax_ACR_RDP_4DEEP; + reg = (reg & ~PLB4Ax_ACR_WRP_MASK) | PLB4Ax_ACR_WRP_2DEEP; + mtdcr(PLB4A0_ACR, reg); /* Segment1 */ - reg = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR; - reg = (reg & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED; - reg = (reg & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP; - reg = (reg & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP; - mtdcr(PLB1_ACR, reg); + reg = (mfdcr(PLB4A1_ACR) & ~PLB4Ax_ACR_PPM_MASK) | PLB4Ax_ACR_PPM_FAIR; + reg = (reg & ~PLB4Ax_ACR_HBU_MASK) | PLB4Ax_ACR_HBU_ENABLED; + reg = (reg & ~PLB4Ax_ACR_RDP_MASK) | PLB4Ax_ACR_RDP_4DEEP; + reg = (reg & ~PLB4Ax_ACR_WRP_MASK) | PLB4Ax_ACR_WRP_2DEEP; + mtdcr(PLB4A1_ACR, reg); #if defined(CONFIG_SYS_PCI_BOARD_FIXUP_IRQ) hose->fixup_irq = board_pci_fixup_irq; diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c index 39b8e2f54..84852184d 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu.c +++ b/arch/powerpc/cpu/ppc4xx/cpu.c @@ -98,8 +98,8 @@ int pci_arbiter_enabled(void) #if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE) unsigned long val; - mfsdr(SDR0_XCR, val); - return (val & 0x80000000); + mfsdr(SDR0_XCR0, val); + return (val & SDR0_XCR0_PAE_MASK); #endif #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ @@ -107,7 +107,7 @@ int pci_arbiter_enabled(void) unsigned long val; mfsdr(SDR0_PCI0, val); - return (val & 0x80000000); + return (val & SDR0_PCI0_PAE_MASK); #endif } #endif @@ -262,7 +262,7 @@ static int bootstrap_option(void) #endif /* SDR0_PINSTP_SHIFT */ -#if defined(CONFIG_440) +#if defined(CONFIG_440GP) static int do_chip_reset (unsigned long sys0, unsigned long sys1) { /* Changes to CPC0_SYS0 and CPC0_SYS1 require chip @@ -276,7 +276,7 @@ static int do_chip_reset (unsigned long sys0, unsigned long sys1) return 1; } -#endif +#endif /* CONFIG_440GP */ int checkcpu (void) @@ -417,6 +417,7 @@ int checkcpu (void) break; #if defined(CONFIG_440) +#if defined(CONFIG_440GP) case PVR_440GP_RB: puts("GP Rev. B"); /* See errata 1.12: CHIP_4 */ @@ -433,6 +434,7 @@ int checkcpu (void) case PVR_440GP_RC: puts("GP Rev. C"); break; +#endif /* CONFIG_440GP */ case PVR_440GX_RA: puts("GX Rev. A"); diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c index 6456dc7a9..677a4b589 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu_init.c +++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c @@ -397,10 +397,10 @@ cpu_init_f (void) /* * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read */ - mtdcr(PLB0_ACR, (mfdcr(PLB0_ACR) & ~PLB0_ACR_RDP_MASK) | - PLB0_ACR_RDP_4DEEP); - mtdcr(PLB1_ACR, (mfdcr(PLB1_ACR) & ~PLB1_ACR_RDP_MASK) | - PLB1_ACR_RDP_4DEEP); + mtdcr(PLB4A0_ACR, (mfdcr(PLB4A0_ACR) & ~PLB4Ax_ACR_RDP_MASK) | + PLB4Ax_ACR_RDP_4DEEP); + mtdcr(PLB4A1_ACR, (mfdcr(PLB4A1_ACR) & ~PLB4Ax_ACR_RDP_MASK) | + PLB4Ax_ACR_RDP_4DEEP); #endif /* CONFIG_440SP/SPE || CONFIG_460EX/GT || CONFIG_405EX */ } diff --git a/arch/powerpc/cpu/ppc4xx/reginfo.c b/arch/powerpc/cpu/ppc4xx/reginfo.c index 88f84296e..2f1ab9e96 100644 --- a/arch/powerpc/cpu/ppc4xx/reginfo.c +++ b/arch/powerpc/cpu/ppc4xx/reginfo.c @@ -108,9 +108,9 @@ const struct cpu_register ppc4xx_reg[] = { {"SDR0_SDSTP3", IDCR6, SDR0_SDSTP3}, {"SDR0_CUST0", IDCR6, SDR0_CUST0}, {"SDR0_CUST1", IDCR6, SDR0_CUST1}, - {"SDR0_EBC0", IDCR6, SDR0_EBC0}, - {"SDR0_AMP0", IDCR6, SD0_AMP0}, - {"SDR0_AMP1", IDCR6, SD0_AMP1}, + {"SDR0_EBC", IDCR6, SDR0_EBC}, + {"SDR0_AMP0", IDCR6, SDR0_AMP0}, + {"SDR0_AMP1", IDCR6, SDR0_AMP1}, {"SDR0_CP440", IDCR6, SDR0_CP440}, {"SDR0_CRYP0", IDCR6, SDR0_CRYP0}, {"SDR0_DDRCFG", IDCR6, SDR0_DDRCFG}, |