diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 17 | 
1 files changed, 14 insertions, 3 deletions
| diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 25beda233..2d65157c7 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -22,6 +22,7 @@  #include <asm/fsl_law.h>  #include <asm/fsl_serdes.h>  #include <asm/fsl_srio.h> +#include <fsl_usb.h>  #include <hwconfig.h>  #include <linux/compiler.h>  #include "mp.h" @@ -399,6 +400,14 @@ int cpu_init_r(void)  		sync();  	}  #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A005812 +	/* +	 * A-005812 workaround sets bit 32 of SPR 976 for SoCs running +	 * in write shadow mode. Checking DCWS before setting SPR 976. +	 */ +	if (mfspr(L1CSR2) & L1CSR2_DCWS) +		mtspr(SPRN_HDBCR0, (mfspr(SPRN_HDBCR0) | 0x80000000)); +#endif  #if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)  	spin = getenv("spin_table_compat"); @@ -532,8 +541,10 @@ skip_l2:  	enable_cpc(); +#ifndef CONFIG_SYS_FSL_NO_SERDES  	/* needs to be in ram since code uses global static vars */  	fsl_serdes_init(); +#endif  #ifdef CONFIG_SYS_FSL_ERRATUM_A005871  	if (IS_SVR_REV(svr, 1, 0)) { @@ -595,7 +606,7 @@ skip_l2:  #ifdef CONFIG_SYS_FSL_USB1_PHY_ENABLE  	{ -		ccsr_usb_phy_t *usb_phy1 = +		struct ccsr_usb_phy __iomem *usb_phy1 =  			(void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;  		out_be32(&usb_phy1->usb_enable_override,  				CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE); @@ -603,7 +614,7 @@ skip_l2:  #endif  #ifdef CONFIG_SYS_FSL_USB2_PHY_ENABLE  	{ -		ccsr_usb_phy_t *usb_phy2 = +		struct ccsr_usb_phy __iomem *usb_phy2 =  			(void *)CONFIG_SYS_MPC85xx_USB2_PHY_ADDR;  		out_be32(&usb_phy2->usb_enable_override,  				CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE); @@ -625,7 +636,7 @@ skip_l2:  #endif  #if defined(CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE) -		ccsr_usb_phy_t *usb_phy = +		struct ccsr_usb_phy __iomem *usb_phy =  			(void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;  		setbits_be32(&usb_phy->pllprg[1],  			     CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN | |