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-rw-r--r--arch/mips/cpu/xburst/config.mk6
-rw-r--r--arch/mips/cpu/xburst/start.S19
-rw-r--r--arch/mips/cpu/xburst/timer.c20
3 files changed, 21 insertions, 24 deletions
diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk
index 1536746c9..cf5fa6ab6 100644
--- a/arch/mips/cpu/xburst/config.mk
+++ b/arch/mips/cpu/xburst/config.mk
@@ -21,5 +21,11 @@
#
PLATFORM_CPPFLAGS += -march=mips32
+PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
+ifdef CONFIG_SYS_BIG_ENDIAN
+PLATFORM_LDFLAGS += -m elf32btsmip
+else
+PLATFORM_LDFLAGS += -m elf32ltsmip
+endif
CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S
index 3a8280cb0..50b7fb102 100644
--- a/arch/mips/cpu/xburst/start.S
+++ b/arch/mips/cpu/xburst/start.S
@@ -64,19 +64,13 @@ relocate_code:
move sp, a0 # set new stack pointer
li t0, CONFIG_SYS_MONITOR_BASE
+ sub t6, a2, t0 # t6 <-- relocation offset
+
la t3, in_ram
lw t2, -12(t3) # t2 <-- uboot_end_data
move t1, a2
- /*
- * Fix $gp:
- *
- * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
- */
- move t6, gp
- sub gp, CONFIG_SYS_MONITOR_BASE
- add gp, a2 # gp now adjusted
- sub t6, gp, t6 # t6 <-- relocation offset
+ add gp, t6 # adjust gp
/*
* t0 = source address
@@ -87,7 +81,7 @@ relocate_code:
lw t3, 0(t0)
sw t3, 0(t1)
addu t0, 4
- ble t0, t2, 1b
+ blt t0, t2, 1b
addu t1, 4
/* If caches were enabled, we would have to flush them here. */
@@ -122,7 +116,6 @@ relocate_code:
jr t0
nop
- .word _gp
.word _GLOBAL_OFFSET_TABLE_
.word uboot_end_data
.word uboot_end
@@ -137,9 +130,7 @@ in_ram:
*/
lw t3, -4(t0) # t3 <-- num_got_entries
lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
- lw t5, -20(t0) # t5 <-- _gp
- sub t4, t5 # compute offset
- add t4, t4, gp # t4 now holds relocated _G_O_T_
+ add t4, t6 # t4 now holds relocated _G_O_T_
addi t4, t4, 8 # skipping first two entries
li t2, 2
1:
diff --git a/arch/mips/cpu/xburst/timer.c b/arch/mips/cpu/xburst/timer.c
index b6b3855ea..8c33d3ca3 100644
--- a/arch/mips/cpu/xburst/timer.c
+++ b/arch/mips/cpu/xburst/timer.c
@@ -34,24 +34,24 @@ static struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE;
void reset_timer_masked(void)
{
/* reset time */
- gd->lastinc = readl(&tcu->tcnt0);
- gd->tbl = 0;
+ gd->arch.lastinc = readl(&tcu->tcnt0);
+ gd->arch.tbl = 0;
}
ulong get_timer_masked(void)
{
ulong now = readl(&tcu->tcnt0);
- if (gd->lastinc <= now)
- gd->tbl += now - gd->lastinc; /* normal mode */
+ if (gd->arch.lastinc <= now)
+ gd->arch.tbl += now - gd->arch.lastinc; /* normal mode */
else {
/* we have an overflow ... */
- gd->tbl += TIMER_FDATA + now - gd->lastinc;
+ gd->arch.tbl += TIMER_FDATA + now - gd->arch.lastinc;
}
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
void udelay_masked(unsigned long usec)
@@ -94,8 +94,8 @@ int timer_init(void)
writel(1 << TIMER_CHAN, &tcu->tscr); /* enable timer clock */
writeb(1 << TIMER_CHAN, &tcu->tesr); /* start counting up */
- gd->lastinc = 0;
- gd->tbl = 0;
+ gd->arch.lastinc = 0;
+ gd->arch.tbl = 0;
return 0;
}
@@ -112,7 +112,7 @@ ulong get_timer(ulong base)
void set_timer(ulong t)
{
- gd->tbl = t;
+ gd->arch.tbl = t;
}
void __udelay(unsigned long usec)