diff options
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-at91/gpio.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-at91/spl.h | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/pmc.h | 11 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/tegra.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra114/tegra.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra124/tegra.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra20/tegra.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra30/tegra.h | 2 | 
8 files changed, 29 insertions, 1 deletions
| diff --git a/arch/arm/include/asm/arch-at91/gpio.h b/arch/arm/include/asm/arch-at91/gpio.h index ff6142b8a..71213883d 100644 --- a/arch/arm/include/asm/arch-at91/gpio.h +++ b/arch/arm/include/asm/arch-at91/gpio.h @@ -214,7 +214,7 @@ static inline unsigned pin_to_mask(unsigned pin)  /* The following macros are need for backward compatibility */  #define at91_set_GPIO_periph(x, y) \ -	at91_set_gpio_periph((x - PIN_BASE) / 32,(x % 32), y) +	at91_set_pio_periph((x - PIN_BASE) / 32,(x % 32), y)  #define at91_set_A_periph(x, y) \  	at91_set_a_periph((x - PIN_BASE) / 32,(x % 32), y)  #define at91_set_B_periph(x, y) \ diff --git a/arch/arm/include/asm/arch-at91/spl.h b/arch/arm/include/asm/arch-at91/spl.h index 68c534960..d8a87daa4 100644 --- a/arch/arm/include/asm/arch-at91/spl.h +++ b/arch/arm/include/asm/arch-at91/spl.h @@ -14,6 +14,10 @@ enum {  	BOOT_DEVICE_MMC1,  	BOOT_DEVICE_MMC2,  	BOOT_DEVICE_MMC2_2, +#elif CONFIG_SYS_USE_NANDFLASH +	BOOT_DEVICE_NAND, +#elif CONFIG_SYS_USE_SERIALFLASH +	BOOT_DEVICE_SPI,  #endif  }; diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h index 4c3264b38..1dd3154fb 100644 --- a/arch/arm/include/asm/arch-tegra/pmc.h +++ b/arch/arm/include/asm/arch-tegra/pmc.h @@ -298,14 +298,25 @@ struct pmc_ctlr {  #define PMC_XOFS_SHIFT	1  #define PMC_XOFS_MASK	(0x3F << PMC_XOFS_SHIFT) +#if defined(CONFIG_TEGRA114)  #define TIMER_MULT_SHIFT	0  #define TIMER_MULT_MASK		(3 << TIMER_MULT_SHIFT)  #define TIMER_MULT_CPU_SHIFT	2  #define TIMER_MULT_CPU_MASK	(3 << TIMER_MULT_CPU_SHIFT) +#elif defined(CONFIG_TEGRA124) +#define TIMER_MULT_SHIFT	0 +#define TIMER_MULT_MASK		(7 << TIMER_MULT_SHIFT) +#define TIMER_MULT_CPU_SHIFT	3 +#define TIMER_MULT_CPU_MASK	(7 << TIMER_MULT_CPU_SHIFT) +#endif +  #define MULT_1			0  #define MULT_2			1  #define MULT_4			2  #define MULT_8			3 +#if defined(CONFIG_TEGRA124) +#define MULT_16			4 +#endif  #define AMAP_WRITE_SHIFT	20  #define AMAP_WRITE_ON		(1 << AMAP_WRITE_SHIFT) diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index 5fe19ae1a..d63af0e5f 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -34,7 +34,12 @@  #define NV_PA_PMC_BASE		(NV_PA_APB_MISC_BASE + 0xE400)  #define NV_PA_EMC_BASE		(NV_PA_APB_MISC_BASE + 0xF400)  #define NV_PA_FUSE_BASE		(NV_PA_APB_MISC_BASE + 0xF800) +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ +	defined(CONFIG_TEGRA114)  #define NV_PA_CSITE_BASE	0x70040000 +#else +#define NV_PA_CSITE_BASE	0x70800000 +#endif  #define TEGRA_USB_ADDR_MASK	0xFFFFC000  #define NV_PA_SDRC_CS0		NV_PA_SDRAM_BASE diff --git a/arch/arm/include/asm/arch-tegra114/tegra.h b/arch/arm/include/asm/arch-tegra114/tegra.h index 5d426b524..705ca5758 100644 --- a/arch/arm/include/asm/arch-tegra114/tegra.h +++ b/arch/arm/include/asm/arch-tegra114/tegra.h @@ -17,6 +17,8 @@  #ifndef _TEGRA114_H_  #define _TEGRA114_H_ +#define CONFIG_TEGRA114 +  #define NV_PA_SDRAM_BASE	0x80000000	/* 0x80000000 for real T114 */  #define NV_PA_TSC_BASE		0x700F0000	/* System Counter TSC regs */ diff --git a/arch/arm/include/asm/arch-tegra124/tegra.h b/arch/arm/include/asm/arch-tegra124/tegra.h index db3d83792..86ebd1945 100644 --- a/arch/arm/include/asm/arch-tegra124/tegra.h +++ b/arch/arm/include/asm/arch-tegra124/tegra.h @@ -8,6 +8,8 @@  #ifndef _TEGRA124_H_  #define _TEGRA124_H_ +#define CONFIG_TEGRA124 +  #define NV_PA_SDRAM_BASE	0x80000000  #define NV_PA_TSC_BASE		0x700F0000	/* System Counter TSC regs */  #define NV_PA_MC_BASE		0x70019000	/* Mem Ctlr regs (MCB, etc.) */ diff --git a/arch/arm/include/asm/arch-tegra20/tegra.h b/arch/arm/include/asm/arch-tegra20/tegra.h index 18856ac37..6a4b40ec7 100644 --- a/arch/arm/include/asm/arch-tegra20/tegra.h +++ b/arch/arm/include/asm/arch-tegra20/tegra.h @@ -8,6 +8,8 @@  #ifndef _TEGRA20_H_  #define _TEGRA20_H_ +#define CONFIG_TEGRA20 +  #define NV_PA_SDRAM_BASE	0x00000000  #include <asm/arch-tegra/tegra.h> diff --git a/arch/arm/include/asm/arch-tegra30/tegra.h b/arch/arm/include/asm/arch-tegra30/tegra.h index c02c5d850..4ad8b1c05 100644 --- a/arch/arm/include/asm/arch-tegra30/tegra.h +++ b/arch/arm/include/asm/arch-tegra30/tegra.h @@ -17,6 +17,8 @@  #ifndef _TEGRA30_H_  #define _TEGRA30_H_ +#define CONFIG_TEGRA30 +  #define NV_PA_SDRAM_BASE	0x80000000	/* 0x80000000 for real T30 */  #include <asm/arch-tegra/tegra.h> |