7 files changed, 111 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h
index 1935b0b5b..73f806304 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -29,6 +29,12 @@
 #define VPLL	4
 #define BPLL	5
 
+enum pll_src_bit {
+	EXYNOS_SRC_MPLL = 6,
+	EXYNOS_SRC_EPLL,
+	EXYNOS_SRC_VPLL,
+};
+
 unsigned long get_pll_clk(int pllreg);
 unsigned long get_arm_clk(void);
 unsigned long get_i2c_clk(void);
@@ -44,4 +50,13 @@ int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq);
 int set_epll_clk(unsigned long rate);
 int set_spi_clk(int periph_id, unsigned int rate);
 
+/**
+ * get the clk frequency of the required peripheral
+ *
+ * @param peripheral	Peripheral id
+ *
+ * @return frequency of the peripheral clk
+ */
+unsigned long clock_get_periph_rate(int peripheral);
+
 #endif
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
index eb3442235..f76e4897e 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -62,6 +62,7 @@
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 
 /* EXYNOS4X12 */
 #define EXYNOS4X12_GPIO_PART3_BASE	0x03860000
@@ -92,9 +93,10 @@
 #define EXYNOS4X12_ADC_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DP_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_MODEM_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_I2S_BASE            DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_SPI_BASE            DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_SPI_ISP_BASE                DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 
 /* EXYNOS5 Common*/
 #define EXYNOS5_I2C_SPACING		0x10000
@@ -106,6 +108,7 @@
 #define EXYNOS5_SWRESET			0x10040400
 #define EXYNOS5_SYSREG_BASE		0x10050000
 #define EXYNOS5_WATCHDOG_BASE		0x101D0000
+#define EXYNOS5_ACE_SFR_BASE            0x10830000
 #define EXYNOS5_DMC_PHY0_BASE		0x10C00000
 #define EXYNOS5_DMC_PHY1_BASE		0x10C10000
 #define EXYNOS5_GPIO_PART3_BASE		0x10D10000
@@ -205,6 +208,7 @@ static inline unsigned int samsung_get_base_##device(void)	\
 
 SAMSUNG_BASE(adc, ADC_BASE)
 SAMSUNG_BASE(clock, CLOCK_BASE)
+SAMSUNG_BASE(ace_sfr, ACE_SFR_BASE)
 SAMSUNG_BASE(dp, DP_BASE)
 SAMSUNG_BASE(sysreg, SYSREG_BASE)
 SAMSUNG_BASE(fimd, FIMD_BASE)
diff --git a/arch/arm/include/asm/arch-exynos/dp_info.h b/arch/arm/include/asm/arch-exynos/dp_info.h
index 102b709bd..ff1636167 100644
--- a/arch/arm/include/asm/arch-exynos/dp_info.h
+++ b/arch/arm/include/asm/arch-exynos/dp_info.h
@@ -199,7 +199,6 @@ enum {
 
 struct exynos_dp_platform_data {
 	struct edp_device_info *edp_dev_info;
-	void (*phy_enable)(unsigned int);
 };
 
 #ifdef CONFIG_EXYNOS_DP
diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
index 89bcdfc0c..e5aed4b95 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -61,6 +61,11 @@ enum periph_id {
 	PERIPH_ID_SPI3,
 	PERIPH_ID_SPI4,
 	PERIPH_ID_SDMMC4,
+	PERIPH_ID_PWM0,
+	PERIPH_ID_PWM1,
+	PERIPH_ID_PWM2,
+	PERIPH_ID_PWM3,
+	PERIPH_ID_PWM4,
 
 	PERIPH_ID_COUNT,
 	PERIPH_ID_NONE = -1,
diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h
index d2fdb5981..3549667d9 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -857,6 +857,9 @@ void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable);
 
 void set_usbhost_phy_ctrl(unsigned int enable);
 
+/* Enables hardware tripping to power off the system when TMU fails */
+void set_hw_thermal_trip(void);
+
 #define POWER_USB_HOST_PHY_CTRL_EN		(1 << 0)
 #define POWER_USB_HOST_PHY_CTRL_DISABLE		(0 << 0)
 
@@ -864,4 +867,25 @@ void set_dp_phy_ctrl(unsigned int enable);
 
 #define EXYNOS_DP_PHY_ENABLE		(1 << 0)
 
+#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH	(1 << 8)
+#define POWER_ENABLE_HW_TRIP			(1UL << 31)
+
+/*
+ * Set ps_hold data driving value high
+ * This enables the machine to stay powered on
+ * after the initial power-on condition goes away
+ * (e.g. power button).
+ */
+void set_ps_hold_ctrl(void);
+
+/* PMU_DEBUG bits [12:8] = 0x1000 selects XXTI clock source */
+#define PMU_DEBUG_XXTI                          0x1000
+/* Mask bit[12:8] for xxti clock selection */
+#define PMU_DEBUG_CLKOUT_SEL_MASK               0x1f00
+
+/*
+ * Pmu debug is used for xclkout, enable xclkout with
+ * source as XXTI
+ */
+void set_xclkout(void);
 #endif
diff --git a/arch/arm/include/asm/arch-exynos/spl.h b/arch/arm/include/asm/arch-exynos/spl.h
index 306b41d82..46b25a608 100644
--- a/arch/arm/include/asm/arch-exynos/spl.h
+++ b/arch/arm/include/asm/arch-exynos/spl.h
@@ -78,11 +78,12 @@ struct spl_machine_param {
 	 */
 	u32		uboot_size;
 	enum boot_mode	boot_source;	/* Boot device */
-	enum mem_manuf	mem_manuf;	/* Memory Manufacturer */
 	unsigned	frequency_mhz;	/* Frequency of memory in MHz */
 	unsigned	arm_freq_mhz;	/* ARM Frequency in MHz */
 	u32		serial_base;	/* Serial base address */
 	u32		i2c_base;	/* i2c base address */
+	u32		board_rev_gpios;	/* Board revision GPIOs */
+	enum mem_manuf	mem_manuf;	/* Memory Manufacturer */
 } __attribute__((__packed__));
 #endif
 
diff --git a/arch/arm/include/asm/arch-exynos/tmu.h b/arch/arm/include/asm/arch-exynos/tmu.h
new file mode 100644
index 000000000..7e0158efb
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/tmu.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *      http://www.samsung.com
+ * Akshay Saraswat <akshay.s@samsung.com>
+ *
+ * EXYNOS - Thermal Management Unit
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_TMU_H
+#define __ASM_ARCH_TMU_H
+
+struct exynos5_tmu_reg {
+	unsigned triminfo;
+	unsigned rsvd1;
+	unsigned rsvd2;
+	unsigned rsvd3;
+	unsigned rsvd4;
+	unsigned triminfo_control;
+	unsigned rsvd5;
+	unsigned rsvd6;
+	unsigned tmu_control;
+	unsigned rsvd7;
+	unsigned tmu_status;
+	unsigned sampling_internal;
+	unsigned counter_value0;
+	unsigned counter_value1;
+	unsigned rsvd8;
+	unsigned rsvd9;
+	unsigned current_temp;
+	unsigned rsvd10;
+	unsigned rsvd11;
+	unsigned rsvd12;
+	unsigned threshold_temp_rise;
+	unsigned threshold_temp_fall;
+	unsigned rsvd13;
+	unsigned rsvd14;
+	unsigned past_temp3_0;
+	unsigned past_temp7_4;
+	unsigned past_temp11_8;
+	unsigned past_temp15_12;
+	unsigned inten;
+	unsigned intstat;
+	unsigned intclear;
+	unsigned rsvd15;
+	unsigned emul_con;
+};
+#endif /* __ASM_ARCH_TMU_H */