diff options
Diffstat (limited to 'arch/arm/include/asm/arch-at91/at91cap9.h')
| -rw-r--r-- | arch/arm/include/asm/arch-at91/at91cap9.h | 69 | 
1 files changed, 0 insertions, 69 deletions
| diff --git a/arch/arm/include/asm/arch-at91/at91cap9.h b/arch/arm/include/asm/arch-at91/at91cap9.h index 7ac5bc1e7..63870bc65 100644 --- a/arch/arm/include/asm/arch-at91/at91cap9.h +++ b/arch/arm/include/asm/arch-at91/at91cap9.h @@ -55,75 +55,6 @@  #define AT91_RSTC_BASE	0xfffffd00  #define AT91_PIT_BASE	0xfffffd30 -#ifdef CONFIG_AT91_LEGACY - -/* - * User Peripheral physical base addresses. - */ -#define AT91CAP9_BASE_UDPHS		0xfff78000 -#define AT91CAP9_BASE_TCB0		0xfff7c000 -#define AT91CAP9_BASE_TC0		0xfff7c000 -#define AT91CAP9_BASE_TC1		0xfff7c040 -#define AT91CAP9_BASE_TC2		0xfff7c080 -#define AT91CAP9_BASE_MCI0		0xfff80000 -#define AT91CAP9_BASE_MCI1		0xfff84000 -#define AT91CAP9_BASE_TWI		0xfff88000 -#define AT91CAP9_BASE_US0		0xfff8c000 -#define AT91CAP9_BASE_US1		0xfff90000 -#define AT91CAP9_BASE_US2		0xfff94000 -#define AT91CAP9_BASE_SSC0		0xfff98000 -#define AT91CAP9_BASE_SSC1		0xfff9c000 -#define AT91CAP9_BASE_AC97C		0xfffa0000 -#define AT91CAP9_BASE_SPI0		0xfffa4000 -#define AT91CAP9_BASE_SPI1		0xfffa8000 -#define AT91CAP9_BASE_CAN		0xfffac000 -#define AT91CAP9_BASE_PWMC		0xfffb8000 -#define AT91CAP9_BASE_EMAC		0xfffbc000 -#define AT91CAP9_BASE_ADC		0xfffc0000 -#define AT91CAP9_BASE_ISI		0xfffc4000 -#define AT91_BASE_SYS			0xffffe200 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC	(0xffffe200 - AT91_BASE_SYS) -#define AT91_BCRAMC	(0xffffe400 - AT91_BASE_SYS) -#define AT91_DDRSDRC	(0xffffe600 - AT91_BASE_SYS) -#define AT91_SMC	(0xffffe800 - AT91_BASE_SYS) -#define AT91_MATRIX	(0xffffea00 - AT91_BASE_SYS) -#define AT91_CCFG	(0xffffeb10 - AT91_BASE_SYS) -#define AT91_DMA	(0xffffec00 - AT91_BASE_SYS) -#define AT91_DBGU	(0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA	(0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB	(0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC	(0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD	(0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC	(0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC	(0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT	(0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT	(0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT	(0xfffffd40 - AT91_BASE_SYS) -#define AT91_SCKCR	(0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR_REVB	(0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR_REVC	(0xfffffd60 - AT91_BASE_SYS) - -#define AT91_USART0	AT91CAP9_BASE_US0 -#define AT91_USART1	AT91CAP9_BASE_US1 -#define AT91_USART2	AT91CAP9_BASE_US2 - -/* - * SCKCR flags - */ -#define AT91CAP9_SCKCR_RCEN	(1 << 0)	/* RC Oscillator Enable */ -#define AT91CAP9_SCKCR_OSC32EN	(1 << 1)	/* 32kHz Oscillator Enable */ -#define AT91CAP9_SCKCR_OSC32BYP	(1 << 2)	/* 32kHz Oscillator Bypass */ -#define AT91CAP9_SCKCR_OSCSEL	(1 << 3)	/* Slow Clock Selector */ -#define		AT91CAP9_SCKCR_OSCSEL_RC	(0 << 3) -#define		AT91CAP9_SCKCR_OSCSEL_32	(1 << 3) - -#endif /* CONFIG_AT91_LEGACY */  /*   * Internal Memory.   */ |