diff options
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx')
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/ddr_defs.h | 17 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/hardware_ti814x.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/omap.h | 25 | 
3 files changed, 18 insertions, 25 deletions
| diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index fb4e78edf..bb53a6a14 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -117,6 +117,23 @@  #define MT41J512M8RH125_PHY_WR_DATA		0x74  #define MT41J512M8RH125_IOCTRL_VALUE		0x18B +/* Samsung K4B2G1646E-BIH9 */ +#define K4B2G1646EBIH9_EMIF_READ_LATENCY	0x06 +#define K4B2G1646EBIH9_EMIF_TIM1		0x0888A39B +#define K4B2G1646EBIH9_EMIF_TIM2		0x2A04011A +#define K4B2G1646EBIH9_EMIF_TIM3		0x501F820F +#define K4B2G1646EBIH9_EMIF_SDCFG		0x61C24AB2 +#define K4B2G1646EBIH9_EMIF_SDREF		0x0000093B +#define K4B2G1646EBIH9_ZQ_CFG			0x50074BE4 +#define K4B2G1646EBIH9_DLL_LOCK_DIFF		0x1 +#define K4B2G1646EBIH9_RATIO			0x40 +#define K4B2G1646EBIH9_INVERT_CLKOUT		0x1 +#define K4B2G1646EBIH9_RD_DQS			0x3B +#define K4B2G1646EBIH9_WR_DQS			0x85 +#define K4B2G1646EBIH9_PHY_FIFO_WE		0x100 +#define K4B2G1646EBIH9_PHY_WR_DATA		0xC1 +#define K4B2G1646EBIH9_IOCTRL_VALUE		0x18B +  /**   * Configure DMM   */ diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h index a950ac3c1..8f9315c02 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h @@ -29,6 +29,7 @@  /* Control Module Base Address */  #define CTRL_BASE			0x48140000 +#define CTRL_DEVICE_BASE		0x48140600  /* PRCM Base Address */  #define PRCM_BASE			0x48180000 diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index d28f9a83f..7e3bb9c99 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -35,29 +35,4 @@  #define NON_SECURE_SRAM_START	0x40300000  #define NON_SECURE_SRAM_END	0x40320000  #endif - -/* ROM code defines */ -/* Boot device */ -#define BOOT_DEVICE_MASK	0xFF -#define BOOT_DEVICE_OFFSET	0x8 -#define DEV_DESC_PTR_OFFSET	0x4 -#define DEV_DATA_PTR_OFFSET	0x18 -#define BOOT_MODE_OFFSET	0x8 -#define RESET_REASON_OFFSET	0x9 -#define CH_FLAGS_OFFSET		0xA - -#define CH_FLAGS_CHSETTINGS	(0x1 << 0) -#define CH_FLAGS_CHRAM		(0x1 << 1) -#define CH_FLAGS_CHFLASH	(0x1 << 2) -#define CH_FLAGS_CHMMCSD	(0x1 << 3) - -#ifndef __ASSEMBLY__ -struct omap_boot_parameters { -	char *boot_message; -	unsigned int mem_boot_descriptor; -	unsigned char omap_bootdevice; -	unsigned char reset_reason; -	unsigned char ch_flags; -}; -#endif  #endif |