diff options
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx')
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/clocks_am33xx.h | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/cpu.h | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/ddr_defs.h | 24 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/sys_proto.h | 4 |
4 files changed, 39 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h index 140379fb3..02ed5957e 100644 --- a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h @@ -11,9 +11,17 @@ #ifndef _CLOCKS_AM33XX_H_ #define _CLOCKS_AM33XX_H_ +/* MAIN PLL Fdll supported frequencies */ +#define MPUPLL_M_1000 1000 +#define MPUPLL_M_800 800 +#define MPUPLL_M_720 720 +#define MPUPLL_M_600 600 +#define MPUPLL_M_550 550 +#define MPUPLL_M_300 300 + /* MAIN PLL Fdll = 550 MHz, by default */ #ifndef CONFIG_SYS_MPUCLK -#define CONFIG_SYS_MPUCLK 550 +#define CONFIG_SYS_MPUCLK MPUPLL_M_550 #endif #define UART_RESET (0x1 << 1) @@ -21,5 +29,7 @@ #define UART_SMART_IDLE_EN (0x1 << 0x3) extern void enable_dmm_clocks(void); +extern const struct dpll_params dpll_core_opp100; +extern struct dpll_params dpll_mpu_opp100; #endif /* endif _CLOCKS_AM33XX_H_ */ diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 73e6db899..52fa128af 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -38,6 +38,16 @@ #define AM335X 0xB944 #define TI81XX 0xB81E #define DEVICE_ID (CTRL_BASE + 0x0600) +#define DEVICE_ID_MASK 0x1FFF + +/* MPU max frequencies */ +#define AM335X_ZCZ_300 0x1FEF +#define AM335X_ZCZ_600 0x1FAF +#define AM335X_ZCZ_720 0x1F2F +#define AM335X_ZCZ_800 0x1E2F +#define AM335X_ZCZ_1000 0x1C2F +#define AM335X_ZCE_300 0x1FDF +#define AM335X_ZCE_600 0x1F9F /* This gives the status of the boot mode pins on the evm */ #define SYSBOOT_MASK (BIT(0) | BIT(1) | BIT(2)\ @@ -509,6 +519,8 @@ struct ctrl_dev { unsigned int macid1h; /* offset 0x3c */ unsigned int resv4[4]; unsigned int miisel; /* offset 0x50 */ + unsigned int resv5[106]; + unsigned int efuse_sma; /* offset 0x1FC */ }; /* gmii_sel register defines */ diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index 95f7a9ad4..fe48b5fed 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -110,20 +110,20 @@ #define MT41J512M8RH125_IOCTRL_VALUE 0x18B /* Samsung K4B2G1646E-BIH9 */ -#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x06 -#define K4B2G1646EBIH9_EMIF_TIM1 0x0888A39B -#define K4B2G1646EBIH9_EMIF_TIM2 0x2A04011A -#define K4B2G1646EBIH9_EMIF_TIM3 0x501F820F -#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C24AB2 -#define K4B2G1646EBIH9_EMIF_SDREF 0x0000093B +#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x07 +#define K4B2G1646EBIH9_EMIF_TIM1 0x0AAAE51B +#define K4B2G1646EBIH9_EMIF_TIM2 0x2A1D7FDA +#define K4B2G1646EBIH9_EMIF_TIM3 0x501F83FF +#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C052B2 +#define K4B2G1646EBIH9_EMIF_SDREF 0x00000C30 #define K4B2G1646EBIH9_ZQ_CFG 0x50074BE4 #define K4B2G1646EBIH9_DLL_LOCK_DIFF 0x1 -#define K4B2G1646EBIH9_RATIO 0x40 -#define K4B2G1646EBIH9_INVERT_CLKOUT 0x1 -#define K4B2G1646EBIH9_RD_DQS 0x3B -#define K4B2G1646EBIH9_WR_DQS 0x85 -#define K4B2G1646EBIH9_PHY_FIFO_WE 0x100 -#define K4B2G1646EBIH9_PHY_WR_DATA 0xC1 +#define K4B2G1646EBIH9_RATIO 0x80 +#define K4B2G1646EBIH9_INVERT_CLKOUT 0x0 +#define K4B2G1646EBIH9_RD_DQS 0x35 +#define K4B2G1646EBIH9_WR_DQS 0x3A +#define K4B2G1646EBIH9_PHY_FIFO_WE 0x97 +#define K4B2G1646EBIH9_PHY_WR_DATA 0x76 #define K4B2G1646EBIH9_IOCTRL_VALUE 0x18B /** diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index c6070a3fc..87b7d367b 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -10,6 +10,7 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ +#include <asm/arch/cpu.h> #define BOARD_REV_ID 0x0 @@ -42,4 +43,7 @@ u32 wait_on_value(u32, u32, void *, u32); #ifdef CONFIG_NOR_BOOT void enable_norboot_pin_mux(void); #endif +void am33xx_spl_board_init(void); +int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev); +int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); #endif |