7 files changed, 7 insertions, 17 deletions
diff --git a/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c
index 09f69ce32..642e67ae8 100644
--- a/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c
+++ b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c
@@ -386,7 +386,7 @@ ixQMgrNotificationEnable (IxQMgrQId qId,
 				     &dispatchQInfo[qId].statusMask);
 
 
-    /* Set the interupt source is this queue is in the range 0-31 */
+    /* Set the interrupt source is this queue is in the range 0-31 */
     if (qId < IX_QMGR_MIN_QUEUPP_QID)
     {
 	ixQMgrAqmIfIntSrcSelWrite (qId, srcSel);
diff --git a/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h
index 0ee412355..4e0de8235 100644
--- a/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h
@@ -279,7 +279,7 @@ typedef struct
     BOOL               portInitialized;
     UINT32 npeId; /**< NpeId for this port */
     IxEthAccTxDataInfo ixEthAccTxData; /**< Transmit data control structures */
-    IxEthAccRxDataInfo ixEthAccRxData; /**< Recieve data control structures */
+    IxEthAccRxDataInfo ixEthAccRxData; /**< Receive data control structures */
 } IxEthAccPortDataInfo; 
 
 extern IxEthAccPortDataInfo  ixEthAccPortData[];
diff --git a/arch/arm/cpu/ixp/npe/include/IxNpeA.h b/arch/arm/cpu/ixp/npe/include/IxNpeA.h
index 7427cc41c..90669c27e 100644
--- a/arch/arm/cpu/ixp/npe/include/IxNpeA.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeA.h
@@ -717,7 +717,7 @@ typedef struct
  */
 typedef struct
 {
-    UINT32  rxBitField;			/**< Recieved bit field */
+    UINT32  rxBitField;			/**< Received bit field */
     UINT32  atmCellHeader;		/**< ATM Cell Header */
     UINT32  rsvdWord0;                  /**< Reserved field */
     UINT16  currMbufLen;		/**< Mbuf Length */
diff --git a/arch/arm/cpu/ixp/npe/include/IxQMgr.h b/arch/arm/cpu/ixp/npe/include/IxQMgr.h
index 165ed96e5..03d7e0709 100644
--- a/arch/arm/cpu/ixp/npe/include/IxQMgr.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgr.h
@@ -570,7 +570,7 @@ typedef enum
  * @brief Queue interrupt source select.
  *
  * This enum defines the different source conditions on a queue that result in
- * an interupt being fired by the AQM. Interrupt source is configurable for
+ * an interrupt being fired by the AQM. Interrupt source is configurable for
  * queues 0-31 only. The interrupt source for queues 32-63 is hardwired to the
  * NE(Nearly Empty) status flag.
  *
diff --git a/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h
index f7194e72e..b65d621e3 100644
--- a/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h
@@ -404,7 +404,7 @@
 *
 * @def IX_ETH_ACC_RX_FRAME_ETH_Q 
 *
-* @brief  Eth0/Eth1 NPE Frame Recieve Q.
+* @brief  Eth0/Eth1 NPE Frame Receive Q.
 *
 * @note THIS IS NOT USED - the Rx queues are read from EthDB QoS configuration
 * 
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index a975d42a2..b17d267ea 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -284,7 +284,7 @@ copy_loop:
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
 	/*
 	 * fix .rel.dyn relocations
 	 */
@@ -326,7 +326,7 @@ fixnext:
 #endif
 
 clear_bss:
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
 	ldr	r0, _bss_start_ofs
 	ldr	r1, _bss_end_ofs
 	mov	r4, r6			/* reloc addr */
diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c
index 9f3ea42ec..087ddf80e 100644
--- a/arch/arm/cpu/ixp/timer.c
+++ b/arch/arm/cpu/ixp/timer.c
@@ -89,11 +89,6 @@ void reset_timer_masked(void)
 	gd->timestamp = 0;
 }
 
-void reset_timer(void)
-{
-	reset_timer_masked();
-}
-
 ulong get_timer_masked(void)
 {
 	return tick_to_time(get_ticks());
@@ -104,11 +99,6 @@ ulong get_timer(ulong base)
 	return get_timer_masked() - base;
 }
 
-void set_timer(ulong t)
-{
-	gd->timestamp = time_to_tick(t);
-}
-
 /* delay x useconds AND preserve advance timestamp value */
 void __udelay(unsigned long usec)
 {