diff options
Diffstat (limited to 'arch/arm/cpu/armv7')
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/config.mk | 7 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/lowlevel_init.S | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/slcr.c | 6 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/timer.c | 3 |
4 files changed, 15 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/exynos/config.mk b/arch/arm/cpu/armv7/exynos/config.mk new file mode 100644 index 000000000..ee0d2dab7 --- /dev/null +++ b/arch/arm/cpu/armv7/exynos/config.mk @@ -0,0 +1,7 @@ +# +# Copyright (C) Albert ARIBAUD <albert.u.boot@aribaud.net> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +SPL_OBJCFLAGS += -j .machine_param diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S index 69e3053a4..f1aea05c9 100644 --- a/arch/arm/cpu/armv7/lowlevel_init.S +++ b/arch/arm/cpu/armv7/lowlevel_init.S @@ -24,7 +24,7 @@ ENTRY(lowlevel_init) #ifdef CONFIG_SPL_BUILD ldr r9, =gdata #else - sub sp, #GD_SIZE + sub sp, sp, #GD_SIZE bic sp, sp, #7 mov r9, sp #endif diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c index 717ec65ae..b4c11c324 100644 --- a/arch/arm/cpu/armv7/zynq/slcr.c +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -101,6 +101,12 @@ void zynq_slcr_devcfg_enable(void) zynq_slcr_lock(); } +u32 zynq_slcr_get_boot_mode(void) +{ + /* Get the bootmode register value */ + return readl(&slcr_base->boot_mode); +} + u32 zynq_slcr_get_idcode(void) { return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >> diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c index 636322a8e..2be253c2c 100644 --- a/arch/arm/cpu/armv7/zynq/timer.c +++ b/arch/arm/cpu/armv7/zynq/timer.c @@ -107,8 +107,7 @@ void __udelay(unsigned long usec) if (usec == 0) return; - countticks = (u32) (((unsigned long long) TIMER_TICK_HZ * usec) / - 1000000); + countticks = lldiv(TIMER_TICK_HZ * usec, 1000000); /* decrementing timer */ timeend = readl(&timer_base->counter) - countticks; |