diff options
Diffstat (limited to 'arch/arm/cpu/arm920t')
| -rw-r--r-- | arch/arm/cpu/arm920t/a320/timer.c | 12 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/at91/timer.c | 21 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/at91rm9200/spi.c | 5 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/at91rm9200/timer.c | 18 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/ep93xx/timer.c | 15 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/imx/timer.c | 21 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/ks8695/timer.c | 25 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/s3c24x0/timer.c | 18 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/start.S | 8 |
9 files changed, 19 insertions, 124 deletions
diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c index 95cb8fd19..443d31d22 100644 --- a/arch/arm/cpu/arm920t/a320/timer.c +++ b/arch/arm/cpu/arm920t/a320/timer.c @@ -81,12 +81,6 @@ void reset_timer_masked(void) debug("%s(): lastdec = %lx\n", __func__, lastdec); } -void reset_timer(void) -{ - debug("%s()\n", __func__); - reset_timer_masked(); -} - /* * return timer ticks */ @@ -132,12 +126,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - debug("%s(%lx)\n", __func__, t); - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c index f0ad7d637..91607b525 100644 --- a/arch/arm/cpu/arm920t/at91/timer.c +++ b/arch/arm/cpu/arm920t/at91/timer.c @@ -59,7 +59,7 @@ int timer_init(void) when the value in TC_RC is reached */ writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr); - writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */ + writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */ writel(TIMER_LOAD_VAL, &tc->tc[0].rc); writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr); @@ -72,35 +72,16 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - void __udelay(unsigned long usec) { udelay_masked(usec); } -void reset_timer_masked(void) -{ - /* reset time */ - at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; - gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff; - gd->tbl = 0; -} - ulong get_timer_raw(void) { at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; diff --git a/arch/arm/cpu/arm920t/at91rm9200/spi.c b/arch/arm/cpu/arm920t/at91rm9200/spi.c index f3cb5d8c2..c70efc6ab 100644 --- a/arch/arm/cpu/arm920t/at91rm9200/spi.c +++ b/arch/arm/cpu/arm920t/at91rm9200/spi.c @@ -108,6 +108,7 @@ void AT91F_SpiEnable(int cs) unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) { unsigned int timeout; + unsigned long start; pDesc->state = BUSY; @@ -132,12 +133,12 @@ unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) } /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); timeout = 0; AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && - ((timeout = get_timer_masked() ) < CONFIG_SYS_SPI_WRITE_TOUT)); + ((timeout = get_timer(start) ) < CONFIG_SYS_SPI_WRITE_TOUT)); AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; pDesc->state = IDLE; diff --git a/arch/arm/cpu/arm920t/at91rm9200/timer.c b/arch/arm/cpu/arm920t/at91rm9200/timer.c index 9c54bbedb..fbe74b68c 100644 --- a/arch/arm/cpu/arm920t/at91rm9200/timer.c +++ b/arch/arm/cpu/arm920t/at91rm9200/timer.c @@ -71,34 +71,16 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { udelay_masked(usec); } -void reset_timer_masked (void) -{ - /* reset time */ - lastinc = READ_TIMER; - timestamp = 0; -} - ulong get_timer_raw (void) { ulong now = READ_TIMER; diff --git a/arch/arm/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c index 4a0ce4da6..a3990a74e 100644 --- a/arch/arm/cpu/arm920t/ep93xx/timer.c +++ b/arch/arm/cpu/arm920t/ep93xx/timer.c @@ -91,17 +91,6 @@ unsigned long get_timer(unsigned long base) return get_timer_masked() - base; } -void reset_timer_masked(void) -{ - read_timer(); - timer.ticks = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - void __udelay(unsigned long usec) { unsigned long long target; @@ -128,7 +117,9 @@ int timer_init(void) writel(TIMER_ENABLE | TIMER_CLKSEL, &timer_regs->timer3.control); - reset_timer_masked(); + /* Reset the timer */ + read_timer(); + timer.ticks = 0; return 0; } diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c index b06b518f0..6141bd497 100644 --- a/arch/arm/cpu/arm920t/imx/timer.c +++ b/arch/arm/cpu/arm920t/imx/timer.c @@ -43,7 +43,9 @@ int timer_init (void) TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */ TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */ - reset_timer_masked(); + /* Reset the timer */ + TCTL1 &= ~TCTL_TEN; + TCTL1 |= TCTL_TEN; /* Enable timer */ return (0); } @@ -51,28 +53,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked() - base; } -void set_timer (ulong t) -{ - /* nop */ -} - -void reset_timer_masked (void) -{ - TCTL1 &= ~TCTL_TEN; - TCTL1 |= TCTL_TEN; /* Enable timer */ -} - ulong get_timer_masked (void) { return TCN1; diff --git a/arch/arm/cpu/arm920t/ks8695/timer.c b/arch/arm/cpu/arm920t/ks8695/timer.c index 886e37059..234fe913e 100644 --- a/arch/arm/cpu/arm920t/ks8695/timer.c +++ b/arch/arm/cpu/arm920t/ks8695/timer.c @@ -33,7 +33,11 @@ ulong timer_ticks; int timer_init (void) { - reset_timer(); + /* Set the hadware timer for 1ms */ + ks8695_write(KS8695_TIMER1, TIMER_COUNT); + ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); + ks8695_write(KS8695_TIMER_CTRL, 0x2); + timer_ticks = 0; return 0; } @@ -46,20 +50,6 @@ int timer_init (void) #define TIMER_COUNT (TIMER_INTERVAL / 2) #define TIMER_PULSE TIMER_COUNT -void reset_timer_masked(void) -{ - /* Set the hadware timer for 1ms */ - ks8695_write(KS8695_TIMER1, TIMER_COUNT); - ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); - ks8695_write(KS8695_TIMER_CTRL, 0x2); - timer_ticks = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { /* Check for timer wrap */ @@ -76,11 +66,6 @@ ulong get_timer(ulong base) return (get_timer_masked() - base); } -void set_timer(ulong t) -{ - timer_ticks = t; -} - void __udelay(ulong usec) { ulong start = get_timer_masked(); diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c index f17b7ea5a..9571870b1 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/timer.c +++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c @@ -83,22 +83,11 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo; @@ -112,13 +101,6 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = READ_TIMER(); - timestamp = 0; -} - ulong get_timer_masked(void) { ulong tmr = get_ticks(); diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index a7476b055..0090f894d 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -142,11 +142,11 @@ copyex: # if defined(CONFIG_S3C2400) # define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ +# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */ # define CLKDIVN 0x14800014 /* clock divisor register */ #else # define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ +# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */ # define INTSUBMSK 0x4A00001C # define CLKDIVN 0x4C000014 /* clock divisor register */ # endif @@ -221,7 +221,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -263,7 +263,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ |