diff options
86 files changed, 654 insertions, 99 deletions
diff --git a/board/cray/L1/u-boot.lds b/board/cray/L1/u-boot.lds index 9d37257f5..f5b10f8b8 100644 --- a/board/cray/L1/u-boot.lds +++ b/board/cray/L1/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/csb272/u-boot.lds b/board/csb272/u-boot.lds index be381e17d..6c475553e 100644 --- a/board/csb272/u-boot.lds +++ b/board/csb272/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) diff --git a/board/csb472/u-boot.lds b/board/csb472/u-boot.lds index 375150db1..fec2789d3 100644 --- a/board/csb472/u-boot.lds +++ b/board/csb472/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) diff --git a/board/dave/PPChameleonEVB/u-boot.lds b/board/dave/PPChameleonEVB/u-boot.lds index ed02cef81..39bc654b6 100644 --- a/board/dave/PPChameleonEVB/u-boot.lds +++ b/board/dave/PPChameleonEVB/u-boot.lds @@ -66,7 +66,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/eric/u-boot.lds b/board/eric/u-boot.lds index 153e71f89..42872b20f 100644 --- a/board/eric/u-boot.lds +++ b/board/eric/u-boot.lds @@ -68,7 +68,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/esd/ar405/u-boot.lds b/board/esd/ar405/u-boot.lds index 4a881b6ed..cb58360b5 100644 --- a/board/esd/ar405/u-boot.lds +++ b/board/esd/ar405/u-boot.lds @@ -66,7 +66,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/esd/dp405/u-boot.lds b/board/esd/dp405/u-boot.lds index 7ff074c15..131166b6c 100644 --- a/board/esd/dp405/u-boot.lds +++ b/board/esd/dp405/u-boot.lds @@ -66,7 +66,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/esd/hub405/u-boot.lds b/board/esd/hub405/u-boot.lds index c4a1a4bc8..369241257 100644 --- a/board/esd/hub405/u-boot.lds +++ b/board/esd/hub405/u-boot.lds @@ -66,7 +66,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/esd/voh405/u-boot.lds b/board/esd/voh405/u-boot.lds index 7ff074c15..131166b6c 100644 --- a/board/esd/voh405/u-boot.lds +++ b/board/esd/voh405/u-boot.lds @@ -66,7 +66,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/g2000/u-boot.lds b/board/g2000/u-boot.lds index 7ff074c15..131166b6c 100644 --- a/board/g2000/u-boot.lds +++ b/board/g2000/u-boot.lds @@ -66,7 +66,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/ml2/u-boot.lds b/board/ml2/u-boot.lds index 1182f7400..80bf64466 100644 --- a/board/ml2/u-boot.lds +++ b/board/ml2/u-boot.lds @@ -63,7 +63,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/mpl/mip405/u-boot.lds b/board/mpl/mip405/u-boot.lds index 717f0d24d..8b67fef6c 100644 --- a/board/mpl/mip405/u-boot.lds +++ b/board/mpl/mip405/u-boot.lds @@ -72,7 +72,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/sandburst/karef/u-boot.lds b/board/sandburst/karef/u-boot.lds index 9b2c0788f..2439adb66 100644 --- a/board/sandburst/karef/u-boot.lds +++ b/board/sandburst/karef/u-boot.lds @@ -74,7 +74,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/sandburst/karef/u-boot.lds.debug b/board/sandburst/karef/u-boot.lds.debug index 15fe1e3f8..d00e25271 100644 --- a/board/sandburst/karef/u-boot.lds.debug +++ b/board/sandburst/karef/u-boot.lds.debug @@ -64,7 +64,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/sandburst/metrobox/u-boot.lds b/board/sandburst/metrobox/u-boot.lds index 16e0709b5..8c59a95f8 100644 --- a/board/sandburst/metrobox/u-boot.lds +++ b/board/sandburst/metrobox/u-boot.lds @@ -74,7 +74,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/sandburst/metrobox/u-boot.lds.debug b/board/sandburst/metrobox/u-boot.lds.debug index d122c050b..a3350f279 100644 --- a/board/sandburst/metrobox/u-boot.lds.debug +++ b/board/sandburst/metrobox/u-boot.lds.debug @@ -64,7 +64,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/sbc405/u-boot.lds b/board/sbc405/u-boot.lds index f3fd56f99..08d6f0a05 100644 --- a/board/sbc405/u-boot.lds +++ b/board/sbc405/u-boot.lds @@ -66,7 +66,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/board/sorcery/sorcery.c b/board/sorcery/sorcery.c index 3e1bd6f0c..90d429802 100644 --- a/board/sorcery/sorcery.c +++ b/board/sorcery/sorcery.c @@ -62,5 +62,7 @@ void pci_init_board (void) int board_eth_init(bd_t *bis) { + /* Initialize built-in FEC first */ + cpu_eth_init(bis); return pci_eth_init(bis); } diff --git a/board/xilinx/ml300/u-boot.lds b/board/xilinx/ml300/u-boot.lds index f05c7a61e..9c2174b80 100644 --- a/board/xilinx/ml300/u-boot.lds +++ b/board/xilinx/ml300/u-boot.lds @@ -64,7 +64,7 @@ SECTIONS cpu/ppc4xx/4xx_uart.o (.text) cpu/ppc4xx/cpu_init.o (.text) cpu/ppc4xx/speed.o (.text) - cpu/ppc4xx/4xx_enet.o (.text) + drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib_generic/crc32.o (.text) lib_ppc/extable.o (.text) diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c index 402188e30..27872fb78 100644 --- a/cpu/ixp/cpu.c +++ b/cpu/ixp/cpu.c @@ -32,6 +32,7 @@ #include <common.h> #include <command.h> +#include <netdev.h> #include <asm/arch/ixp425.h> ulong loops_per_jiffy; @@ -215,3 +216,11 @@ ulong bootcount_load (void) } #endif /* CONFIG_BOOTCOUNT_LIMIT */ + +int cpu_eth_init(bd_t *bis) +{ +#ifdef CONFIG_IXP4XX_NPE + npe_initialize(bis); +#endif + return 0; +} diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c index 8ddc06a2d..6272a3aac 100644 --- a/cpu/mips/au1x00_eth.c +++ b/cpu/mips/au1x00_eth.c @@ -283,7 +283,7 @@ int au1x00_enet_initialize(bd_t *bis){ if ((dev = (struct eth_device*)malloc(sizeof *dev)) == NULL) { puts ("malloc failed\n"); - return 0; + return -1; } memset(dev, 0, sizeof *dev); diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c index 38d869797..b7180b0c6 100644 --- a/cpu/mips/cpu.c +++ b/cpu/mips/cpu.c @@ -23,6 +23,7 @@ #include <common.h> #include <command.h> +#include <netdev.h> #include <asm/mipsregs.h> #include <asm/cacheops.h> #include <asm/reboot.h> @@ -73,3 +74,11 @@ void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) write_c0_index(index); tlb_write_indexed(); } + +int cpu_eth_init(bd_t *bis) +{ +#ifdef CONFIG_SOC_AU1X00 + au1x00_enet_initialize(bis); +#endif + return 0; +} diff --git a/cpu/mpc8220/cpu.c b/cpu/mpc8220/cpu.c index 5b3fdd32c..563cfe053 100644 --- a/cpu/mpc8220/cpu.c +++ b/cpu/mpc8220/cpu.c @@ -29,6 +29,7 @@ #include <watchdog.h> #include <command.h> #include <mpc8220.h> +#include <netdev.h> #include <asm/processor.h> DECLARE_GLOBAL_DATA_PTR; @@ -89,3 +90,15 @@ unsigned long get_tbclk (void) } /* ------------------------------------------------------------------------- */ + +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_MPC8220_FEC) + mpc8220_fec_initialize(bis); +#endif + return 0; +} diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 9f834d3e5..b9e748ab8 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -44,6 +44,7 @@ #include <watchdog.h> #include <command.h> #include <mpc8260.h> +#include <netdev.h> #include <asm/processor.h> #include <asm/cpm_8260.h> @@ -315,3 +316,15 @@ void ft_cpu_setup (void *blob, bd_t *bd) do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); } #endif /* CONFIG_OF_LIBFDT */ + +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_ETHER_ON_FCC) + fec_initialize(bis); +#endif + return 0; +} diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 5e885ab43..587fca323 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -33,6 +33,7 @@ #include <asm/processor.h> #include <libfdt.h> #include <tsec.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -361,9 +362,26 @@ int dma_xfer(void *dest, u32 count, void *src) */ int cpu_eth_init(bd_t *bis) { +#if defined(CONFIG_UEC_ETH1) + uec_initialize(0); +#endif +#if defined(CONFIG_UEC_ETH2) + uec_initialize(1); +#endif +#if defined(CONFIG_UEC_ETH3) + uec_initialize(2); +#endif +#if defined(CONFIG_UEC_ETH4) + uec_initialize(3); +#endif +#if defined(CONFIG_UEC_ETH5) + uec_initialize(4); +#endif +#if defined(CONFIG_UEC_ETH6) + uec_initialize(5); +#endif #if defined(CONFIG_TSEC_ENET) tsec_standard_init(bis); #endif - return 0; } diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index c78068786..943602f92 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -30,6 +30,7 @@ #include <watchdog.h> #include <command.h> #include <tsec.h> +#include <netdev.h> #include <asm/cache.h> #include <asm/io.h> @@ -383,9 +384,29 @@ void upmconfig (uint upm, uint * table, uint size) */ int cpu_eth_init(bd_t *bis) { -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85xx_FEC) +#if defined(CONFIG_ETHER_ON_FCC) + fec_initialize(bis); +#endif +#if defined(CONFIG_UEC_ETH1) + uec_initialize(0); +#endif +#if defined(CONFIG_UEC_ETH2) + uec_initialize(1); +#endif +#if defined(CONFIG_UEC_ETH3) + uec_initialize(2); +#endif +#if defined(CONFIG_UEC_ETH4) + uec_initialize(3); +#endif +#if defined(CONFIG_UEC_ETH5) + uec_initialize(4); +#endif +#if defined(CONFIG_UEC_ETH6) + uec_initialize(5); +#endif +#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) tsec_standard_init(bis); #endif - return 0; } diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index 420eaedf5..40f81efc3 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -37,6 +37,8 @@ #include <watchdog.h> #include <command.h> #include <mpc8xx.h> +#include <commproc.h> +#include <netdev.h> #include <asm/cache.h> #if defined(CONFIG_OF_LIBFDT) @@ -635,3 +637,18 @@ void reset_8xx_watchdog (volatile immap_t * immr) # endif /* CONFIG_LWMON */ } #endif /* CONFIG_WATCHDOG */ + +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ +int cpu_eth_init(bd_t *bis) +{ +#if defined(SCC_ENET) + scc_initialize(bis); +#endif +#if defined(FEC_ENET) + fec_initialize(bis); +#endif + return 0; +} diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile index 463b57566..96ab5c6a4 100644 --- a/cpu/ppc4xx/Makefile +++ b/cpu/ppc4xx/Makefile @@ -60,7 +60,6 @@ COBJS += usb.o COBJS += usb_ohci.o COBJS += usbdev.o ifndef CONFIG_XILINX_440 -COBJS += 4xx_enet.o COBJS += 4xx_uart.o COBJS += gpio.o COBJS += miiphy.o diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index a676b30ef..1f0b56cb7 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -36,6 +36,7 @@ #include <command.h> #include <asm/cache.h> #include <ppc4xx.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -693,3 +694,16 @@ void reset_4xx_watchdog(void) mtspr(tsr, 0x40000000); } #endif /* CONFIG_WATCHDOG */ + +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_PPC4xx_EMAC) + ppc_4xx_eth_initialize(bis); +#endif + return 0; +} + diff --git a/cpu/ppc4xx/4xx_enet.c b/drivers/net/4xx_enet.c index d7b16daf3..197826959 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/drivers/net/4xx_enet.c @@ -91,13 +91,6 @@ #include <miiphy.h> #include <malloc.h> -/* - * Only compile for platform with AMCC EMAC ethernet controller and - * network support enabled. - * Remark: CONFIG_405 describes Xilinx PPC405 FPGA without EMAC controller! - */ -#if defined(CONFIG_CMD_NET) && !defined(CONFIG_405) && !defined(CONFIG_IOP480) - #if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) #error "CONFIG_MII has to be defined!" #endif @@ -2131,5 +2124,3 @@ int emac4xx_miiphy_initialize (bd_t * bis) return 0; } #endif /* !defined(CONFIG_NET_MULTI) */ - -#endif diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 439c354f2..631336ab4 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -35,13 +35,13 @@ COBJS-$(CONFIG_DRIVER_DM9000) += dm9000x.o COBJS-$(CONFIG_E1000) += e1000.o COBJS-$(CONFIG_EEPRO100) += eepro100.o COBJS-$(CONFIG_ENC28J60) += enc28j60.o -COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o +COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o COBJS-$(CONFIG_GRETH) += greth.o COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o COBJS-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o COBJS-$(CONFIG_DRIVER_LAN91C96) += lan91c96.o COBJS-$(CONFIG_MACB) += macb.o -COBJS-$(CONFIG_MCFFEC) += mcffec.o +COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o COBJS-$(CONFIG_NATSEMI) += natsemi.o @@ -54,6 +54,7 @@ COBJS-$(CONFIG_NS8382X) += ns8382x.o COBJS-$(CONFIG_DRIVER_NS9750_ETHERNET) += ns9750_eth.o COBJS-$(CONFIG_PCNET) += pcnet.o COBJS-$(CONFIG_PLB2800_ETHER) += plb2800_eth.o +COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o COBJS-$(CONFIG_DRIVER_RTL8019) += rtl8019.o COBJS-$(CONFIG_RTL8139) += rtl8139.o COBJS-$(CONFIG_RTL8169) += rtl8169.o diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index c00474e22..18240a81a 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -27,14 +27,14 @@ #include <common.h> #include <malloc.h> -#include <asm/fec.h> -#include <asm/immap.h> - #include <command.h> #include <net.h> #include <netdev.h> #include <miiphy.h> +#include <asm/fec.h> +#include <asm/immap.h> + #undef ET_DEBUG #undef MII_DEBUG @@ -101,18 +101,6 @@ int fec_init(struct eth_device *dev, bd_t * bd); void fec_halt(struct eth_device *dev); void fec_reset(struct eth_device *dev); -extern int fecpin_setclear(struct eth_device *dev, int setclear); - -#ifdef CONFIG_SYS_DISCOVER_PHY -extern void __mii_init(void); -extern uint mii_send(uint mii_cmd); -extern int mii_discover_phy(struct eth_device *dev); -extern int mcffec_miiphy_read(char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); -extern int mcffec_miiphy_write(char *devname, unsigned char addr, - unsigned char reg, unsigned short value); -#endif - void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd) { if ((dup_spd >> 16) == FULL) { diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c new file mode 100644 index 000000000..2b733c66e --- /dev/null +++ b/drivers/net/mcfmii.c @@ -0,0 +1,321 @@ +/* + * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> +#include <net.h> +#include <netdev.h> + +#ifdef CONFIG_MCF547x_8x +#include <asm/fsl_mcdmafec.h> +#else +#include <asm/fec.h> +#endif +#include <asm/immap.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) +#undef MII_DEBUG +#undef ET_DEBUG + +/*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/ + +#if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII) +#include <miiphy.h> + +/* Make MII read/write commands for the FEC. */ +#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \ + (REG & 0x1f) << 18)) +#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \ + (REG & 0x1f) << 18) | (VAL & 0xffff)) + +#ifndef CONFIG_SYS_UNSPEC_PHYID +# define CONFIG_SYS_UNSPEC_PHYID 0 +#endif +#ifndef CONFIG_SYS_UNSPEC_STRID +# define CONFIG_SYS_UNSPEC_STRID 0 +#endif + +#ifdef CONFIG_MCF547x_8x +typedef struct fec_info_dma FEC_INFO_T; +#define FEC_T fecdma_t +#else +typedef struct fec_info_s FEC_INFO_T; +#define FEC_T fec_t +#endif + +typedef struct phy_info_struct { + u32 phyid; + char *strid; +} phy_info_t; + +phy_info_t phyinfo[] = { + {0x0022561B, "AMD79C784VC"}, /* AMD 79C784VC */ + {0x00406322, "BCM5222"}, /* Broadcom 5222 */ + {0x02a80150, "Intel82555"}, /* Intel 82555 */ + {0x0016f870, "LSI80225"}, /* LSI 80225 */ + {0x0016f880, "LSI80225/B"}, /* LSI 80225/B */ + {0x78100000, "LXT970"}, /* LXT970 */ + {0x001378e0, "LXT971"}, /* LXT971 and 972 */ + {0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */ + {0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */ + {0x20005CE1, "N83640"}, /* National 83640 */ + {0x20005C90, "N83848"}, /* National 83848 */ + {0x20005CA2, "N83849"}, /* National 83849 */ + {0x01814400, "QS6612"}, /* QS6612 */ +#if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID) + {CONFIG_SYS_UNSPEC_PHYID, CONFIG_SYS_UNSPEC_STRID}, +#endif + {0, 0} +}; + +/* + * mii_init -- Initialize the MII for MII command without ethernet + * This function is a subset of eth_init + */ +void mii_reset(FEC_INFO_T *info) +{ + volatile FEC_T *fecp = (FEC_T *) (info->miibase); + int i; + + fecp->ecr = FEC_ECR_RESET; + + for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) { + udelay(1); + } + if (i == FEC_RESET_DELAY) + printf("FEC_RESET_DELAY timeout\n"); +} + +/* send command to phy using mii, wait for result */ +uint mii_send(uint mii_cmd) +{ + FEC_INFO_T *info; + volatile FEC_T *ep; + struct eth_device *dev; + uint mii_reply; + int j = 0; + + /* retrieve from register structure */ + dev = eth_get_dev(); + info = dev->priv; + + ep = (FEC_T *) info->miibase; + + ep->mmfr = mii_cmd; /* command to phy */ + + /* wait for mii complete */ + while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) { + udelay(1); + j++; + } + if (j >= MCFFEC_TOUT_LOOP) { + printf("MII not complete\n"); + return -1; + } + + mii_reply = ep->mmfr; /* result from phy */ + ep->eir = FEC_EIR_MII; /* clear MII complete */ +#ifdef ET_DEBUG + printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n", + __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply); +#endif + + return (mii_reply & 0xffff); /* data read from phy */ +} +#endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */ + +#if defined(CONFIG_SYS_DISCOVER_PHY) +int mii_discover_phy(struct eth_device *dev) +{ +#define MAX_PHY_PASSES 11 + FEC_INFO_T *info = dev->priv; + int phyaddr, pass; + uint phyno, phytype; + int i, found = 0; + + if (info->phyname_init) + return info->phy_addr; + + phyaddr = -1; /* didn't find a PHY yet */ + for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) { + if (pass > 1) { + /* PHY may need more time to recover from reset. + * The LXT970 needs 50ms typical, no maximum is + * specified, so wait 10ms before try again. + * With 11 passes this gives it 100ms to wake up. + */ + udelay(10000); /* wait 10ms */ + } + + for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) { + + phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1)); +#ifdef ET_DEBUG + printf("PHY type 0x%x pass %d type\n", phytype, pass); +#endif + if (phytype != 0xffff) { + phyaddr = phyno; + phytype <<= 16; + phytype |= + mii_send(mk_mii_read(phyno, PHY_PHYIDR2)); + +#ifdef ET_DEBUG + printf("PHY @ 0x%x pass %d\n", phyno, pass); +#endif + + for (i = 0; i < (sizeof(phyinfo) / sizeof(phy_info_t)); i++) { + if (phyinfo[i].phyid == phytype) { +#ifdef ET_DEBUG + printf("phyid %x - %s\n", + phyinfo[i].phyid, + phyinfo[i].strid); +#endif + strcpy(info->phy_name, phyinfo[i].strid); + info->phyname_init = 1; + found = 1; + break; + } + } + + if (!found) { +#ifdef ET_DEBUG + printf("0x%08x\n", phytype); +#endif + strcpy(info->phy_name, "unknown"); + info->phyname_init = 1; + break; + } + } + } + } + + if (phyaddr < 0) + printf("No PHY device found.\n"); + + return phyaddr; +} +#endif /* CONFIG_SYS_DISCOVER_PHY */ + +void mii_init(void) __attribute__((weak,alias("__mii_init"))); + +void __mii_init(void) +{ + FEC_INFO_T *info; + volatile FEC_T *fecp; + struct eth_device *dev; + int miispd = 0, i = 0; + u16 autoneg = 0; + + /* retrieve from register structure */ + dev = eth_get_dev(); + info = dev->priv; + + fecp = (FEC_T *) info->miibase; + + fecpin_setclear(dev, 1); + + mii_reset(info); + + /* We use strictly polling mode only */ + fecp->eimr = 0; + + /* Clear any pending interrupt */ + fecp->eir = 0xffffffff; + + /* Set MII speed */ + miispd = (gd->bus_clk / 1000000) / 5; + fecp->mscr = miispd << 1; + + info->phy_addr = mii_discover_phy(dev); + +#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS) + while (i < MCFFEC_TOUT_LOOP) { + autoneg = 0; + miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg); + i++; + + if ((autoneg & AUTONEGLINK) == AUTONEGLINK) + break; + + udelay(500); + } + if (i >= MCFFEC_TOUT_LOOP) { + printf("Auto Negotiation not complete\n"); + } + + /* adapt to the half/full speed settings */ + info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16; + info->dup_spd |= miiphy_speed(dev->name, info->phy_addr); +} + +/* + * Read and write a MII PHY register, routines used by MII Utilities + * + * FIXME: These routines are expected to return 0 on success, but mii_send + * does _not_ return an error code. Maybe 0xFFFF means error, i.e. + * no PHY connected... + * For now always return 0. + * FIXME: These routines only work after calling eth_init() at least once! + * Otherwise they hang in mii_send() !!! Sorry! + */ + +int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg, + unsigned short *value) +{ + short rdreg; /* register working value */ + +#ifdef MII_DEBUG + printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr); +#endif + rdreg = mii_send(mk_mii_read(addr, reg)); + + *value = rdreg; + +#ifdef MII_DEBUG + printf("0x%04x\n", *value); +#endif + + return 0; +} + +int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg, + unsigned short value) +{ + short rdreg; /* register working value */ + +#ifdef MII_DEBUG + printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr); +#endif + + rdreg = mii_send(mk_mii_write(addr, reg, value)); + +#ifdef MII_DEBUG + printf("0x%04x\n", value); +#endif + + return 0; +} + +#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */ diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 88cd0f9ff..0e96ef184 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -70,7 +70,7 @@ typedef struct { static xemaclite emaclite; -static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ +static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ /* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ #ifdef CONFIG_ENV_IS_NOWHERE diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index ed7ed6575..bba3ef2c6 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -686,6 +686,31 @@ static void phy_change(struct eth_device *dev) && !defined(BITBANGMII) /* + * Find a device index from the devlist by name + * + * Returns: + * The index where the device is located, -1 on error + */ +static int uec_miiphy_find_dev_by_name(char *devname) +{ + int i; + + for (i = 0; i < MAXCONTROLLERS; i++) { + if (strncmp(devname, devlist[i]->name, strlen(devname)) == 0) { + break; + } + } + + /* If device cannot be found, returns -1 */ + if (i == MAXCONTROLLERS) { + debug ("%s: device %s not found in devlist\n", __FUNCTION__, devname); + i = -1; + } + + return i; +} + +/* * Read a MII PHY register. * * Returns: @@ -694,8 +719,16 @@ static void phy_change(struct eth_device *dev) static int uec_miiphy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) { - *value = uec_read_phy_reg(devlist[0], addr, reg); + int devindex = 0; + if (devname == NULL || value == NULL) { + debug("%s: NULL pointer given\n", __FUNCTION__); + } else { + devindex = uec_miiphy_find_dev_by_name(devname); + if (devindex >= 0) { + *value = uec_read_phy_reg(devlist[devindex], addr, reg); + } + } return 0; } @@ -708,11 +741,18 @@ static int uec_miiphy_read(char *devname, unsigned char addr, static int uec_miiphy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) { - uec_write_phy_reg(devlist[0], addr, reg, value); + int devindex = 0; + if (devname == NULL) { + debug("%s: NULL pointer given\n", __FUNCTION__); + } else { + devindex = uec_miiphy_find_dev_by_name(devname); + if (devindex >= 0) { + uec_write_phy_reg(devlist[devindex], addr, reg, value); + } + } return 0; } - #endif static int uec_set_mac_address(uec_private_t *uec, u8 *mac_addr) @@ -1415,6 +1455,14 @@ int uec_initialize(int index) #ifdef CONFIG_UEC_ETH4 uec_info = ð4_uec_info; #endif + } else if (index == 4) { +#ifdef CONFIG_UEC_ETH5 + uec_info = ð5_uec_info; +#endif + } else if (index == 5) { +#ifdef CONFIG_UEC_ETH6 + uec_info = ð6_uec_info; +#endif } else { printf("%s: index is illegal.\n", __FUNCTION__); return -EINVAL; diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c index 2243d3b12..829f08285 100644 --- a/drivers/qe/uec_phy.c +++ b/drivers/qe/uec_phy.c @@ -44,6 +44,54 @@ #define ugphy_vdbg(ugeth, fmt, args...) do { } while (0) #endif /* UEC_VERBOSE_DEBUG */ +/*--------------------------------------------------------------------+ + * Fixed PHY (PHY-less) support for Ethernet Ports. + * + * Copied from cpu/ppc4xx/4xx_enet.c + *--------------------------------------------------------------------*/ + +/* + * Some boards do not have a PHY for each ethernet port. These ports + * are known as Fixed PHY (or PHY-less) ports. For such ports, set + * the appropriate CONFIG_PHY_ADDR equal to CONFIG_FIXED_PHY and + * then define CONFIG_SYS_FIXED_PHY_PORTS to define what the speed and + * duplex should be for these ports in the board configuration + * file. + * + * For Example: + * #define CONFIG_FIXED_PHY 0xFFFFFFFF + * + * #define CONFIG_PHY_ADDR CONFIG_FIXED_PHY + * #define CONFIG_PHY1_ADDR 1 + * #define CONFIG_PHY2_ADDR CONFIG_FIXED_PHY + * #define CONFIG_PHY3_ADDR 3 + * + * #define CONFIG_SYS_FIXED_PHY_PORT(devnum,speed,duplex) \ + * {devnum, speed, duplex}, + * + * #define CONFIG_SYS_FIXED_PHY_PORTS \ + * CONFIG_SYS_FIXED_PHY_PORT(0,SPEED_100,DUPLEX_FULL) \ + * CONFIG_SYS_FIXED_PHY_PORT(2,SPEED_100,DUPLEX_HALF) + */ + +#ifndef CONFIG_FIXED_PHY +#define CONFIG_FIXED_PHY 0xFFFFFFFF /* Fixed PHY (PHY-less) */ +#endif + +#ifndef CONFIG_SYS_FIXED_PHY_PORTS +#define CONFIG_SYS_FIXED_PHY_PORTS /* default is an empty array */ +#endif + +struct fixed_phy_port { + unsigned int devnum; /* ethernet port */ + unsigned int speed; /* specified speed 10,100 or 1000 */ + unsigned int duplex; /* specified duplex FULL or HALF */ +}; + +static const struct fixed_phy_port fixed_phy_port[] = { + CONFIG_SYS_FIXED_PHY_PORTS /* defined in board configuration file */ +}; + static void config_genmii_advert (struct uec_mii_info *mii_info); static void genmii_setup_forced (struct uec_mii_info *mii_info); static void genmii_restart_aneg (struct uec_mii_info *mii_info); @@ -533,6 +581,28 @@ static void dm9161_close (struct uec_mii_info *mii_info) { } +static int fixed_phy_aneg (struct uec_mii_info *mii_info) +{ + mii_info->autoneg = 0; /* Turn off auto negotiation for fixed phy */ + return 0; +} + +static int fixed_phy_read_status (struct uec_mii_info *mii_info) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(fixed_phy_port); i++) { + if (mii_info->mii_id == fixed_phy_port[i].devnum) { + mii_info->speed = fixed_phy_port[i].speed; + mii_info->duplex = fixed_phy_port[i].duplex; + mii_info->link = 1; /* Link is always UP */ + mii_info->pause = 0; + break; + } + } + return 0; +} + static struct phy_info phy_info_dm9161 = { .phy_id = 0x0181b880, .phy_id_mask = 0x0ffffff0, @@ -577,6 +647,14 @@ static struct phy_info phy_info_bcm5481 = { .init = bcm_init, }; +static struct phy_info phy_info_fixedphy = { + .phy_id = CONFIG_FIXED_PHY, + .phy_id_mask = CONFIG_FIXED_PHY, + .name = "Fixed PHY", + .config_aneg = fixed_phy_aneg, + .read_status = fixed_phy_read_status, +}; + static struct phy_info phy_info_genmii = { .phy_id = 0x00000000, .phy_id_mask = 0x00000000, @@ -591,6 +669,7 @@ static struct phy_info *phy_info[] = { &phy_info_dm9161a, &phy_info_marvell, &phy_info_bcm5481, + &phy_info_fixedphy, &phy_info_genmii, NULL }; diff --git a/include/configs/AR405.h b/include/configs/AR405.h index 864774c22..9f1926957 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -67,6 +67,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index bcc85ee0b..a694083d5 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -56,6 +56,7 @@ #define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index d58f50848..d0e246409 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -52,6 +52,7 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1 diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 3493d75bd..1a2bc1c2e 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -52,6 +52,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 734ab95e4..e231fa705 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -54,6 +54,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 47ad89dfe..2319c5872 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -54,6 +54,7 @@ #undef CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index 4e94dfc32..be8c238a0 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -53,6 +53,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index 2d60ebf2e..326371253 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -50,6 +50,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 1122d02d6..f1608e145 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -39,6 +39,8 @@ #define CONFIG_SYS_CLK_FREQ 25000000 #define CONFIG_BAUDRATE 9600 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */ diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 0ff4f7dfe..884f3fe88 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -52,6 +52,7 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 939e21605..1d20efea0 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -54,6 +54,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 508a0cae3..729153c2e 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -253,6 +253,7 @@ int du440_phy_addr(int devnum); #endif +#define CONFIG_PPC4xx_EMAC #define CONFIG_IBM_EMAC4_V4 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR du440_phy_addr(0) /* PHY address */ diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h index c05945a72..1b766a7dc 100644 --- a/include/configs/ERIC.h +++ b/include/configs/ERIC.h @@ -93,6 +93,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index 9f5d3caa5..1dd6e573d 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -88,6 +88,7 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_BOOTPATH +#define CONFIG_PPC4xx_EMAC #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME diff --git a/include/configs/G2000.h b/include/configs/G2000.h index 4341f02e6..d299044cb 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -80,6 +80,7 @@ #define CONFIG_NET_MULTI 1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY1_ADDR 1 /* PHY address */ diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 1e7cc124d..80e59bb26 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -64,6 +64,7 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1 diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 3e5842444..b3c7046fc 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -54,6 +54,7 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/JSE.h b/include/configs/JSE.h index 508b5c8db..8aca1f941 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -132,6 +132,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index 403081d0d..4b67c9454 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -157,6 +157,7 @@ /*----------------------------------------------------------------------- * Networking *----------------------------------------------------------------------*/ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */ diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index c0ddd45c0..518173aa5 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -221,6 +221,7 @@ /*----------------------------------------------------------------------- * Networking *----------------------------------------------------------------------*/ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 7dcf1855a..c58ce053f 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -336,6 +336,7 @@ /************************************************************ * Ethernet Stuff ***********************************************************/ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index ff11df92e..32814d49f 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -50,6 +50,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index a635fca19..58e9328e4 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -50,6 +50,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index b55e383b2..0393366b5 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -63,6 +63,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 2966979cb..5c4d69b20 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -278,6 +278,7 @@ /************************************************************ * Ethernet Stuff ***********************************************************/ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ /************************************************************ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 675dbe667..11ce0080f 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -54,6 +54,7 @@ #define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index 12e63b717..8d07d7705 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -56,6 +56,7 @@ #define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 7071ccbfe..7219bb8ae 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -315,6 +315,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_IBM_EMAC4_V4 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address, See schematics */ diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index e66f8efea..09a96417f 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -104,6 +104,7 @@ #undef CONFIG_EXT_PHY #define CONFIG_NET_MULTI 1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #ifndef CONFIG_EXT_PHY #define CONFIG_PHY_ADDR 1 /* EMAC0 PHY address */ diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index fb1febc5c..10ef620d8 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -55,6 +55,7 @@ #define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index b6e358881..90efc6d81 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -53,6 +53,7 @@ #define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index e546369c9..51d0a0a6a 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -65,6 +65,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* disallow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index 226033831..ca1a9d4a7 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -65,6 +65,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* disallow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index ec8156406..01cdf3a6f 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -54,6 +54,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h index 569bb9052..8d44ec6d7 100644 --- a/include/configs/XPEDITE1K.h +++ b/include/configs/XPEDITE1K.h @@ -167,6 +167,7 @@ extern void out32(unsigned int, unsigned long); #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address phy0 not populated */ #define CONFIG_PHY1_ADDR 1 /* PHY address phy1 not populated */ diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 315841257..6e9f5e5a5 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -198,6 +198,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 0x02 /* dummy setting, no EMAC0 used */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 85165710b..d3dc3e533 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -45,6 +45,7 @@ /* * Ethernet/EMAC/PHY */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII /* MII PHY management */ #define CONFIG_NET_MULTI #define CONFIG_NETCONSOLE /* include NetConsole support */ diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 393e9929a..874f2c0b3 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -180,6 +180,7 @@ * MII PHY configuration * */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ diff --git a/include/configs/csb472.h b/include/configs/csb472.h index af382526f..2e30e6964 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -179,6 +179,7 @@ * MII PHY configuration * */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ diff --git a/include/configs/korat.h b/include/configs/korat.h index ca3e8a9fc..d56da1448 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -215,6 +215,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_IBM_EMAC4_V4 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 2 /* PHY address, See schematics */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index e0dbd6113..05055c89a 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -326,6 +326,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_IBM_EMAC4_V4 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 3 /* PHY address, See schematics */ diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h index 1fa4b00eb..0a757943e 100644 --- a/include/configs/netstal-common.h +++ b/include/configs/netstal-common.h @@ -58,6 +58,7 @@ /* * Ethernet/EMAC/PHY */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ #if defined(CONFIG_440) diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 1dc8656bf..729ca6ac7 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -158,6 +158,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0x1c /* PHY address */ #define CONFIG_HAS_ETH1 diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 6e2d9067c..000ae5cd7 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -218,6 +218,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_NET_MULTI 1 /* required for netconsole */ #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 1a7630195..0f7fca38d 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -45,6 +45,7 @@ #define CONFIG_ENV_IS_IN_EEPROM #undef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_PPC4xx_EMAC #define CONFIG_NET_MULTI 1 #define CONFIG_HAS_ETH1 1 #define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index d93ca2d98..c156820ac 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -58,6 +58,7 @@ #define CONFIG_BOOTCOMMAND "version;echo;tftpboot ${loadaddr} ${loadfile};bootvx" /* autoboot command */ +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 44135dfac..d152a9670 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -166,6 +166,8 @@ /* #define CONFIG_EEPRO100_SROM_WRITE */ /* #define CONFIG_SHOW_MAC */ #define CONFIG_EEPRO100 + +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* add 405GP MII PHY management */ #define CONFIG_PHY_ADDR 1 /* the connected Phy defaults to address 1 */ diff --git a/include/configs/zeus.h b/include/configs/zeus.h index b75e8a118..1a77c7196 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -46,6 +46,7 @@ #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0x01 /* PHY address */ #define CONFIG_HAS_ETH1 1 diff --git a/include/netdev.h b/include/netdev.h index 87d578c27..751f0dab5 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -41,11 +41,13 @@ int board_eth_init(bd_t *bis); int cpu_eth_init(bd_t *bis); /* Driver initialization prototypes */ +int au1x00_enet_initialize(bd_t*); int bfin_EMAC_initialize(bd_t *bis); int dc21x4x_initialize(bd_t *bis); int e1000_initialize(bd_t *bis); int eepro100_initialize(bd_t *bis); int eth_3com_initialize (bd_t * bis); +int fec_initialize (bd_t *bis); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int inca_switch_initialize(bd_t *bis); @@ -54,14 +56,19 @@ int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); int mpc512x_fec_initialize(bd_t *bis); int mpc5xxx_fec_initialize(bd_t *bis); +int mpc8220_fec_initialize(bd_t *bis); int natsemi_initialize(bd_t *bis); +int npe_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); int plb2800_eth_initialize(bd_t *bis); +int ppc_4xx_eth_initialize (bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); +int scc_initialize(bd_t *bis); int skge_initialize(bd_t *bis); int tsi108_eth_initialize(bd_t *bis); +int uec_initialize(int index); int uli526x_initialize(bd_t *bis); /* Boards with PCI network controllers can call this from their board_eth_init() @@ -39,15 +39,8 @@ static int __def_eth_init(bd_t *bis) int cpu_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); int board_eth_init(bd_t *bis) __attribute((weak, alias("__def_eth_init"))); -extern int au1x00_enet_initialize(bd_t*); -extern int fec_initialize(bd_t*); -extern int mpc8220_fec_initialize(bd_t*); extern int mv6436x_eth_initialize(bd_t *); extern int mv6446x_eth_initialize(bd_t *); -extern int ppc_4xx_eth_initialize(bd_t *); -extern int scc_initialize(bd_t*); -extern int npe_initialize(bd_t *); -extern int uec_initialize(int); #ifdef CONFIG_API extern void (*push_packet)(volatile void *, int); @@ -159,43 +152,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_DB64460) || defined(CONFIG_P3Mx) mv6446x_eth_initialize(bis); #endif -#if defined(CONFIG_4xx) && !defined(CONFIG_IOP480) && !defined(CONFIG_AP1000) - ppc_4xx_eth_initialize(bis); -#endif -#ifdef SCC_ENET - scc_initialize(bis); -#endif -#if defined(CONFIG_MPC8220_FEC) - mpc8220_fec_initialize(bis); -#endif -#if defined(CONFIG_UEC_ETH1) - uec_initialize(0); -#endif -#if defined(CONFIG_UEC_ETH2) - uec_initialize(1); -#endif -#if defined(CONFIG_UEC_ETH3) - uec_initialize(2); -#endif -#if defined(CONFIG_UEC_ETH4) - uec_initialize(3); -#endif -#if defined(CONFIG_UEC_ETH5) - uec_initialize(4); -#endif -#if defined(CONFIG_UEC_ETH6) - uec_initialize(5); -#endif - -#if defined(FEC_ENET) || defined(CONFIG_ETHER_ON_FCC) - fec_initialize(bis); -#endif -#if defined(CONFIG_AU1X00) - au1x00_enet_initialize(bis); -#endif -#if defined(CONFIG_IXP4XX_NPE) - npe_initialize(bis); -#endif if (!eth_devices) { puts ("No ethernet found.\n"); show_boot_progress (-64); @@ -525,8 +481,7 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_AT91RM9200) at91rm9200_miiphy_initialize(bis); #endif -#if defined(CONFIG_4xx) && !defined(CONFIG_IOP480) \ - && !defined(CONFIG_AP1000) && !defined(CONFIG_405) +#if defined(CONFIG_PPC4xx_EMAC) emac4xx_miiphy_initialize(bis); #endif #if defined(CONFIG_MCF52x2) |