diff options
76 files changed, 804 insertions, 362 deletions
@@ -11,7 +11,7 @@ # line; without any arguments, MAKEALL defaults to building all Power # Architecture systems (i. e. same as for "MAKEALL powerpc"). # -# With the iontroduction of the board.cfg file, it has become possible +# With the introduction of the board.cfg file, it has become possible # to provide additional selections. We use standard command line # options for this: # @@ -125,6 +125,12 @@ FILTER="\$1 !~ /^#/" if [ "$SELECTED" ] ; then SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg) + + # Make sure some boards from boards.cfg are actually found + if [ -z "$SELECTED" ] ; then + echo "Error: No boards selected, invalid arguments" + exit 1 + fi fi ######################################################################### diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S index 280781e16..985e1ce70 100644 --- a/arch/powerpc/cpu/74xx_7xx/start.S +++ b/arch/powerpc/cpu/74xx_7xx/start.S @@ -712,7 +712,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S index fe35190e7..10557cf20 100644 --- a/arch/powerpc/cpu/mpc512x/start.S +++ b/arch/powerpc/cpu/mpc512x/start.S @@ -616,7 +616,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc5xx/start.S b/arch/powerpc/cpu/mpc5xx/start.S index 63449c3d4..3dbd23d0b 100644 --- a/arch/powerpc/cpu/mpc5xx/start.S +++ b/arch/powerpc/cpu/mpc5xx/start.S @@ -456,7 +456,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index ad546771f..38c0bd7c1 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -671,7 +671,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S index b029e8417..ca4267870 100644 --- a/arch/powerpc/cpu/mpc8220/start.S +++ b/arch/powerpc/cpu/mpc8220/start.S @@ -644,7 +644,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S index 616de58fb..0dd130038 100644 --- a/arch/powerpc/cpu/mpc824x/start.S +++ b/arch/powerpc/cpu/mpc824x/start.S @@ -586,7 +586,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S index 521a6399b..255a15eae 100644 --- a/arch/powerpc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -907,7 +907,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index a35697da0..515be4c87 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -955,7 +955,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 291557d40..945c1b847 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -146,7 +146,7 @@ _start_e500: beq 2b /* Setup interrupt vectors */ - lis r1,CONFIG_SYS_TEXT_BASE@h + lis r1,CONFIG_SYS_MONITOR_BASE@h mtspr IVPR,r1 li r1,0x0100 @@ -292,25 +292,25 @@ _start_e500: lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@h ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@l - lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h - ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l + lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h + ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l /* The 85xx has the default boot window 0xff800000 - 0xffffffff */ lis r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h ori r9,r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l #else /* - * create a temp mapping in AS=1 to the 1M CONFIG_SYS_TEXT_BASE space, the main - * image has been relocated to CONFIG_SYS_TEXT_BASE on the second stage. + * create a temp mapping in AS=1 to the 1M CONFIG_SYS_MONITOR_BASE space, the main + * image has been relocated to CONFIG_SYS_MONITOR_BASE on the second stage. */ lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@h ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@l - lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@h - ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@l + lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE, (MAS2_I|MAS2_G))@h + ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE, (MAS2_I|MAS2_G))@l - lis r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h - ori r9,r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l + lis r9,FSL_BOOKE_MAS3(CONFIG_SYS_MONITOR_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h + ori r9,r9,FSL_BOOKE_MAS3(CONFIG_SYS_MONITOR_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l #endif mtspr MAS0,r6 @@ -1040,7 +1040,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds index 5fd3e6c8e..fa2088bb3 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds @@ -34,42 +34,16 @@ SECTIONS /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } .text : { - *(.text) - *(.got1) + *(.text*) } :text _etext = .; PROVIDE (etext = .); .rodata : { - *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } :text - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } /* Read-write section, merged into data segment: */ . = (. + 0x00FF) & 0xFFFFFF00; @@ -77,23 +51,19 @@ SECTIONS PROVIDE (erotext = .); .reloc : { - *(.got) + KEEP(*(.got)) _GOT2_TABLE_ = .; - *(.got2) + KEEP(*(.got2)) _FIXUP_TABLE_ = .; - *(.fixup) + KEEP(*(.fixup)) } __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; __fixup_entries = (. - _FIXUP_TABLE_) >> 2; .data : { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS + *(.data*) + *(.sdata*) } _edata = .; PROVIDE (edata = .); @@ -117,7 +87,7 @@ SECTIONS .bootpg ADDR(.text) - 0x1000 : { - arch/powerpc/cpu/mpc85xx/start.o (.bootpg) + arch/powerpc/cpu/mpc85xx/start.o KEEP(*(.bootpg)) } :text = 0xffff . = ADDR(.text) + 0x80000; @@ -125,9 +95,8 @@ SECTIONS __bss_start = .; .bss (NOLOAD) : { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) + *(.sbss*) + *(.bss*) *(COMMON) } :bss diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds index 7d9cee98e..b10e0f9ee 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds @@ -28,15 +28,15 @@ SECTIONS { . = 0xfff00000; .text : { - *(.text) + *(.text*) } _etext = .; .reloc : { _GOT2_TABLE_ = .; - *(.got2) + KEEP(*(.got2)) _FIXUP_TABLE_ = .; - *(.fixup) + KEEP(*(.fixup)) } __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; __fixup_entries = (. - _FIXUP_TABLE_) >> 2; @@ -54,13 +54,13 @@ SECTIONS __init_end = .; .resetvec ADDR(.text) + 0xffc : { - *(.resetvec) + KEEP(*(.resetvec)) } = 0xffff __bss_start = .; .bss : { - *(.sbss) - *(.bss) + *(.sbss*) + *(.bss*) } _end = .; } diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S index 612711569..4c29de61a 100644 --- a/arch/powerpc/cpu/mpc86xx/start.S +++ b/arch/powerpc/cpu/mpc86xx/start.S @@ -730,7 +730,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 9d022bf54..6a16c26d6 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -587,7 +587,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 363becc80..65195f528 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -1611,7 +1611,7 @@ in_ram: lwzux r0,r4,r11 cmpwi r0,0 add r0,r0,r11 - stw r10,0(r3) + stw r4,0(r3) beq- 5f stw r0,0(r4) 5: bdnz 3b diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 671f9e985..9403e4b02 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -193,13 +193,13 @@ void pci_init_board(void) if (io_sel & 1) { if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS)) - printf (" eTSEC1 is in sgmii mode.\n"); + printf("eTSEC1 is in sgmii mode.\n"); if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) - printf (" eTSEC2 is in sgmii mode.\n"); + printf("eTSEC2 is in sgmii mode.\n"); if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) - printf (" eTSEC3 is in sgmii mode.\n"); + printf("eTSEC3 is in sgmii mode.\n"); if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS)) - printf (" eTSEC4 is in sgmii mode.\n"); + printf("eTSEC4 is in sgmii mode.\n"); } #ifdef CONFIG_PCIE1 @@ -218,14 +218,14 @@ void pci_init_board(void) pcie1_hose.region_count = 1; #endif - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", + printf ("PCIE1: connected to Slot as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -242,7 +242,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -254,7 +254,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI1: disabled\n"); } puts("\n"); @@ -267,11 +267,11 @@ void pci_init_board(void) SET_STD_PCI_INFO(pci_info[num], 2); pci_agent = fsl_setup_hose(&pci2_hose, pci_info[num].regs); - puts (" PCI2\n"); + puts("PCI2\n"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } puts("\n"); #else diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index 68c63ac02..f183cf61d 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -45,6 +45,8 @@ int checkboard (void) { u8 sw; struct cpu_type *cpu = gd->cpu; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + unsigned int i; printf("Board: %sDS, ", cpu->name); printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", @@ -66,6 +68,19 @@ int checkboard (void) puts("36-bit Addressing\n"); #endif + /* Display the RCW, so that no one gets confused as to what RCW + * we're actually using for this boot. + */ + puts("Reset Configuration Word (RCW):"); + for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) { + u32 rcw = in_be32(&gur->rcwsr[i]); + + if ((i % 4) == 0) + printf("\n %08x:", i * 4); + printf(" %08x", rcw); + } + puts("\n"); + /* Display the actual SERDES reference clocks as configured by the * dip switches on the board. Note that the SWx registers could * technically be set to force the reference clocks to match the diff --git a/board/freescale/corenet_ds/pci.c b/board/freescale/corenet_ds/pci.c index e1bca1984..775b623cc 100644 --- a/board/freescale/corenet_ds/pci.c +++ b/board/freescale/corenet_ds/pci.c @@ -68,13 +68,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_1); SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to Slot 1 as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot 1 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE1); /* disable */ @@ -90,13 +90,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_2); SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected to Slot 3 as %s (base addr %lx)\n", + printf("PCIE2: connected to Slot 3 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE2); /* disable */ @@ -112,13 +112,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_3); SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf(" PCIE3 connected to Slot 2 as %s (base addr %lx)\n", + printf("PCIE3: connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE3); /* disable */ @@ -134,13 +134,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_4); SET_STD_PCIE_INFO(pci_info[num], 4); pcie_ep = fsl_setup_hose(&pcie4_hose, pci_info[num].regs); - printf(" PCIE4 connected to as %s (base addr %lx)\n", + printf("PCIE4: connected to as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie4_hose, first_free_busno); } else { - printf (" PCIE4: disabled\n"); + printf("PCIE4: disabled\n"); } #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE4); /* disable */ diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index c8e08563b..cf92ba121 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -211,12 +211,12 @@ void pci_init_board(void) devdisr, sdrs2_io_sel, io_sel); if (sdrs2_io_sel == 7) - printf(" Serdes2 disalbed\n"); + printf("Serdes2 disalbed\n"); else if (sdrs2_io_sel == 4) { - printf(" eTSEC1 is in sgmii mode.\n"); - printf(" eTSEC3 is in sgmii mode.\n"); + printf("eTSEC1 is in sgmii mode.\n"); + printf("eTSEC3 is in sgmii mode.\n"); } else if (sdrs2_io_sel == 6) - printf(" eTSEC1 is in sgmii mode.\n"); + printf("eTSEC1 is in sgmii mode.\n"); puts("\n"); #ifdef CONFIG_PCIE3 @@ -229,13 +229,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_3); SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf (" PCIE3 connected to Slot3 as %s (base address %lx)\n", + printf("PCIE3: connected to Slot3 as %s (base address %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); @@ -253,13 +253,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_1); SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot1 as %s (base address %lx)\n", + printf("PCIE1: connected to Slot1 as %s (base address %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -277,13 +277,13 @@ void pci_init_board(void) LAW_TRGT_IF_PCIE_2); SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf (" PCIE2 connected to Slot 2 as %s (base address %lx)\n", + printf("PCIE2: connected to Slot 2 as %s (base address %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -304,7 +304,7 @@ void pci_init_board(void) LAW_TRGT_IF_PCI); SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -316,7 +316,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c index f9ff827f4..d354a26f6 100644 --- a/board/freescale/mpc8540ads/mpc8540ads.c +++ b/board/freescale/mpc8540ads/mpc8540ads.c @@ -47,10 +47,10 @@ int checkboard (void) puts("Board: ADS\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c index 0580fe723..59ec60446 100644 --- a/board/freescale/mpc8541cds/mpc8541cds.c +++ b/board/freescale/mpc8541cds/mpc8541cds.c @@ -221,17 +221,17 @@ int checkboard (void) MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev), MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev); - printf (" PCI1: %d bit, %s MHz, %s\n", + printf("PCI1: %d bit, %s MHz, %s\n", (pci1_32) ? 32 : 64, (pci1_speed == 33000000) ? "33" : (pci1_speed == 66000000) ? "66" : "unknown", pci1_clk_sel ? "sync" : "async"); if (pci_dual) { - printf (" PCI2: 32 bit, 66 MHz, %s\n", + printf("PCI2: 32 bit, 66 MHz, %s\n", pci2_clk_sel ? "sync" : "async"); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } /* diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index da3a2b6ee..31c3fad86 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -120,9 +120,9 @@ void pci_init_board(void) if (io_sel & 1) { if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS)) - printf (" eTSEC1 is in sgmii mode.\n"); + printf("eTSEC1 is in sgmii mode.\n"); if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) - printf (" eTSEC3 is in sgmii mode.\n"); + printf("eTSEC3 is in sgmii mode.\n"); } puts("\n"); @@ -142,9 +142,9 @@ void pci_init_board(void) pcie3_hose.region_count = 1; #endif - printf (" PCIE3 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE3: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); @@ -154,7 +154,7 @@ void pci_init_board(void) */ in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS); } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); #else @@ -177,14 +177,14 @@ void pci_init_board(void) pcie1_hose.region_count = 1; #endif - printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -208,13 +208,13 @@ void pci_init_board(void) pcie2_hose.region_count = 1; #endif - printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -231,7 +231,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -243,7 +243,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 23e552bde..14c902cb9 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -284,7 +284,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -308,7 +308,7 @@ void pci_init_board(void) } #endif } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); @@ -321,10 +321,10 @@ void pci_init_board(void) uint pci2_clk_sel = porpllsr & 0x4000; /* PORPLLSR[17] */ uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */ if (pci_dual) { - printf (" PCI2: 32 bit, 66 MHz, %s\n", + printf("PCI2: 32 bit, 66 MHz, %s\n", pci2_clk_sel ? "sync" : "async"); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } } #else @@ -337,14 +337,14 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c index b7e0e0cd8..edaba26f5 100644 --- a/board/freescale/mpc8555cds/mpc8555cds.c +++ b/board/freescale/mpc8555cds/mpc8555cds.c @@ -219,17 +219,17 @@ int checkboard (void) MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev), MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev); - printf (" PCI1: %d bit, %s MHz, %s\n", + printf("PCI1: %d bit, %s MHz, %s\n", (pci1_32) ? 32 : 64, (pci1_speed == 33000000) ? "33" : (pci1_speed == 66000000) ? "66" : "unknown", pci1_clk_sel ? "sync" : "async"); if (pci_dual) { - printf (" PCI2: 32 bit, 66 MHz, %s\n", + printf("PCI2: 32 bit, 66 MHz, %s\n", pci2_clk_sel ? "sync" : "async"); } else { - printf (" PCI2: disabled\n"); + printf("PCI2: disabled\n"); } /* diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c index 423e9d72a..1761431e3 100644 --- a/board/freescale/mpc8560ads/mpc8560ads.c +++ b/board/freescale/mpc8560ads/mpc8560ads.c @@ -252,10 +252,10 @@ int checkboard (void) puts("Board: ADS\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index bd859e4ee..d74fcac98 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -378,7 +378,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", + printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", (pci_32) ? 32 : 64, (pci_speed == 33333000) ? "33" : (pci_speed == 66666000) ? "66" : "unknown", @@ -390,7 +390,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); @@ -404,14 +404,14 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index 743e712b8..dc0884e7b 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -584,13 +584,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 6b96dfc16..120f35c2c 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -177,13 +177,13 @@ void pci_init_board(void) debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS)) - printf (" eTSEC1 is in sgmii mode.\n"); + printf("eTSEC1 is in sgmii mode.\n"); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) - printf (" eTSEC2 is in sgmii mode.\n"); + printf("eTSEC2 is in sgmii mode.\n"); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) - printf (" eTSEC3 is in sgmii mode.\n"); + printf("eTSEC3 is in sgmii mode.\n"); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS)) - printf (" eTSEC4 is in sgmii mode.\n"); + printf("eTSEC4 is in sgmii mode.\n"); puts("\n"); #ifdef CONFIG_PCIE3 @@ -192,9 +192,9 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){ SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf (" PCIE3 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE3: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); /* @@ -211,7 +211,7 @@ void pci_init_board(void) in_be32(p); } } else { - printf (" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); #else @@ -224,13 +224,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){ SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -244,13 +244,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index f67f3e3c5..61a635de7 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -244,14 +244,14 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf (" PCIE1 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); @@ -265,13 +265,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){ SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf (" PCIE2 connected to Slot as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); @@ -283,14 +283,14 @@ void pci_init_board(void) if (!(devdisr & MPC86xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf(" PCI connected to PCI slots as %s" \ + printf("PCI: connected to PCI slots as %s" \ " (base address %lx)\n", pci_agent ? "Agent" : "Host", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 092ead665..812111db1 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -157,9 +157,9 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); @@ -171,22 +171,22 @@ void pci_init_board(void) + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000))); } else { - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); } #else - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); #endif /* CONFIG_PCIE1 */ #ifdef CONFIG_PCIE2 SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); #else - puts(" PCIE2: disabled\n"); + puts("PCIE2: disabled\n"); #endif /* CONFIG_PCIE2 */ } diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index ee93e8b81..7cb549b1b 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -225,7 +225,7 @@ static void configure_pcie(struct fsl_pci_info *info, set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law); set_next_law(info->io_phys, law_size_bits(info->io_size), info->law); is_endpoint = fsl_setup_hose(hose, info->regs); - printf(" PCIE%u connected to %s as %s (base addr %lx)\n", + printf("PCIE%u: connected to %s as %s (base addr %lx)\n", info->pci_num, connected, is_endpoint ? "Endpoint" : "Root Complex", info->regs); bus_number = fsl_pci_init_port(info, hose, bus_number); @@ -255,7 +255,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 1); configure_pcie(&pci_info, &pcie1_hose, serdes_slot_name(PCIE1)); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */ @@ -266,7 +266,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 2); configure_pcie(&pci_info, &pcie2_hose, serdes_slot_name(PCIE2)); } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */ @@ -277,7 +277,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info, 3); configure_pcie(&pci_info, &pcie3_hose, serdes_slot_name(PCIE3)); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */ diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index fae31f28c..1c4c0200e 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -1,5 +1,5 @@ /* - * Copyright 2009 Freescale Semiconductor, Inc. + * Copyright 2009-2010 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -33,6 +33,7 @@ #include <tsec.h> #include <vsc7385.h> #include <netdev.h> +#include <rtc.h> DECLARE_GLOBAL_DATA_PTR; @@ -156,6 +157,7 @@ int board_early_init_r(void) set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, flash_esel, BOOKE_PAGESZ_16M, 1); + rtc_reset(); return 0; } diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c index 97d4f834b..2a2d6b702 100644 --- a/board/freescale/p1_p2_rdb/pci.c +++ b/board/freescale/p1_p2_rdb/pci.c @@ -56,7 +56,7 @@ void pci_init_board(void) debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) - printf (" eTSEC2 is in sgmii mode.\n"); + printf("eTSEC2 is in sgmii mode.\n"); puts("\n"); #ifdef CONFIG_PCIE2 @@ -65,13 +65,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf (" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); #else @@ -84,13 +84,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); #else diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 608ff916d..b507677c3 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -207,9 +207,9 @@ void pci_init_board(void) debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) - printf(" eTSEC2 is in sgmii mode.\n"); + printf("eTSEC2 is in sgmii mode.\n"); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) - printf(" eTSEC3 is in sgmii mode.\n"); + printf("eTSEC3 is in sgmii mode.\n"); puts("\n"); #ifdef CONFIG_PCIE2 @@ -218,9 +218,9 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected to ULI as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); @@ -245,7 +245,7 @@ void pci_init_board(void) } #endif } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } puts("\n"); #else @@ -258,13 +258,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf(" PCIE3 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE3: connected to Slot 1 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } puts("\n"); #else @@ -277,13 +277,13 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } puts("\n"); #else diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c index a302b9176..0b8ea8192 100644 --- a/board/pm854/pm854.c +++ b/board/pm854/pm854.c @@ -59,10 +59,10 @@ int checkboard (void) puts("Board: MicroSys PM854\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c index f9d92d998..4e059b085 100644 --- a/board/pm856/pm856.c +++ b/board/pm856/pm856.c @@ -213,10 +213,10 @@ int checkboard (void) puts("Board: MicroSys PM856\n"); #ifdef CONFIG_PCI - printf(" PCI1: 32 bit, %d MHz (compiled)\n", + printf("PCI1: 32 bit, %d MHz (compiled)\n", CONFIG_SYS_CLK_FREQ / 1000000); #else - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); #endif /* diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 733979c61..272428fbf 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -342,7 +342,7 @@ pci_init_board(void) uint pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; uint pci_speed = CONFIG_SYS_CLK_FREQ; /* get_clock_freq() */ - printf (" PCI host: %d bit, %s MHz, %s, %s\n", + printf("PCI: Host, %d bit, %s MHz, %s, %s\n", (pci_32) ? 32 : 64, (pci_speed == 33000000) ? "33" : (pci_speed == 66000000) ? "66" : "unknown", @@ -353,7 +353,7 @@ pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf (" PCI: disabled\n"); + printf("PCI: disabled\n"); } puts("\n"); @@ -368,11 +368,11 @@ pci_init_board(void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); - printf (" PCIE at base address %lx\n", pci_info[num].regs); + printf("PCIE: base address %lx\n", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf (" PCIE: disabled\n"); + printf("PCIE: disabled\n"); } puts("\n"); diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index d954d2f6f..5bf2364ee 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -221,29 +221,29 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE1: connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); } #else - puts(" PCIE1: disabled\n"); + puts("PCIE1: disabled\n"); #endif /* CONFIG_PCIE1 */ #ifdef CONFIG_PCIE2 SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected as %s (base addr %lx)\n", - pcie_ep ? "Endpoint" : "Root Complex", - pci_info[num].regs); + printf("PCIE2: connected as %s (base addr %lx)\n", + pcie_ep ? "Endpoint" : "Root Complex", + pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); #else - puts(" PCIE2: disabled\n"); + puts("PCIE2: disabled\n"); #endif /* CONFIG_PCIE2 */ } diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index 2c3885f23..527af6dd2 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -298,7 +298,7 @@ int misc_init_r (void) */ set_lbc_or(0, ((-flash_info[1].size) & 0xffff8000) | (CONFIG_SYS_OR0_PRELIM & 0x00007fff)); - set_lbc_br(0, gd->bd->bi_flashstart | + set_lbc_br(0, (gd->bd->bi_flashstart + flash_info[0].size) | (CONFIG_SYS_BR0_PRELIM & 0x00007fff)); /* @@ -567,7 +567,7 @@ void pci_init_board (void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s\n", + printf("PCI1: %d bit, %s MHz, %s, %s, %s\n", (pci_32) ? 32 : 64, (pci_speed == 33333333) ? "33" : (pci_speed == 66666666) ? "66" : "unknown", @@ -591,7 +591,7 @@ void pci_init_board (void) } #endif } else { - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); @@ -603,12 +603,12 @@ void pci_init_board (void) if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected as %s\n", + printf("PCIE1: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c index f425ceedc..4a0965bf0 100644 --- a/board/xes/common/fsl_8xxx_pci.c +++ b/board/xes/common/fsl_8xxx_pci.c @@ -95,7 +95,7 @@ void pci_init_board(void) if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { SET_STD_PCI_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs); - printf("\n PCI1: %d bit %s, %s %d MHz, %s, %s\n", + printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n", pci_32 ? 32 : 64, pcix ? "PCIX" : "PCI", pci_spd_norm ? ">=" : "<=", @@ -106,7 +106,7 @@ void pci_init_board(void) first_free_busno = fsl_pci_init_port(&pci_info[num++], &pci1_hose, first_free_busno); } else { - printf(" PCI1: disabled\n"); + printf("PCI1: disabled\n"); } #elif defined CONFIG_MPC8548 /* PCI1 not present on MPC8572 */ @@ -119,12 +119,12 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) { SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf(" PCIE1 connected as %s\n", + printf("PCIE1: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); } else { - printf(" PCIE1: disabled\n"); + printf("PCIE1: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE1); @@ -136,12 +136,12 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) { SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); - printf(" PCIE2 connected as %s\n", + printf("PCIE2: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); } else { - printf(" PCIE2: disabled\n"); + printf("PCIE2: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE2); @@ -153,12 +153,12 @@ void pci_init_board(void) if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) { SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); - printf(" PCIE3 connected as %s\n", + printf("PCIE3: connected as %s\n", pcie_ep ? "Endpoint" : "Root Complex"); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); } else { - printf(" PCIE3: disabled\n"); + printf("PCIE3: disabled\n"); } #else setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE3); diff --git a/boards.cfg b/boards.cfg index 6c2a6672f..08e531e79 100644 --- a/boards.cfg +++ b/boards.cfg @@ -569,6 +569,7 @@ MPC8540EVAL powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M MPC8540EVAL_33 powerpc mpc85xx mpc8540eval - - MPC8540EVAL MPC8540EVAL_66 powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M P2020DS_36BIT powerpc mpc85xx p2020ds freescale - P2020DS:36BIT +P2020DS_DDR2 powerpc mpc85xx p2020ds freescale - P2020DS:DDR2 MPC8536DS powerpc mpc85xx mpc8536ds freescale - MPC8536DS MPC8536DS_36BIT powerpc mpc85xx mpc8536ds freescale - MPC8536DS:36BIT MPC8536DS_NAND powerpc mpc85xx mpc8536ds freescale - MPC8536DS:NAND @@ -589,7 +590,6 @@ P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010 P2010RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,NAND P2010RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,SDCARD -P2020DS_DDR2 powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,DDR2 P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020 P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,NAND P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,SDCARD diff --git a/common/cmd_pci.c b/common/cmd_pci.c index ccf5adaaa..92631ea2d 100644 --- a/common/cmd_pci.c +++ b/common/cmd_pci.c @@ -104,68 +104,6 @@ void pciinfo(int BusNum, int ShortPCIListing) } } -static char *pci_classes_str(u8 class) -{ - switch (class) { - case PCI_CLASS_NOT_DEFINED: - return "Build before PCI Rev2.0"; - break; - case PCI_BASE_CLASS_STORAGE: - return "Mass storage controller"; - break; - case PCI_BASE_CLASS_NETWORK: - return "Network controller"; - break; - case PCI_BASE_CLASS_DISPLAY: - return "Display controller"; - break; - case PCI_BASE_CLASS_MULTIMEDIA: - return "Multimedia device"; - break; - case PCI_BASE_CLASS_MEMORY: - return "Memory controller"; - break; - case PCI_BASE_CLASS_BRIDGE: - return "Bridge device"; - break; - case PCI_BASE_CLASS_COMMUNICATION: - return "Simple comm. controller"; - break; - case PCI_BASE_CLASS_SYSTEM: - return "Base system peripheral"; - break; - case PCI_BASE_CLASS_INPUT: - return "Input device"; - break; - case PCI_BASE_CLASS_DOCKING: - return "Docking station"; - break; - case PCI_BASE_CLASS_PROCESSOR: - return "Processor"; - break; - case PCI_BASE_CLASS_SERIAL: - return "Serial bus controller"; - break; - case PCI_BASE_CLASS_INTELLIGENT: - return "Intelligent controller"; - break; - case PCI_BASE_CLASS_SATELLITE: - return "Satellite controller"; - break; - case PCI_BASE_CLASS_CRYPT: - return "Cryptographic device"; - break; - case PCI_BASE_CLASS_SIGNAL_PROCESSING: - return "DSP"; - break; - case PCI_CLASS_OTHERS: - return "Does not fit any class"; - break; - default: - return "???"; - break; - }; -} /* * Subroutine: pci_header_show_brief @@ -190,7 +128,7 @@ void pci_header_show_brief(pci_dev_t dev) printf("0x%.4x 0x%.4x %-23s 0x%.2x\n", vendor, device, - pci_classes_str(class), subclass); + pci_class_str(class), subclass); } /* @@ -225,7 +163,7 @@ void pci_header_show(pci_dev_t dev) PRINT (" status register = 0x%.4x\n", word, PCI_STATUS); PRINT (" revision ID = 0x%.2x\n", byte, PCI_REVISION_ID); PRINT2(" class code = 0x%.2x (%s)\n", byte, PCI_CLASS_CODE, - pci_classes_str); + pci_class_str); PRINT (" sub class code = 0x%.2x\n", byte, PCI_CLASS_SUB_CODE); PRINT (" programming interface = 0x%.2x\n", byte, PCI_CLASS_PROG); PRINT (" cache line = 0x%.2x\n", byte, PCI_CACHE_LINE_SIZE); diff --git a/common/env_mmc.c b/common/env_mmc.c index 3d7fceb09..7c9392c86 100644 --- a/common/env_mmc.c +++ b/common/env_mmc.c @@ -29,6 +29,7 @@ #include <linux/stddef.h> #include <malloc.h> #include <mmc.h> +#include <search.h> #include <errno.h> /* references to names in env_common.c */ diff --git a/common/env_sf.c b/common/env_sf.c index a597b24dc..47c6a7066 100644 --- a/common/env_sf.c +++ b/common/env_sf.c @@ -272,7 +272,7 @@ int saveenv(void) u32 saved_size, saved_offset; char *saved_buffer = NULL; u32 sector = 1; - int ret; + int ret = 1; env_t env_new; char *res; ssize_t len; @@ -293,7 +293,6 @@ int saveenv(void) saved_offset = CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE; saved_buffer = malloc(saved_size); if (!saved_buffer) { - ret = 1; goto done; } ret = spi_flash_read(env_flash, saved_offset, diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 4f11b3631..a082ca7d5 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o +COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o COBJS := $(COBJS-y) diff --git a/drivers/mtd/spi/ramtron.c b/drivers/mtd/spi/ramtron.c new file mode 100644 index 000000000..171390d5c --- /dev/null +++ b/drivers/mtd/spi/ramtron.c @@ -0,0 +1,319 @@ +/* + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Note: RAMTRON SPI FRAMs are ferroelectric, nonvolatile RAMs + * with an interface identical to SPI flash devices. + * However since they behave like RAM there are no delays or + * busy polls required. They can sustain read or write at the + * allowed SPI bus speed, which can be 40 MHz for some devices. + * + * Unfortunately some RAMTRON devices do not have a means of + * identifying them. They will leave the SO line undriven when + * the READ-ID command is issued. It is therefore mandatory + * that the MISO line has a proper pull-up, so that READ-ID + * will return a row of 0xff. This 0xff pseudo-id will cause + * probes by all vendor specific functions that are designed + * to handle it. If the MISO line is not pulled up, READ-ID + * could return any random noise, even mimicking another + * device. + * + * We use CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + * to define which device will be assumed after a simple status + * register verify. This method is prone to false positive + * detection and should therefore be the last to be tried. + * Enter it in the last position in the table in spi_flash.c! + * + * The define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC both activates + * compilation of the special handler and defines the device + * to assume. + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> +#include "spi_flash_internal.h" + +/* RAMTRON commands common to all devices */ +#define CMD_RAMTRON_WREN 0x06 /* Write Enable */ +#define CMD_RAMTRON_WRDI 0x04 /* Write Disable */ +#define CMD_RAMTRON_RDSR 0x05 /* Read Status Register */ +#define CMD_RAMTRON_WRSR 0x01 /* Write Status Register */ +#define CMD_RAMTRON_READ 0x03 /* Read Data Bytes */ +#define CMD_RAMTRON_WRITE 0x02 /* Write Data Bytes */ +/* not all have those: */ +#define CMD_RAMTRON_FSTRD 0x0b /* Fast Read (for compatibility - not used here) */ +#define CMD_RAMTRON_SLEEP 0xb9 /* Enter Sleep Mode */ +#define CMD_RAMTRON_RDID 0x9f /* Read ID */ +#define CMD_RAMTRON_SNR 0xc3 /* Read Serial Number */ + +/* + * Properties of supported FRAMs + * Note: speed is currently not used because we have no method to deliver that + * value to the upper layers + */ +struct ramtron_spi_fram_params { + u32 size; /* size in bytes */ + u8 addr_len; /* number of address bytes */ + u8 merge_cmd; /* some address bits are in the command byte */ + u8 id1; /* device ID 1 (family, density) */ + u8 id2; /* device ID 2 (sub, rev, rsvd) */ + u32 speed; /* max. SPI clock in Hz */ + const char *name; /* name for display and/or matching */ +}; + +struct ramtron_spi_fram { + struct spi_flash flash; + const struct ramtron_spi_fram_params *params; +}; + +static inline struct ramtron_spi_fram *to_ramtron_spi_fram(struct spi_flash + *flash) +{ + return container_of(flash, struct ramtron_spi_fram, flash); +} + +/* + * table describing supported FRAM chips: + * chips without RDID command must have the values 0xff for id1 and id2 + */ +static const struct ramtron_spi_fram_params ramtron_spi_fram_table[] = { + { + .size = 32*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x22, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V02", + }, + { + .size = 32*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x22, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN02", + }, + { + .size = 64*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x23, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V05", + }, + { + .size = 64*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x23, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN05", + }, + { + .size = 128*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0x24, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V10", + }, + { + .size = 128*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0x24, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN10", + }, +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + { + .size = 256*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0xff, + .id2 = 0xff, + .speed = 40000000, + .name = "FM25H20", + }, +#endif +}; + +static int ramtron_common(struct spi_flash *flash, + u32 offset, size_t len, void *buf, u8 command) +{ + struct ramtron_spi_fram *sn = to_ramtron_spi_fram(flash); + u8 cmd[4]; + int cmd_len; + int ret; + + if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) { + cmd[0] = command; + cmd[1] = offset >> 16; + cmd[2] = offset >> 8; + cmd[3] = offset; + cmd_len = 4; + } else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) { + cmd[0] = command; + cmd[1] = offset >> 8; + cmd[2] = offset; + cmd_len = 3; + } else { + printf("SF: unsupported addr_len or merge_cmd\n"); + return -1; + } + + /* claim the bus */ + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + if (command == CMD_RAMTRON_WRITE) { + /* send WREN */ + ret = spi_flash_cmd(flash->spi, CMD_RAMTRON_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + goto releasebus; + } + } + + /* do the transaction */ + if (command == CMD_RAMTRON_WRITE) + ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len); + else + ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len); + if (ret < 0) + debug("SF: Transaction failed\n"); + +releasebus: + /* release the bus */ + spi_release_bus(flash->spi); + return ret; +} + +static int ramtron_read(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + return ramtron_common(flash, offset, len, buf, + CMD_RAMTRON_READ); +} + +static int ramtron_write(struct spi_flash *flash, + u32 offset, size_t len, const void *buf) +{ + return ramtron_common(flash, offset, len, (void *)buf, + CMD_RAMTRON_WRITE); +} + +int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + debug("SF: Erase of RAMTRON FRAMs is pointless\n"); + return -1; +} + +/* + * nore: we are called here with idcode pointing to the first non-0x7f byte + * already! + */ +struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode) +{ + const struct ramtron_spi_fram_params *params; + struct ramtron_spi_fram *sn; + unsigned int i; +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + int ret; + u8 sr; +#endif + + /* NOTE: the bus has been claimed before this function is called! */ + switch (idcode[0]) { + case 0xc2: + /* JEDEC conformant RAMTRON id */ + for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) { + params = &ramtron_spi_fram_table[i]; + if (idcode[1] == params->id1 && idcode[2] == params->id2) + goto found; + } + break; +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + case 0xff: + /* + * probably open MISO line, pulled up. + * We COULD have a non JEDEC conformant FRAM here, + * read the status register to verify + */ + ret = spi_flash_cmd(spi, CMD_RAMTRON_RDSR, &sr, 1); + if (ret) + return NULL; + + /* Bits 5,4,0 are fixed 0 for all devices */ + if ((sr & 0x31) != 0x00) + return NULL; + /* now find the device */ + for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) { + params = &ramtron_spi_fram_table[i]; + if (!strcmp(params->name, CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC)) + goto found; + } + debug("SF: Unsupported non-JEDEC RAMTRON device " + CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "\n"); + break; +#endif + default: + break; + } + + /* arriving here means no method has found a device we can handle */ + debug("SF/ramtron: unsupported device id0=%02x id1=%02x id2=%02x\n", + idcode[0], idcode[1], idcode[2]); + return NULL; + +found: + sn = malloc(sizeof(*sn)); + if (!sn) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + sn->params = params; + sn->flash.spi = spi; + sn->flash.name = params->name; + + sn->flash.write = ramtron_write; + sn->flash.read = ramtron_read; + sn->flash.erase = ramtron_erase; + sn->flash.size = params->size; + + printf("SF: Detected %s with size ", params->name); + print_size(sn->flash.size, "\n"); + + return &sn->flash; +} diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index b4ba1dda5..ab02ef3e0 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -146,10 +146,18 @@ static const struct { #ifdef CONFIG_SPI_FLASH_WINBOND { 0, 0xef, spi_flash_probe_winbond, }, #endif +#ifdef CONFIG_SPI_FRAM_RAMTRON + { 6, 0xc2, spi_fram_probe_ramtron, }, +# undef IDCODE_CONT_LEN +# define IDCODE_CONT_LEN 6 +#endif /* Keep it sorted by best detection */ #ifdef CONFIG_SPI_FLASH_STMICRO { 0, 0xff, spi_flash_probe_stmicro, }, #endif +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + { 0, 0xff, spi_fram_probe_ramtron, }, +#endif }; #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN) diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 08546fbb0..9bc43dd21 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -50,3 +50,4 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode); diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c index 5ae53e816..51e7c19e0 100644 --- a/drivers/net/dc2114x.c +++ b/drivers/net/dc2114x.c @@ -280,6 +280,12 @@ int dc21x4x_initialize(bd_t *bis) dev = (struct eth_device*) malloc(sizeof *dev); + if (!dev) { + printf("Can not allocalte memory of dc21x4x\n"); + break; + } + memset(dev, 0, sizeof(*dev)); + #ifdef CONFIG_TULIP_FIX_DAVICOM sprintf(dev->name, "Davicom#%d", card_number); #else diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 2825342ff..18584efdd 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -5177,7 +5177,21 @@ e1000_initialize(bd_t * bis) } nic = (struct eth_device *) malloc(sizeof (*nic)); + if (!nic) { + printf("Error: e1000 - Can not alloc memory\n"); + return 0; + } + hw = (struct e1000_hw *) malloc(sizeof (*hw)); + if (!hw) { + free(nic); + printf("Error: e1000 - Can not alloc memory\n"); + return 0; + } + + memset(nic, 0, sizeof(*dev)); + memset(hw, 0, sizeof(*hw)); + hw->pdev = devno; nic->priv = hw; diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c index 22e14e381..ae0e0d458 100644 --- a/drivers/net/eepro100.c +++ b/drivers/net/eepro100.c @@ -450,6 +450,11 @@ int eepro100_initialize (bd_t * bis) } dev = (struct eth_device *) malloc (sizeof *dev); + if (!dev) { + printf("eepro100: Can not allocate memory\n"); + break; + } + memset(dev, 0, sizeof(*dev)); sprintf (dev->name, "i82559#%d", card_number); dev->priv = (void *) devno; /* this have to come before bus_to_phys() */ diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 3f09c2b65..c17f9379b 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -710,6 +710,7 @@ static int fec_probe(bd_t *bd) puts("fec_mxc: not enough malloc memory\n"); return -ENOMEM; } + memset(edev, 0, sizeof(*edev)); edev->priv = fec; edev->init = fec_init; edev->send = fec_send; diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index e09da1d2a..14b2d355c 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c @@ -321,6 +321,11 @@ natsemi_initialize(bd_t * bis) } dev = (struct eth_device *) malloc(sizeof *dev); + if (!dev) { + printf("natsemi: Can not allocate memory\n"); + break; + } + memset(dev, 0, sizeof(*dev)); sprintf(dev->name, "dp83815#%d", card_number); dev->iobase = bus_to_phys(iobase); diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c index 198f73dee..45402cc0e 100644 --- a/drivers/net/ns8382x.c +++ b/drivers/net/ns8382x.c @@ -340,6 +340,11 @@ ns8382x_initialize(bd_t * bis) } dev = (struct eth_device *) malloc(sizeof *dev); + if (!dev) { + printf("ns8382x: Can not allocate memory\n"); + break; + } + memset(dev, 0, sizeof(*dev)); sprintf(dev->name, "dp8382x#%d", card_number); dev->iobase = bus_to_phys(iobase); diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c index 99b69429e..e994cb690 100644 --- a/drivers/net/pcnet.c +++ b/drivers/net/pcnet.c @@ -187,6 +187,11 @@ int pcnet_initialize (bd_t * bis) * Allocate and pre-fill the device structure. */ dev = (struct eth_device *) malloc (sizeof *dev); + if (!dev) { + printf("pcnet: Can not allocate memory\n"); + break; + } + memset(dev, 0, sizeof(*dev)); dev->priv = (void *) devbusfn; sprintf (dev->name, "pcnet#%d", dev_nr); diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c index db8a727c8..c2779db0a 100644 --- a/drivers/net/rtl8139.c +++ b/drivers/net/rtl8139.c @@ -220,6 +220,11 @@ int rtl8139_initialize(bd_t *bis) debug ("rtl8139: REALTEK RTL8139 @0x%x\n", iobase); dev = (struct eth_device *)malloc(sizeof *dev); + if (!dev) { + printf("Can not allocate memory of rtl8139\n"); + break; + } + memset(dev, 0, sizeof(*dev)); sprintf (dev->name, "RTL8139#%d", card_number); diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index e45d1a522..b81dcad2c 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -894,7 +894,12 @@ int rtl8169_initialize(bd_t *bis) debug ("rtl8169: REALTEK RTL8169 @0x%x\n", iobase); dev = (struct eth_device *)malloc(sizeof *dev); + if (!dev) { + printf("Can not allocate memory of rtl8169\n"); + break; + } + memset(dev, 0, sizeof(*dev)); sprintf (dev->name, "RTL8169#%d", card_number); dev->priv = (void *) devno; diff --git a/drivers/net/tsi108_eth.c b/drivers/net/tsi108_eth.c index 079354aaf..f100ec1a5 100644 --- a/drivers/net/tsi108_eth.c +++ b/drivers/net/tsi108_eth.c @@ -731,7 +731,11 @@ int tsi108_eth_initialize (bd_t * bis) for (index = 0; index < CONFIG_TSI108_ETH_NUM_PORTS; index++) { dev = (struct eth_device *)malloc(sizeof(struct eth_device)); - + if (!dev) { + printf("tsi108: Can not allocate memory\n"); + break; + } + memset(dev, 0, sizeof(*dev)); sprintf (dev->name, "TSI108_eth%d", index); dev->iobase = ETH_BASE + (index * ETH_PORT_OFFSET); diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c index d626d68cb..a4624e173 100644 --- a/drivers/net/uli526x.c +++ b/drivers/net/uli526x.c @@ -225,6 +225,11 @@ int uli526x_initialize(bd_t *bis) iobase &= ~0xf; dev = (struct eth_device *)malloc(sizeof *dev); + if (!dev) { + printf("uli526x: Can not allocate memory\n"); + break; + } + memset(dev, 0, sizeof(*dev)); sprintf(dev->name, "uli526x#%d", card_number); db = (struct uli526x_board_info *) malloc(sizeof(struct uli526x_board_info)); diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 1f021036e..5b34dcbb0 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -391,11 +391,11 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data) * 1 == pci agent or pcie end-point */ if (!temp8) { - printf(" Scanning PCI bus %02x\n", + debug(" Scanning PCI bus %02x\n", hose->current_busno); hose->last_busno = pci_hose_scan_bus(hose, hose->current_busno); } else { - debug(" Not scanning PCI bus %02x. PI=%x\n", + debug(" Not scanning PCI bus %02x. PI=%x\n", hose->current_busno, temp8); hose->last_busno = hose->current_busno; } @@ -441,6 +441,8 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, { volatile ccsr_fsl_pci_t *pci; struct pci_region *r; + pci_dev_t dev = PCI_BDF(busno,0,0); + u8 pcie_cap; pci = (ccsr_fsl_pci_t *) pci_info->regs; @@ -479,8 +481,10 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, hose->last_busno = hose->first_busno; } - printf(" PCIE%x on bus %02x - %02x\n", pci_info->pci_num, - hose->first_busno, hose->last_busno); + pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap); + printf("PCI%s%x: Bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ? + "E" : "", pci_info->pci_num, + hose->first_busno, hose->last_busno); return(hose->last_busno + 1); } diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 848746f1e..702ac6782 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -510,6 +510,71 @@ void pci_cfgfunc_do_nothing(struct pci_controller *hose, extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev); extern void pciauto_config_init(struct pci_controller *hose); +#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI_SCAN_SHOW) +const char * pci_class_str(u8 class) +{ + switch (class) { + case PCI_CLASS_NOT_DEFINED: + return "Build before PCI Rev2.0"; + break; + case PCI_BASE_CLASS_STORAGE: + return "Mass storage controller"; + break; + case PCI_BASE_CLASS_NETWORK: + return "Network controller"; + break; + case PCI_BASE_CLASS_DISPLAY: + return "Display controller"; + break; + case PCI_BASE_CLASS_MULTIMEDIA: + return "Multimedia device"; + break; + case PCI_BASE_CLASS_MEMORY: + return "Memory controller"; + break; + case PCI_BASE_CLASS_BRIDGE: + return "Bridge device"; + break; + case PCI_BASE_CLASS_COMMUNICATION: + return "Simple comm. controller"; + break; + case PCI_BASE_CLASS_SYSTEM: + return "Base system peripheral"; + break; + case PCI_BASE_CLASS_INPUT: + return "Input device"; + break; + case PCI_BASE_CLASS_DOCKING: + return "Docking station"; + break; + case PCI_BASE_CLASS_PROCESSOR: + return "Processor"; + break; + case PCI_BASE_CLASS_SERIAL: + return "Serial bus controller"; + break; + case PCI_BASE_CLASS_INTELLIGENT: + return "Intelligent controller"; + break; + case PCI_BASE_CLASS_SATELLITE: + return "Satellite controller"; + break; + case PCI_BASE_CLASS_CRYPT: + return "Cryptographic device"; + break; + case PCI_BASE_CLASS_SIGNAL_PROCESSING: + return "DSP"; + break; + case PCI_CLASS_OTHERS: + return "Does not fit any class"; + break; + default: + return "???"; + break; + }; +} +#endif /* CONFIG_CMD_PCI || CONFIG_PCI_SCAN_SHOW */ + int __pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) { /* @@ -551,6 +616,9 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) unsigned char header_type; struct pci_config_table *cfg; pci_dev_t dev; +#ifdef CONFIG_PCI_SCAN_SHOW + static int indent = 0; +#endif sub_bus = bus; @@ -568,44 +636,50 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor); - if (vendor != 0xffff && vendor != 0x0000) { + if (vendor == 0xffff || vendor == 0x0000) + continue; - if (!PCI_FUNC(dev)) - found_multi = header_type & 0x80; + if (!PCI_FUNC(dev)) + found_multi = header_type & 0x80; - debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n", - PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) ); + debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n", + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) ); - pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device); - pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class); + pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device); + pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class); - cfg = pci_find_config(hose, class, vendor, device, - PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); - if (cfg) { - cfg->config_device(hose, dev, cfg); - sub_bus = max(sub_bus, hose->current_busno); -#ifdef CONFIG_PCI_PNP - } else { - int n = pciauto_config_device(hose, dev); +#ifdef CONFIG_PCI_SCAN_SHOW + indent++; + + /* Print leading space, including bus indentation */ + printf("%*c", indent + 1, ' '); - sub_bus = max(sub_bus, n); + if (pci_print_dev(hose, dev)) { + printf("%02x:%02x.%-*x - %04x:%04x - %s\n", + PCI_BUS(dev), PCI_DEV(dev), 6 - indent, PCI_FUNC(dev), + vendor, device, pci_class_str(class >> 8)); + } #endif - } - if (hose->fixup_irq) - hose->fixup_irq(hose, dev); -#ifdef CONFIG_PCI_SCAN_SHOW - if (pci_print_dev(hose, dev)) { - unsigned char int_line; + cfg = pci_find_config(hose, class, vendor, device, + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); + if (cfg) { + cfg->config_device(hose, dev, cfg); + sub_bus = max(sub_bus, hose->current_busno); +#ifdef CONFIG_PCI_PNP + } else { + int n = pciauto_config_device(hose, dev); - pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_LINE, - &int_line); - printf(" %02x %02x %04x %04x %04x %02x\n", - PCI_BUS(dev), PCI_DEV(dev), vendor, device, class, - int_line); - } + sub_bus = max(sub_bus, n); #endif } + +#ifdef CONFIG_PCI_SCAN_SHOW + indent--; +#endif + + if (hose->fixup_irq) + hose->fixup_irq(hose, dev); } return sub_bus; diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 8410bb77e..850665a04 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -36,7 +36,12 @@ #ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 +#ifdef CONFIG_NAND_SPL +#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ +#else #define CONFIG_SYS_TEXT_BASE 0xf8f82000 +#endif /* CONFIG_NAND_SPL */ #endif #ifdef CONFIG_SDCARD @@ -53,6 +58,10 @@ #define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif +#ifndef CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ @@ -233,8 +242,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 6a15da50c..c7973b46a 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -65,13 +65,22 @@ extern unsigned long get_clock_freq(void); #ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 +#ifdef CONFIG_NAND_SPL +#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ +#else #define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif +#endif #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif +#ifndef CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#endif + /* * Only possible on E500 Version 2 or newer cores. */ @@ -194,8 +203,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) #define CONFIG_SYS_RAMBOOT #else @@ -488,6 +495,7 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_EEPRO100 #undef CONFIG_TULIP +#define CONFIG_E1000 /* Define e1000 pci Ethernet card */ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index f949cc2b6..692c8115e 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -474,6 +474,7 @@ #undef CONFIG_EEPRO100 #undef CONFIG_TULIP #undef CONFIG_RTL8139 +#define CONFIG_E1000 /* Define e1000 pci Ethernet card */ #ifndef CONFIG_PCI_PNP #define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 6c8579f9e..b411fc8bb 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -270,6 +270,7 @@ #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ +#define CONFIG_E1000 /* Define e1000 pci Ethernet card */ #endif /* SATA */ diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index b99f383ec..610f3ed29 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -1,5 +1,5 @@ /* - * Copyright 2009 Freescale Semiconductor, Inc. + * Copyright 2009-2010 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -46,7 +46,12 @@ #ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 +#ifdef CONFIG_NAND_SPL +#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ +#else #define CONFIG_SYS_TEXT_BASE 0xf8f82000 +#endif /* CONFIG_NAND_SPL */ #endif #ifdef CONFIG_SDCARD @@ -63,6 +68,10 @@ #define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif +#ifndef CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ @@ -192,8 +201,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT @@ -343,6 +350,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_EEPROM_BUS_NUM 1 #define CONFIG_RTC_DS1337 +#define CONFIG_SYS_RTC_DS1337_NOOSC #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* * General PCI diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 5e7b81f0a..21b48e9c4 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -33,11 +33,9 @@ #define CONFIG_SYS_NUM_FM2_10GEC 1 #define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */ + #define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_SERDES8 -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 -#endif - #include "corenet_ds.h" diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 2ac59e54b..454a30a04 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -37,6 +37,10 @@ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ @@ -64,7 +68,6 @@ #endif #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */ -#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ /* * These can be toggled for performance analysis, otherwise use default. @@ -475,6 +478,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING #define CONFIG_CMD_SETEXPR +#define CONFIG_CMD_DHCP #ifdef CONFIG_PCI #define CONFIG_CMD_PCI diff --git a/include/pci.h b/include/pci.h index 491f814e4..c45600603 100644 --- a/include/pci.h +++ b/include/pci.h @@ -536,6 +536,7 @@ extern int pci_hose_config_device(struct pci_controller *hose, pci_addr_t mem, unsigned long command); +const char * pci_class_str(u8 class); int pci_last_busno(void); #ifdef CONFIG_MPC824X diff --git a/nand_spl/board/freescale/mpc8536ds/Makefile b/nand_spl/board/freescale/mpc8536ds/Makefile index d1c0ef8f6..9c9d63e5d 100644 --- a/nand_spl/board/freescale/mpc8536ds/Makefile +++ b/nand_spl/board/freescale/mpc8536ds/Makefile @@ -24,13 +24,13 @@ # NAND_SPL := y -CONFIG_SYS_TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 PAD_TO := 0xfff01000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/freescale/mpc8569mds/Makefile b/nand_spl/board/freescale/mpc8569mds/Makefile index d1c0ef8f6..9c9d63e5d 100644 --- a/nand_spl/board/freescale/mpc8569mds/Makefile +++ b/nand_spl/board/freescale/mpc8569mds/Makefile @@ -24,13 +24,13 @@ # NAND_SPL := y -CONFIG_SYS_TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 PAD_TO := 0xfff01000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/freescale/p1_p2_rdb/Makefile b/nand_spl/board/freescale/p1_p2_rdb/Makefile index d1c0ef8f6..9c9d63e5d 100644 --- a/nand_spl/board/freescale/p1_p2_rdb/Makefile +++ b/nand_spl/board/freescale/p1_p2_rdb/Makefile @@ -24,13 +24,13 @@ # NAND_SPL := y -CONFIG_SYS_TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 PAD_TO := 0xfff01000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/net/bootp.c b/net/bootp.c index e679f8b7f..1a717867d 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -456,6 +456,10 @@ static int DhcpExtended (u8 * e, int message_type, IPaddr_t ServerID, IPaddr_t R *e++ = 42; *cnt += 1; #endif + /* no options, so back up to avoid sending an empty request list */ + if (*cnt == 0) + e -= 2; + *e++ = 255; /* End of the list */ /* Pad to minimal length */ @@ -204,10 +204,18 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) miiphy_init(); #endif - /* Try board-specific initialization first. If it fails or isn't - * present, try the cpu-specific initialization */ - if (board_eth_init(bis) < 0) - cpu_eth_init(bis); + /* + * If board-specific initialization exists, call it. + * If not, call a CPU-specific one + */ + if (board_eth_init != __def_eth_init) { + if (board_eth_init(bis) < 0) + printf("Board Net Initialization Failed\n"); + } else if (cpu_eth_init != __def_eth_init) { + if (cpu_eth_init(bis) < 0) + printf("CPU Net Initialization Failed\n"); + } else + printf("Net Initialization Skipped\n"); #if defined(CONFIG_DB64360) || defined(CONFIG_CPCI750) mv6436x_eth_initialize(bis); diff --git a/tools/Makefile b/tools/Makefile index 619c9f2ac..623f9086f 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -24,6 +24,12 @@ TOOLSUBDIRS = # +# Include this after HOSTOS HOSTARCH check +# so that we can act intelligently. +# +include $(TOPDIR)/config.mk + +# # toolchains targeting win32 generate .exe files # ifneq (,$(findstring WIN32 ,$(shell $(HOSTCC) -E -dM -xc /dev/null))) @@ -32,12 +38,6 @@ else SFX = endif -# -# Include this after HOSTOS HOSTARCH check -# so that we can act intelligently. -# -include $(TOPDIR)/config.mk - # Enable all the config-independent tools ifneq ($(HOST_TOOLS_ALL),) CONFIG_LCD_LOGO = y diff --git a/tools/env/Makefile b/tools/env/Makefile index f8930401a..04dfe9c3f 100644 --- a/tools/env/Makefile +++ b/tools/env/Makefile @@ -23,19 +23,24 @@ include $(TOPDIR)/config.mk -SRCS := $(obj)crc32.c fw_env.c fw_env_main.c +HOSTSRCS := $(obj)crc32.c fw_env.c fw_env_main.c HEADERS := fw_env.h -HOSTCFLAGS += -Wall -DUSE_HOSTCC -I$(SRCTREE)/include +# Compile for a hosted environment on the target +HOSTCPPFLAGS = -idirafter $(SRCTREE)/include \ + -idirafter $(OBJTREE)/include2 \ + -idirafter $(OBJTREE)/include \ + -DUSE_HOSTCC ifeq ($(MTD_VERSION),old) -HOSTCFLAGS += -DMTD_OLD +HOSTCPPFLAGS += -DMTD_OLD endif all: $(obj)fw_printenv -$(obj)fw_printenv: $(SRCS) $(HEADERS) - $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $(SRCS) +# Some files complain if compiled with -pedantic, use HOSTCFLAGS_NOPED +$(obj)fw_printenv: $(HOSTSRCS) $(HEADERS) + $(HOSTCC) $(HOSTCFLAGS_NOPED) $(HOSTLDFLAGS) -o $@ $(HOSTSRCS) clean: rm -f $(obj)fw_printenv $(obj)crc32.c |