diff options
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/release.S | 8 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 8 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/processor.h | 10 | 
3 files changed, 18 insertions, 8 deletions
| diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 5c4b1e3b7..0dea87178 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -69,9 +69,9 @@ __secondary_start_page:  #endif  #ifdef CONFIG_SYS_FSL_ERRATUM_CPU_A003999 -	mfspr	r3,977 +	mfspr	r3,SPRN_HDBCR1  	oris	r3,r3,0x0100 -	mtspr	977,r3 +	mtspr	SPRN_HDBCR1,r3  #endif  #ifdef CONFIG_SYS_FSL_ERRATUM_A004510 @@ -93,10 +93,10 @@ __secondary_start_page:  1:	/* Erratum says set bits 55:60 to 001001 */  	msync  	isync -	mfspr	r3,976 +	mfspr	r3,SPRN_HDBCR0  	li	r4,0x48  	rlwimi	r3,r4,0,0x1f8 -	mtspr	976,r3 +	mtspr	SPRN_HDBCR0,r3  	isync  2:  #endif diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 3f76ee66c..2ce5505e0 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -116,10 +116,10 @@ _start_e500:  	/* Erratum says set bits 55:60 to 001001 */  	msync  	isync -	mfspr	r3,976 +	mfspr	r3,SPRN_HDBCR0  	li	r4,0x48  	rlwimi	r3,r4,0,0x1f8 -	mtspr	976,r3 +	mtspr	SPRN_HDBCR0,r3  	isync  2:  #endif @@ -372,9 +372,9 @@ l2_disabled:  #endif  #ifdef CONFIG_SYS_FSL_ERRATUM_CPU_A003999 -	mfspr	r3,977 +	mfspr	r3,SPRN_HDBCR1  	oris	r3,r3,0x0100 -	mtspr	977,r3 +	mtspr	SPRN_HDBCR1,r3  #endif  	/* Enable Branch Prediction */ diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 8c91f0849..1ecf266b4 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -575,6 +575,16 @@  #define SPRN_MSSSR0	0x3f7  #endif +#define SPRN_HDBCR0	0x3d0 +#define SPRN_HDBCR1	0x3d1 +#define SPRN_HDBCR2	0x3d2 +#define SPRN_HDBCR3	0x3d3 +#define SPRN_HDBCR4	0x3d4 +#define SPRN_HDBCR5	0x3d5 +#define SPRN_HDBCR6	0x3d6 +#define SPRN_HDBCR7	0x277 +#define SPRN_HDBCR8	0x278 +  /* Short-hand versions for a number of the above SPRNs */  #define CTR	SPRN_CTR	/* Counter Register */ |